Implement a proper detach method for the PCI-PCI bridge driver.

[jhb]

Summary

Implement a proper detach method for the PCI-PCI bridge driver.

• Add a pcib_detach() function for the PCI-PCI bridge driver. It tears down the NEW_PCIB and hotplug state including destroying resource managers, deleting child devices, and disabling hotplug events.
• Add a detach method to the ACPI PCI-PCI bridge driver which calls pcib_detach() and then frees the copy of the _PRT interrupt routing table.
• Add a detach method to the PCI-Cardbus bridge driver which frees the PCI bus resources in addition to calling cbb_detach().
• Explicitly clear any pending hotplug events during attach to ensure future events will generate an interrupt.
• If a the Command Completed bit is set in the slot status register when the command completion timeout fires, treat it as if the command completed and the completion interrupt was just lost rather than forcing a detach.
• Don't wait for a Command Completed notification if Command Completion interrupts are disabled. The spec explicitly says no interrupt is enabled when clearing CCIE, and on my T400 no interrupt is generated when CCIE is changed from cleared to set, either. In addition, the T400 doesn't appear to set the Command Completed bit in the cases where it doesn't generate an interrupt, so don't schedule the timer either. (If the CC bit were always set, one could always set the timer and rely on the logic of treating CC set as a missed interrupt.)

Test Plan

• tested via 'devctl disable' and 'devctl enable' cycles of the parent 'pcib' device of an ExpressCard slot on my X220 and T400 as well as the parent 'cbb' device of the Cardbus slot in the T400.

[jhb]

• Rebase.
• First cut at actually shutting down hotplug machinery.
• Fix shutdown of hotplug events if a command is pending.
• Clear any pending events during attach.

[jhb]

• More fixes for command completions.

Had to adjust the command completion logic a bit after testing on the T400
(which uses command completions). I think it's a bug in the hardware that
it doesn't generate CC interrupts when setting CCIE and doesn't set CC in
the status register always, but that isn't fixable, so the driver has to cope
instead.