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Always ignore the START and STOP bits whenever the control register is

Description

Always ignore the START and STOP bits whenever the control register is
being overwritten, they are set only bits (cleared by hardware).

Disable the Acknowledge of the controller slave address. The slave mode is
not supported.

Make sure the interrupt flag bit is being cleared as recommended, add a
delay() _after_ clear the interrupt bit.

Sponsored by: Rubicon Communications, LLC (Netgate)

Details

Committed
loosJun 20 2017, 6:38 PM
Parents
rS320160: dtc: Update to upstream 917526
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