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Do a proper emulation of guest writes to MSR_EFER.

Description

Do a proper emulation of guest writes to MSR_EFER.

  • Must-Be-Zero bits cannot be set.
  • EFER_LME and EFER_LMA should respect the long mode consistency checks.
  • EFER_NXE, EFER_FFXSR, EFER_TCE can be set if allowed by CPUID capabilities.
  • Flag an error if guest tries to set EFER_LMSLE since bhyve doesn't enforce segment limits in 64-bit mode.

MFC after: 2 weeks

Details

Committed
neelMay 6 2015, 5:40 AM
Parents
rS282519: Add macros for AMD-specific bits in MSR_EFER: LMSLE, FFXSR and TCE.
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