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Differential D31887 Diff 94907 sys/dev/pci/pci_host_generic_acpi.c

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sys/dev/pci/pci_host_generic_acpi.c

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#define PCI_IO_WINDOW_OFFSET 0x1000 #define PCI_IO_WINDOW_OFFSET 0x1000
#define SPACE_CODE_SHIFT 24 #define SPACE_CODE_SHIFT 24
#define SPACE_CODE_MASK 0x3 #define SPACE_CODE_MASK 0x3
#define SPACE_CODE_IO_SPACE 0x1 #define SPACE_CODE_IO_SPACE 0x1
#define PROPS_CELL_SIZE 1 #define PROPS_CELL_SIZE 1
#define PCI_ADDR_CELL_SIZE 2 #define PCI_ADDR_CELL_SIZE 2
static struct {
char oem_id[ACPI_OEM_ID_SIZE + 1];
char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
uint32_t quirks;
} pci_acpi_quirks[] = {
{ "MRVL ", "CN9130 ", PCIE_ECAM_ARMADA8K_QUIRK },
{ "MRVL ", "CN913X ", PCIE_ECAM_ARMADA8K_QUIRK },
{ "MVEBU ", "ARMADA7K", PCIE_ECAM_ARMADA8K_QUIRK },
{ "MVEBU ", "ARMADA8K", PCIE_ECAM_ARMADA8K_QUIRK },
{ "MVEBU ", "CN9130 ", PCIE_ECAM_ARMADA8K_QUIRK },
{ "MVEBU ", "CN9131 ", PCIE_ECAM_ARMADA8K_QUIRK },
{ "MVEBU ", "CN9132 ", PCIE_ECAM_ARMADA8K_QUIRK },
{ 0 },
val_packett.coolUnsubmitted
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I guess we won't need any more entries here unlike the FDT case because

val_packett.cool: I guess we won't need any more entries here unlike the FDT case because - `"SNI "…
mwUnsubmitted
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Fortunately Marvell version of this IP does not have the necessity of the root port hiding, so it's much simpler. WRT the Amazon version,

mw: Fortunately Marvell version of this IP does not have the necessity of the root port hiding, so…
};
/* Forward prototypes */ /* Forward prototypes */
static int generic_pcie_acpi_probe(device_t dev); static int generic_pcie_acpi_probe(device_t dev);
static ACPI_STATUS pci_host_generic_acpi_parse_resource(ACPI_RESOURCE *, void *); static ACPI_STATUS pci_host_generic_acpi_parse_resource(ACPI_RESOURCE *, void *);
static int generic_pcie_acpi_read_ivar(device_t, device_t, int, uintptr_t *); static int generic_pcie_acpi_read_ivar(device_t, device_t, int, uintptr_t *);
/* /*
* generic_pcie_acpi_probe - look for root bridge flag * generic_pcie_acpi_probe - look for root bridge flag
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines if (res->Data.Address.ResourceType == ACPI_MEMORY_RANGE ||
sc->base.nranges++; sc->base.nranges++;
} else if (res->Data.Address.ResourceType == ACPI_BUS_NUMBER_RANGE) { } else if (res->Data.Address.ResourceType == ACPI_BUS_NUMBER_RANGE) {
sc->base.bus_start = min; sc->base.bus_start = min;
sc->base.bus_end = max; sc->base.bus_end = max;
} }
return (AE_OK); return (AE_OK);
} }
static void
pci_host_acpi_get_oem_quirks(struct generic_pcie_acpi_softc *sc,
ACPI_TABLE_HEADER *hdr)
{
int i;
for (i = 0; pci_acpi_quirks[i].quirks; i++) {
if (memcmp(hdr->OemId, pci_acpi_quirks[i].oem_id,
ACPI_OEM_ID_SIZE) != 0)
continue;
if (memcmp(hdr->OemTableId, pci_acpi_quirks[i].oem_table_id,
ACPI_OEM_TABLE_ID_SIZE) != 0)
continue;
sc->base.quirks |= pci_acpi_quirks[i].quirks;
}
}
static int static int
pci_host_acpi_get_ecam_resource(device_t dev) pci_host_acpi_get_ecam_resource(device_t dev)
{ {
struct generic_pcie_acpi_softc *sc; struct generic_pcie_acpi_softc *sc;
struct acpi_device *ad; struct acpi_device *ad;
struct resource_list *rl; struct resource_list *rl;
ACPI_TABLE_HEADER *hdr; ACPI_TABLE_HEADER *hdr;
ACPI_MCFG_ALLOCATION *mcfg_entry, *mcfg_end; ACPI_MCFG_ALLOCATION *mcfg_entry, *mcfg_end;
Show All 23 Lines if (found) {
if (mcfg_entry->EndBusNumber < sc->base.bus_end) if (mcfg_entry->EndBusNumber < sc->base.bus_end)
sc->base.bus_end = mcfg_entry->EndBusNumber; sc->base.bus_end = mcfg_entry->EndBusNumber;
base = mcfg_entry->Address; base = mcfg_entry->Address;
} else { } else {
device_printf(dev, "MCFG exists, but does not have bus %d-%d\n", device_printf(dev, "MCFG exists, but does not have bus %d-%d\n",
sc->base.bus_start, sc->base.bus_end); sc->base.bus_start, sc->base.bus_end);
return (ENXIO); return (ENXIO);
} }
pci_host_acpi_get_oem_quirks(sc, hdr);
} else { } else {
status = acpi_GetInteger(handle, "_CBA", &val); status = acpi_GetInteger(handle, "_CBA", &val);
if (ACPI_SUCCESS(status)) if (ACPI_SUCCESS(status))
base = val; base = val;
else else
return (ENXIO); return (ENXIO);
} }
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