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sys/dev/bge/if_bge.c
Context not available. | |||||
static void bge_stop_fw(struct bge_softc *); | static void bge_stop_fw(struct bge_softc *); | ||||
static int bge_reset(struct bge_softc *); | static int bge_reset(struct bge_softc *); | ||||
static void bge_link_upd(struct bge_softc *); | static void bge_link_upd(struct bge_softc *); | ||||
static void bge_setwol(struct bge_softc *); | |||||
static void bge_clrwol(struct bge_softc *); | |||||
static void bge_ape_lock_init(struct bge_softc *); | static void bge_ape_lock_init(struct bge_softc *); | ||||
static void bge_ape_read_fw_ver(struct bge_softc *); | static void bge_ape_read_fw_ver(struct bge_softc *); | ||||
Context not available. | |||||
static void | static void | ||||
bge_ape_driver_state_change(struct bge_softc *sc, int kind) | bge_ape_driver_state_change(struct bge_softc *sc, int kind) | ||||
{ | { | ||||
struct ifnet *ifp; | |||||
uint32_t apedata, event; | uint32_t apedata, event; | ||||
if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0) | if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0) | ||||
Context not available. | |||||
event = BGE_APE_EVENT_STATUS_STATE_START; | event = BGE_APE_EVENT_STATUS_STATE_START; | ||||
break; | break; | ||||
case BGE_RESET_SHUTDOWN: | case BGE_RESET_SHUTDOWN: | ||||
APE_WRITE_4(sc, BGE_APE_HOST_DRVR_STATE, | /* XXX Needs rewording | ||||
BGE_APE_HOST_DRVR_STATE_UNLOAD); | * With the interface we are currently using, | ||||
* APE does not track driver state. Wiping | |||||
* out the HOST SEGMENT SIGNATURE forces | |||||
* the APE to assume OS absent status. | |||||
*/ | |||||
APE_WRITE_4(sc, BGE_APE_HOST_SEG_SIG, 0); | |||||
ifp = sc->bge_ifp; | |||||
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0) { | |||||
APE_WRITE_4(sc, BGE_APE_HOST_WOL_SPEED, | |||||
BGE_APE_HOST_WOL_SPEED_AUTO); | |||||
APE_WRITE_4(sc, BGE_APE_HOST_DRVR_STATE, | |||||
BGE_APE_HOST_DRVR_STATE_WOL); | |||||
} else { | |||||
APE_WRITE_4(sc, BGE_APE_HOST_DRVR_STATE, | |||||
BGE_APE_HOST_DRVR_STATE_UNLOAD); | |||||
} | |||||
event = BGE_APE_EVENT_STATUS_STATE_UNLOAD; | event = BGE_APE_EVENT_STATUS_STATE_UNLOAD; | ||||
break; | break; | ||||
case BGE_RESET_SUSPEND: | case BGE_RESET_SUSPEND: | ||||
Context not available. | |||||
if_setsendqready(ifp); | if_setsendqready(ifp); | ||||
if_sethwassist(ifp, sc->bge_csum_features); | if_sethwassist(ifp, sc->bge_csum_features); | ||||
if_setcapabilities(ifp, IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING | | if_setcapabilities(ifp, IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING | | ||||
IFCAP_VLAN_MTU); | IFCAP_VLAN_MTU | IFCAP_WOL_MAGIC); | ||||
if ((sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3)) != 0) { | if ((sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3)) != 0) { | ||||
if_sethwassistbits(ifp, CSUM_TSO, 0); | if_sethwassistbits(ifp, CSUM_TSO, 0); | ||||
if_setcapabilitiesbit(ifp, IFCAP_TSO4 | IFCAP_VLAN_HWTSO, 0); | if_setcapabilitiesbit(ifp, IFCAP_TSO4 | IFCAP_VLAN_HWTSO, 0); | ||||
Context not available. | |||||
#ifdef IFCAP_VLAN_HWCSUM | #ifdef IFCAP_VLAN_HWCSUM | ||||
if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWCSUM, 0); | if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWCSUM, 0); | ||||
#endif | #endif | ||||
if (pci_find_cap(dev, PCIY_PMG, ®) == 0) | |||||
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC, 0); | |||||
if_setcapenable(ifp, if_getcapabilities(ifp)); | if_setcapenable(ifp, if_getcapabilities(ifp)); | ||||
#ifdef DEVICE_POLLING | #ifdef DEVICE_POLLING | ||||
if_setcapabilitiesbit(ifp, IFCAP_POLLING, 0); | if_setcapabilitiesbit(ifp, IFCAP_POLLING, 0); | ||||
Context not available. | |||||
device_printf(sc->bge_dev, "couldn't set up irq\n"); | device_printf(sc->bge_dev, "couldn't set up irq\n"); | ||||
goto fail; | goto fail; | ||||
} | } | ||||
BGE_LOCK(sc); | |||||
bge_clrwol(sc); | |||||
BGE_UNLOCK(sc); | |||||
/* Attach driver debugnet methods. */ | /* Attach driver debugnet methods. */ | ||||
DEBUGNET_SET(ifp, bge); | DEBUGNET_SET(ifp, bge); | ||||
Context not available. | |||||
} | } | ||||
} | } | ||||
#endif | #endif | ||||
if ((mask & IFCAP_WOL_MAGIC) != 0 && | |||||
(if_getcapabilities(ifp) & IFCAP_WOL_MAGIC) != 0) | |||||
if_togglecapenable(ifp, IFCAP_WOL_MAGIC); | |||||
if ((mask & IFCAP_TXCSUM) != 0 && | if ((mask & IFCAP_TXCSUM) != 0 && | ||||
(if_getcapabilities(ifp) & IFCAP_TXCSUM) != 0) { | (if_getcapabilities(ifp) & IFCAP_TXCSUM) != 0) { | ||||
if_togglecapenable(ifp, IFCAP_TXCSUM); | if_togglecapenable(ifp, IFCAP_TXCSUM); | ||||
Context not available. | |||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
BGE_LOCK(sc); | BGE_LOCK(sc); | ||||
bge_setwol(sc); | |||||
bge_stop(sc); | bge_stop(sc); | ||||
BGE_UNLOCK(sc); | BGE_UNLOCK(sc); | ||||
Context not available. | |||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
BGE_LOCK(sc); | BGE_LOCK(sc); | ||||
bge_setwol(sc); | |||||
bge_stop(sc); | bge_stop(sc); | ||||
BGE_UNLOCK(sc); | BGE_UNLOCK(sc); | ||||
Context not available. | |||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
BGE_LOCK(sc); | BGE_LOCK(sc); | ||||
ifp = sc->bge_ifp; | ifp = sc->bge_ifp; | ||||
bge_reset(sc); | |||||
if (if_getflags(ifp) & IFF_UP) { | if (if_getflags(ifp) & IFF_UP) { | ||||
bge_init_locked(sc); | bge_init_locked(sc); | ||||
if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) | if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) | ||||
bge_start_locked(ifp); | bge_start_locked(ifp); | ||||
} | } | ||||
bge_clrwol(sc); | |||||
BGE_UNLOCK(sc); | BGE_UNLOCK(sc); | ||||
return (0); | return (0); | ||||
Context not available. | |||||
} | } | ||||
} | } | ||||
static void | |||||
bge_setwol(struct bge_softc *sc) | |||||
{ | |||||
struct ifnet *ifp; | |||||
uint16_t pmstat; | |||||
int pmc; | |||||
ifp = sc->bge_ifp; | |||||
if ((if_getcapabilities(ifp) & IFCAP_WOL_MAGIC) == 0) | |||||
return; | |||||
if (pci_find_cap(sc->bge_dev, PCIY_PMG, &pmc) != 0) | |||||
return; | |||||
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0) { | |||||
BGE_SETBIT(sc, BGE_MAC_MODE, BGE_MACMODE_MAGIC_PKT_ENB); | |||||
BGE_SETBIT(sc, BGE_MAC_MODE, BGE_MACMODE_ACPI_PWRON_ENB); | |||||
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_PORTMODE); | |||||
BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_GMII); | |||||
BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE); | |||||
} | |||||
else { | |||||
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_MAGIC_PKT_ENB); | |||||
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_ACPI_PWRON_ENB); | |||||
} | |||||
/* Request PME if WOL is requested. */ | |||||
pmstat = pci_read_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, 2); | |||||
pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE); | |||||
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0) | |||||
pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE; | |||||
pci_write_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, pmstat, 2); | |||||
} | |||||
static void | |||||
bge_clrwol(struct bge_softc *sc) | |||||
{ | |||||
struct ifnet *ifp; | |||||
uint16_t pmstat; | |||||
int pmc; | |||||
ifp = sc->bge_ifp; | |||||
if ((if_getcapabilities(ifp) & IFCAP_WOL) == 0) | |||||
return; | |||||
if (pci_find_cap(sc->bge_dev, PCIY_PMG, &pmc) != 0) | |||||
return; | |||||
if ((if_getcapenable(ifp) & IFCAP_WOL) == 0) | |||||
return; | |||||
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_MAGIC_PKT_ENB); | |||||
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_ACPI_PWRON_ENB); | |||||
pmstat = pci_read_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, 2); | |||||
pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE); | |||||
pci_write_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, pmstat, 2); | |||||
} | |||||
#ifdef DEBUGNET | #ifdef DEBUGNET | ||||
static void | static void | ||||
bge_debugnet_init(if_t ifp, int *nrxr, int *ncl, int *clsize) | bge_debugnet_init(if_t ifp, int *nrxr, int *ncl, int *clsize) | ||||
Context not available. |