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sys/conf/ldscript.arm64
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/* Adjust the address for the data segment. We want to adjust up to | /* Adjust the address for the data segment. We want to adjust up to | ||||
the same address within the page on the next page up. */ | the same address within the page on the next page up. */ | ||||
. = ALIGN(0x1000) + (. & (0x1000 - 1)) ; | . = ALIGN(0x1000) + (. & (0x1000 - 1)) ; | ||||
.data : | .data : | ||||
{ | { | ||||
*(.data) | *(.data) | ||||
*(.gnu.linkonce.d*) | *(.gnu.linkonce.d*) | ||||
} | } | ||||
. = ALIGN(128); | |||||
andrew: Why 64? If it's related to a cacheline size it should probably be 128 as some CPUs, e.g. the… | |||||
Done Inline Actionsit is cache lines, yes mjg: it is cache lines, yes | |||||
.data.read_frequently : | |||||
{ | |||||
*(SORT_BY_ALIGNMENT(.data.read_frequently)) | |||||
} | |||||
.data.read_mostly : | |||||
{ | |||||
*(.data.read_mostly) | |||||
} | |||||
. = ALIGN(128); | |||||
.data.exclusive_cache_line : | |||||
{ | |||||
*(.data.exclusive_cache_line) | |||||
} | |||||
. = ALIGN(128); | |||||
.data1 : { *(.data1) } | .data1 : { *(.data1) } | ||||
. = ALIGN(32 / 8); | . = ALIGN(32 / 8); | ||||
_start_ctors = .; | _start_ctors = .; | ||||
PROVIDE (start_ctors = .); | PROVIDE (start_ctors = .); | ||||
.ctors : | .ctors : | ||||
{ | { | ||||
*(.ctors) | *(.ctors) | ||||
} | } | ||||
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Why 64? If it's related to a cacheline size it should probably be 128 as some CPUs, e.g. the original ThunderX, have a 128 byte cacheline.