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sys/dev/ixgbe/ix_txrx.c
Show First 20 Lines • Show All 44 Lines • ▼ Show 20 Lines | |||||
/************************************************************************ | /************************************************************************ | ||||
* Local Function prototypes | * Local Function prototypes | ||||
************************************************************************/ | ************************************************************************/ | ||||
static int ixgbe_isc_txd_encap(void *arg, if_pkt_info_t pi); | static int ixgbe_isc_txd_encap(void *arg, if_pkt_info_t pi); | ||||
static void ixgbe_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx); | static void ixgbe_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx); | ||||
static int ixgbe_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear); | static int ixgbe_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear); | ||||
static void ixgbe_isc_rxd_refill(void *arg, if_rxd_update_t iru); | static void ixgbe_isc_rxd_refill(void *arg, if_rxd_update_t iru); | ||||
static void ixgbe_isc_rxd_flush(void *arg, uint16_t qsidx, uint8_t flidx __unused, qidx_t pidx); | static void ixgbe_isc_rxd_flush(void *arg, uint16_t qsidx, | ||||
uint8_t flidx __unused, qidx_t pidx); | |||||
static int ixgbe_isc_rxd_available(void *arg, uint16_t qsidx, qidx_t pidx, | static int ixgbe_isc_rxd_available(void *arg, uint16_t qsidx, qidx_t pidx, | ||||
qidx_t budget); | qidx_t budget); | ||||
static int ixgbe_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri); | static int ixgbe_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri); | ||||
static void ixgbe_rx_checksum(u32 staterr, if_rxd_info_t ri, u32 ptype); | static void ixgbe_rx_checksum(uint32_t staterr, if_rxd_info_t ri, | ||||
static int ixgbe_tx_ctx_setup(struct ixgbe_adv_tx_context_desc *, if_pkt_info_t); | uint32_t ptype); | ||||
static int ixgbe_tx_ctx_setup(struct ixgbe_adv_tx_context_desc *, | |||||
if_pkt_info_t); | |||||
extern void ixgbe_if_enable_intr(if_ctx_t ctx); | extern void ixgbe_if_enable_intr(if_ctx_t ctx); | ||||
static int ixgbe_determine_rsstype(u16 pkt_info); | static int ixgbe_determine_rsstype(uint16_t pkt_info); | ||||
struct if_txrx ixgbe_txrx = { | struct if_txrx ixgbe_txrx = { | ||||
.ift_txd_encap = ixgbe_isc_txd_encap, | .ift_txd_encap = ixgbe_isc_txd_encap, | ||||
.ift_txd_flush = ixgbe_isc_txd_flush, | .ift_txd_flush = ixgbe_isc_txd_flush, | ||||
.ift_txd_credits_update = ixgbe_isc_txd_credits_update, | .ift_txd_credits_update = ixgbe_isc_txd_credits_update, | ||||
.ift_rxd_available = ixgbe_isc_rxd_available, | .ift_rxd_available = ixgbe_isc_rxd_available, | ||||
.ift_rxd_pkt_get = ixgbe_isc_rxd_pkt_get, | .ift_rxd_pkt_get = ixgbe_isc_rxd_pkt_get, | ||||
.ift_rxd_refill = ixgbe_isc_rxd_refill, | .ift_rxd_refill = ixgbe_isc_rxd_refill, | ||||
.ift_rxd_flush = ixgbe_isc_rxd_flush, | .ift_rxd_flush = ixgbe_isc_rxd_flush, | ||||
.ift_legacy_intr = NULL | .ift_legacy_intr = NULL | ||||
}; | }; | ||||
/************************************************************************ | /************************************************************************ | ||||
* ixgbe_tx_ctx_setup | * ixgbe_tx_ctx_setup | ||||
* | * | ||||
* Advanced Context Descriptor setup for VLAN, CSUM or TSO | * Advanced Context Descriptor setup for VLAN, CSUM or TSO | ||||
* | * | ||||
************************************************************************/ | ************************************************************************/ | ||||
static int | static int | ||||
ixgbe_tx_ctx_setup(struct ixgbe_adv_tx_context_desc *TXD, if_pkt_info_t pi) | ixgbe_tx_ctx_setup(struct ixgbe_adv_tx_context_desc *TXD, if_pkt_info_t pi) | ||||
{ | { | ||||
u32 vlan_macip_lens, type_tucmd_mlhl; | uint32_t vlan_macip_lens, type_tucmd_mlhl; | ||||
u32 olinfo_status, mss_l4len_idx, pktlen, offload; | uint32_t olinfo_status, mss_l4len_idx, pktlen, offload; | ||||
u8 ehdrlen; | u8 ehdrlen; | ||||
offload = TRUE; | offload = TRUE; | ||||
olinfo_status = mss_l4len_idx = vlan_macip_lens = type_tucmd_mlhl = 0; | olinfo_status = mss_l4len_idx = vlan_macip_lens = type_tucmd_mlhl = 0; | ||||
/* VLAN MACLEN IPLEN */ | /* VLAN MACLEN IPLEN */ | ||||
vlan_macip_lens |= (htole16(pi->ipi_vtag) << IXGBE_ADVTXD_VLAN_SHIFT); | vlan_macip_lens |= (htole16(pi->ipi_vtag) << IXGBE_ADVTXD_VLAN_SHIFT); | ||||
/* | /* | ||||
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines | if (pi->ipi_csum_flags & (CSUM_IP_SCTP | CSUM_IP6_SCTP)) | ||||
type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_SCTP; | type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_SCTP; | ||||
else | else | ||||
offload = FALSE; | offload = FALSE; | ||||
break; | break; | ||||
default: | default: | ||||
offload = FALSE; | offload = FALSE; | ||||
break; | break; | ||||
} | } | ||||
/* Insert L4 checksum into data descriptors */ | /* Insert L4 checksum into data descriptors */ | ||||
if (offload) | if (offload) | ||||
olinfo_status |= IXGBE_TXD_POPTS_TXSM << 8; | olinfo_status |= IXGBE_TXD_POPTS_TXSM << 8; | ||||
type_tucmd_mlhl |= IXGBE_ADVTXD_DCMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT; | type_tucmd_mlhl |= IXGBE_ADVTXD_DCMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT; | ||||
/* Now copy bits into descriptor */ | /* Now copy bits into descriptor */ | ||||
TXD->vlan_macip_lens = htole32(vlan_macip_lens); | TXD->vlan_macip_lens = htole32(vlan_macip_lens); | ||||
TXD->type_tucmd_mlhl = htole32(type_tucmd_mlhl); | TXD->type_tucmd_mlhl = htole32(type_tucmd_mlhl); | ||||
Show All 13 Lines | ixgbe_isc_txd_encap(void *arg, if_pkt_info_t pi) | ||||
if_softc_ctx_t scctx = sc->shared; | if_softc_ctx_t scctx = sc->shared; | ||||
struct ix_tx_queue *que = &sc->tx_queues[pi->ipi_qsidx]; | struct ix_tx_queue *que = &sc->tx_queues[pi->ipi_qsidx]; | ||||
struct tx_ring *txr = &que->txr; | struct tx_ring *txr = &que->txr; | ||||
int nsegs = pi->ipi_nsegs; | int nsegs = pi->ipi_nsegs; | ||||
bus_dma_segment_t *segs = pi->ipi_segs; | bus_dma_segment_t *segs = pi->ipi_segs; | ||||
union ixgbe_adv_tx_desc *txd = NULL; | union ixgbe_adv_tx_desc *txd = NULL; | ||||
struct ixgbe_adv_tx_context_desc *TXD; | struct ixgbe_adv_tx_context_desc *TXD; | ||||
int i, j, first, pidx_last; | int i, j, first, pidx_last; | ||||
u32 olinfo_status, cmd, flags; | uint32_t olinfo_status, cmd, flags; | ||||
qidx_t ntxd; | qidx_t ntxd; | ||||
cmd = (IXGBE_ADVTXD_DTYP_DATA | | cmd = (IXGBE_ADVTXD_DTYP_DATA | | ||||
IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT); | IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT); | ||||
if (pi->ipi_mflags & M_VLANTAG) | if (pi->ipi_mflags & M_VLANTAG) | ||||
cmd |= IXGBE_ADVTXD_DCMD_VLE; | cmd |= IXGBE_ADVTXD_DCMD_VLE; | ||||
▲ Show 20 Lines • Show All 167 Lines • ▼ Show 20 Lines | |||||
************************************************************************/ | ************************************************************************/ | ||||
static int | static int | ||||
ixgbe_isc_rxd_available(void *arg, uint16_t qsidx, qidx_t pidx, qidx_t budget) | ixgbe_isc_rxd_available(void *arg, uint16_t qsidx, qidx_t pidx, qidx_t budget) | ||||
{ | { | ||||
struct adapter *sc = arg; | struct adapter *sc = arg; | ||||
struct ix_rx_queue *que = &sc->rx_queues[qsidx]; | struct ix_rx_queue *que = &sc->rx_queues[qsidx]; | ||||
struct rx_ring *rxr = &que->rxr; | struct rx_ring *rxr = &que->rxr; | ||||
union ixgbe_adv_rx_desc *rxd; | union ixgbe_adv_rx_desc *rxd; | ||||
u32 staterr; | uint32_t staterr; | ||||
int cnt, i, nrxd; | int cnt, i, nrxd; | ||||
nrxd = sc->shared->isc_nrxd[0]; | nrxd = sc->shared->isc_nrxd[0]; | ||||
for (cnt = 0, i = pidx; cnt < nrxd && cnt <= budget;) { | for (cnt = 0, i = pidx; cnt < nrxd && cnt <= budget;) { | ||||
rxd = &rxr->rx_base[i]; | rxd = &rxr->rx_base[i]; | ||||
staterr = le32toh(rxd->wb.upper.status_error); | staterr = le32toh(rxd->wb.upper.status_error); | ||||
if ((staterr & IXGBE_RXD_STAT_DD) == 0) | if ((staterr & IXGBE_RXD_STAT_DD) == 0) | ||||
Show All 19 Lines | |||||
ixgbe_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) | ixgbe_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) | ||||
{ | { | ||||
struct adapter *adapter = arg; | struct adapter *adapter = arg; | ||||
struct ix_rx_queue *que = &adapter->rx_queues[ri->iri_qsidx]; | struct ix_rx_queue *que = &adapter->rx_queues[ri->iri_qsidx]; | ||||
struct rx_ring *rxr = &que->rxr; | struct rx_ring *rxr = &que->rxr; | ||||
struct ifnet *ifp = iflib_get_ifp(adapter->ctx); | struct ifnet *ifp = iflib_get_ifp(adapter->ctx); | ||||
union ixgbe_adv_rx_desc *rxd; | union ixgbe_adv_rx_desc *rxd; | ||||
u16 pkt_info, len, cidx, i; | uint16_t pkt_info, len, cidx, i; | ||||
u16 vtag = 0; | uint16_t vtag = 0; | ||||
u32 ptype; | uint32_t ptype; | ||||
u32 staterr = 0; | uint32_t staterr = 0; | ||||
bool eop; | bool eop; | ||||
i = 0; | i = 0; | ||||
cidx = ri->iri_cidx; | cidx = ri->iri_cidx; | ||||
do { | do { | ||||
rxd = &rxr->rx_base[cidx]; | rxd = &rxr->rx_base[cidx]; | ||||
staterr = le32toh(rxd->wb.upper.status_error); | staterr = le32toh(rxd->wb.upper.status_error); | ||||
pkt_info = le16toh(rxd->wb.lower.lo_dword.hs_rss.pkt_info); | pkt_info = le16toh(rxd->wb.lower.lo_dword.hs_rss.pkt_info); | ||||
Show All 13 Lines | do { | ||||
if ( (rxr->vtag_strip) && (staterr & IXGBE_RXD_STAT_VP) ) { | if ( (rxr->vtag_strip) && (staterr & IXGBE_RXD_STAT_VP) ) { | ||||
vtag = le16toh(rxd->wb.upper.vlan); | vtag = le16toh(rxd->wb.upper.vlan); | ||||
} else { | } else { | ||||
vtag = 0; | vtag = 0; | ||||
} | } | ||||
/* Make sure bad packets are discarded */ | /* Make sure bad packets are discarded */ | ||||
if (eop && (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) != 0) { | if (eop && (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) != 0) { | ||||
#if __FreeBSD_version >= 1100036 | |||||
gallatin: I thought that intel shipped this as part of a backport to 11.x? I assume removing this will… | |||||
Not Done Inline ActionsIt's possible, however this would have been some point in 11-CURRENT. Removing the ifdef should be safe for 11-RELEASE et al https://cgit.freebsd.org/src/commit/sys/sys/param.h?h=stable/11&id=10204535afded7f13a48badf29bcc1a33dc3c132 kbowling: It's possible, however this would have been some point in 11-CURRENT. Removing the ifdef… | |||||
if (adapter->feat_en & IXGBE_FEATURE_VF) | if (adapter->feat_en & IXGBE_FEATURE_VF) | ||||
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); | if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); | ||||
#endif | |||||
rxr->rx_discarded++; | rxr->rx_discarded++; | ||||
return (EBADMSG); | return (EBADMSG); | ||||
} | } | ||||
ri->iri_frags[i].irf_flid = 0; | ri->iri_frags[i].irf_flid = 0; | ||||
ri->iri_frags[i].irf_idx = cidx; | ri->iri_frags[i].irf_idx = cidx; | ||||
ri->iri_frags[i].irf_len = len; | ri->iri_frags[i].irf_len = len; | ||||
if (++cidx == adapter->shared->isc_nrxd[0]) | if (++cidx == adapter->shared->isc_nrxd[0]) | ||||
Show All 28 Lines | |||||
/************************************************************************ | /************************************************************************ | ||||
* ixgbe_rx_checksum | * ixgbe_rx_checksum | ||||
* | * | ||||
* Verify that the hardware indicated that the checksum is valid. | * Verify that the hardware indicated that the checksum is valid. | ||||
* Inform the stack about the status of checksum so that stack | * Inform the stack about the status of checksum so that stack | ||||
* doesn't spend time verifying the checksum. | * doesn't spend time verifying the checksum. | ||||
************************************************************************/ | ************************************************************************/ | ||||
static void | static void | ||||
ixgbe_rx_checksum(u32 staterr, if_rxd_info_t ri, u32 ptype) | ixgbe_rx_checksum(uint32_t staterr, if_rxd_info_t ri, uint32_t ptype) | ||||
{ | { | ||||
u16 status = (u16)staterr; | uint16_t status = (uint16_t)staterr; | ||||
u8 errors = (u8)(staterr >> 24); | uint8_t errors = (uint8_t)(staterr >> 24); | ||||
bool sctp = false; | |||||
if ((ptype & IXGBE_RXDADV_PKTTYPE_ETQF) == 0 && | /* If there is a layer 3 or 4 error we are done */ | ||||
(ptype & IXGBE_RXDADV_PKTTYPE_SCTP) != 0) | if (__predict_false(errors & (IXGBE_RXD_ERR_IPE | IXGBE_RXD_ERR_TCPE))) | ||||
sctp = TRUE; | return; | ||||
/* IPv4 checksum */ | |||||
if (status & IXGBE_RXD_STAT_IPCS) { | |||||
if (!(errors & IXGBE_RXD_ERR_IPE)) { | |||||
/* IP Checksum Good */ | /* IP Checksum Good */ | ||||
ri->iri_csum_flags = CSUM_IP_CHECKED | CSUM_IP_VALID; | if (status & IXGBE_RXD_STAT_IPCS) | ||||
} else | ri->iri_csum_flags = (CSUM_IP_CHECKED | CSUM_IP_VALID); | ||||
ri->iri_csum_flags = 0; | |||||
} | /* Valid L4E checksum */ | ||||
/* TCP/UDP/SCTP checksum */ | if (__predict_true(status & IXGBE_RXD_STAT_L4CS)) { | ||||
if (status & IXGBE_RXD_STAT_L4CS) { | /* SCTP header present. */ | ||||
u64 type = (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); | if (__predict_false((ptype & IXGBE_RXDADV_PKTTYPE_ETQF) == 0 && | ||||
#if __FreeBSD_version >= 800000 | (ptype & IXGBE_RXDADV_PKTTYPE_SCTP) != 0)) { | ||||
if (sctp) | ri->iri_csum_flags |= CSUM_SCTP_VALID; | ||||
type = CSUM_SCTP_VALID; | } else { | ||||
#endif | ri->iri_csum_flags |= CSUM_DATA_VALID | CSUM_PSEUDO_HDR; | ||||
if (!(errors & IXGBE_RXD_ERR_TCPE)) { | |||||
ri->iri_csum_flags |= type; | |||||
if (!sctp) | |||||
ri->iri_csum_data = htons(0xffff); | ri->iri_csum_data = htons(0xffff); | ||||
} | } | ||||
} | } | ||||
} /* ixgbe_rx_checksum */ | } /* ixgbe_rx_checksum */ | ||||
/************************************************************************ | /************************************************************************ | ||||
* ixgbe_determine_rsstype | * ixgbe_determine_rsstype | ||||
* | * | ||||
* Parse the packet type to determine the appropriate hash | * Parse the packet type to determine the appropriate hash | ||||
************************************************************************/ | ************************************************************************/ | ||||
static int | static int | ||||
ixgbe_determine_rsstype(u16 pkt_info) | ixgbe_determine_rsstype(uint16_t pkt_info) | ||||
{ | { | ||||
switch (pkt_info & IXGBE_RXDADV_RSSTYPE_MASK) { | switch (pkt_info & IXGBE_RXDADV_RSSTYPE_MASK) { | ||||
case IXGBE_RXDADV_RSSTYPE_IPV4_TCP: | case IXGBE_RXDADV_RSSTYPE_IPV4_TCP: | ||||
return M_HASHTYPE_RSS_TCP_IPV4; | return M_HASHTYPE_RSS_TCP_IPV4; | ||||
case IXGBE_RXDADV_RSSTYPE_IPV4: | case IXGBE_RXDADV_RSSTYPE_IPV4: | ||||
return M_HASHTYPE_RSS_IPV4; | return M_HASHTYPE_RSS_IPV4; | ||||
case IXGBE_RXDADV_RSSTYPE_IPV6_TCP: | case IXGBE_RXDADV_RSSTYPE_IPV6_TCP: | ||||
return M_HASHTYPE_RSS_TCP_IPV6; | return M_HASHTYPE_RSS_TCP_IPV6; | ||||
Show All 16 Lines |
I thought that intel shipped this as part of a backport to 11.x? I assume removing this will cause them unneeded pain,