Differential D29382 Diff 86372 sys/dev/cxgbe/adapter.h

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sys/dev/cxgbe/adapter.h

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struct wrq_cookie {		struct wrq_cookie {
TAILQ_ENTRY(wrq_cookie) link;		TAILQ_ENTRY(wrq_cookie) link;
int ndesc;		int ndesc;
int pidx;		int pidx;
};		};

/*		/*
* wrq: SGE egress queue that is given prebuilt work requests. Both the control		* wrq: SGE egress queue that is given prebuilt work requests. Control queues
* and offload tx queues are of this type.		* are of this type.
*/		*/
struct sge_wrq {		struct sge_wrq {
struct sge_eq eq; /* MUST be first */		struct sge_eq eq; /* MUST be first */

struct adapter *adapter;		struct adapter *adapter;
struct task wrq_tx_task;		struct task wrq_tx_task;

/* Tx desc reserved but WR not "committed" yet. */		/* Tx desc reserved but WR not "committed" yet. */
Show All 17 Lines	struct sge_wrq {
* status page, and some information about the last WR that used it.		* status page, and some information about the last WR that used it.
*/		*/
uint16_t ss_pidx;		uint16_t ss_pidx;
uint16_t ss_len;		uint16_t ss_len;
uint8_t ss[SGE_MAX_WR_LEN];		uint8_t ss[SGE_MAX_WR_LEN];

} __aligned(CACHE_LINE_SIZE);		} __aligned(CACHE_LINE_SIZE);

		/* ofld_txq: SGE egress queue + miscellaneous items */
		struct sge_ofld_txq {
		struct sge_wrq wrq;
		} __aligned(CACHE_LINE_SIZE);

#define INVALID_NM_RXQ_CNTXT_ID ((uint16_t)(-1))		#define INVALID_NM_RXQ_CNTXT_ID ((uint16_t)(-1))
struct sge_nm_rxq {		struct sge_nm_rxq {
/* Items used by the driver rx ithread are in this cacheline. */		/* Items used by the driver rx ithread are in this cacheline. */
volatile int nm_state __aligned(CACHE_LINE_SIZE); /* NM_OFF, NM_ON, or NM_BUSY */		volatile int nm_state __aligned(CACHE_LINE_SIZE); /* NM_OFF, NM_ON, or NM_BUSY */
u_int nid; /* netmap ring # for this queue */		u_int nid; /* netmap ring # for this queue */
struct vi_info *vi;		struct vi_info *vi;

struct iq_desc *iq_desc;		struct iq_desc *iq_desc;
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines	struct sge {
int nnmtxq; /* total # of netmap tx queues */		int nnmtxq; /* total # of netmap tx queues */
int niq; /* total # of ingress queues */		int niq; /* total # of ingress queues */
int neq; /* total # of egress queues */		int neq; /* total # of egress queues */

struct sge_iq fwq; /* Firmware event queue */		struct sge_iq fwq; /* Firmware event queue */
struct sge_wrq ctrlq; / Control queues */		struct sge_wrq ctrlq; / Control queues */
struct sge_txq txq; / NIC tx queues */		struct sge_txq txq; / NIC tx queues */
struct sge_rxq rxq; / NIC rx queues */		struct sge_rxq rxq; / NIC rx queues */
struct sge_wrq ofld_txq; / TOE tx queues */		struct sge_ofld_txq ofld_txq; / TOE tx queues */
struct sge_ofld_rxq ofld_rxq; / TOE rx queues */		struct sge_ofld_rxq ofld_rxq; / TOE rx queues */
struct sge_nm_txq nm_txq; / netmap tx queues */		struct sge_nm_txq nm_txq; / netmap tx queues */
struct sge_nm_rxq nm_rxq; / netmap rx queues */		struct sge_nm_rxq nm_rxq; / netmap rx queues */

uint16_t iq_start; /* first cntxt_id */		uint16_t iq_start; /* first cntxt_id */
uint16_t iq_base; /* first abs_id */		uint16_t iq_base; /* first abs_id */
int eq_start; /* first cntxt_id */		int eq_start; /* first cntxt_id */
int eq_base; /* first abs_id */		int eq_base; /* first abs_id */
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