Differential D3838 Diff 9648 head/sys/dev/usb/wlan/if_urtwnreg.h

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head/sys/dev/usb/wlan/if_urtwnreg.h

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	#define R92C_BIST_ROM_RPT 0x0d8			#define R92C_BIST_ROM_RPT 0x0d8
	#define R92C_USB_SIE_INTF 0x0e0			#define R92C_USB_SIE_INTF 0x0e0
	#define R92C_PCIE_MIO_INTF 0x0e4			#define R92C_PCIE_MIO_INTF 0x0e4
	#define R92C_PCIE_MIO_INTD 0x0e8			#define R92C_PCIE_MIO_INTD 0x0e8
	#define R92C_HPON_FSM 0x0ec			#define R92C_HPON_FSM 0x0ec
	#define R92C_SYS_CFG 0x0f0			#define R92C_SYS_CFG 0x0f0
	/* MAC General Configuration. */			/* MAC General Configuration. */
	#define R92C_CR 0x100			#define R92C_CR 0x100
				#define R92C_MSR 0x102
	#define R92C_PBP 0x104			#define R92C_PBP 0x104
	#define R92C_TRXDMA_CTRL 0x10c			#define R92C_TRXDMA_CTRL 0x10c
	#define R92C_TRXFF_BNDY 0x114			#define R92C_TRXFF_BNDY 0x114
	#define R92C_TRXFF_STATUS 0x118			#define R92C_TRXFF_STATUS 0x118
	#define R92C_RXFF_PTR 0x11c			#define R92C_RXFF_PTR 0x11c
	#define R92C_HIMR 0x120			#define R92C_HIMR 0x120
	#define R92C_HISR 0x124			#define R92C_HISR 0x124
	#define R92C_HIMRE 0x128			#define R92C_HIMRE 0x128
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	#define R92C_SYS_CFG_PAD_HWPD_IDN 0x00400000			#define R92C_SYS_CFG_PAD_HWPD_IDN 0x00400000
	#define R92C_SYS_CFG_TRP_VAUX_EN 0x00800000			#define R92C_SYS_CFG_TRP_VAUX_EN 0x00800000
	#define R92C_SYS_CFG_TRP_BT_EN 0x01000000			#define R92C_SYS_CFG_TRP_BT_EN 0x01000000
	#define R92C_SYS_CFG_BD_PKG_SEL 0x02000000			#define R92C_SYS_CFG_BD_PKG_SEL 0x02000000
	#define R92C_SYS_CFG_BD_HCI_SEL 0x04000000			#define R92C_SYS_CFG_BD_HCI_SEL 0x04000000
	#define R92C_SYS_CFG_TYPE_92C 0x08000000			#define R92C_SYS_CFG_TYPE_92C 0x08000000

	/* Bits for R92C_CR. */			/* Bits for R92C_CR. */
	#define R92C_CR_HCI_TXDMA_EN 0x00000001			#define R92C_CR_HCI_TXDMA_EN 0x0001
	#define R92C_CR_HCI_RXDMA_EN 0x00000002			#define R92C_CR_HCI_RXDMA_EN 0x0002
	#define R92C_CR_TXDMA_EN 0x00000004			#define R92C_CR_TXDMA_EN 0x0004
	#define R92C_CR_RXDMA_EN 0x00000008			#define R92C_CR_RXDMA_EN 0x0008
	#define R92C_CR_PROTOCOL_EN 0x00000010			#define R92C_CR_PROTOCOL_EN 0x0010
	#define R92C_CR_SCHEDULE_EN 0x00000020			#define R92C_CR_SCHEDULE_EN 0x0020
	#define R92C_CR_MACTXEN 0x00000040			#define R92C_CR_MACTXEN 0x0040
	#define R92C_CR_MACRXEN 0x00000080			#define R92C_CR_MACRXEN 0x0080
	#define R92C_CR_ENSEC 0x00000200			#define R92C_CR_ENSEC 0x0200
	#define R92C_CR_CALTMR_EN 0x00000400			#define R92C_CR_CALTMR_EN 0x0400
	#define R92C_CR_NETTYPE_S 16
	#define R92C_CR_NETTYPE_M 0x00030000			/* Bits for R92C_MSR. */
	#define R92C_CR_NETTYPE_NOLINK 0			#define R92C_MSR_NOLINK 0x00
	#define R92C_CR_NETTYPE_ADHOC 1			#define R92C_MSR_ADHOC 0x01
	#define R92C_CR_NETTYPE_INFRA 2			#define R92C_MSR_INFRA 0x02
	#define R92C_CR_NETTYPE_AP 3			#define R92C_MSR_AP 0x03
				#define R92C_MSR_MASK (R92C_MSR_AP)

	/* Bits for R92C_PBP. */			/* Bits for R92C_PBP. */
	#define R92C_PBP_PSRX_M 0x0f			#define R92C_PBP_PSRX_M 0x0f
	#define R92C_PBP_PSRX_S 0			#define R92C_PBP_PSRX_S 0
	#define R92C_PBP_PSTX_M 0xf0			#define R92C_PBP_PSTX_M 0xf0
	#define R92C_PBP_PSTX_S 4			#define R92C_PBP_PSTX_S 4
	#define R92C_PBP_64 0			#define R92C_PBP_64 0
	#define R92C_PBP_128 1			#define R92C_PBP_128 1
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