Differential D27186 Diff 79452 head/usr.sbin/bhyve/pci_emul.c

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head/usr.sbin/bhyve/pci_emul.c

Show First 20 Lines • Show All 448 Lines • ▼ Show 20 Lines	pci_emul_alloc_resource(uint64_t *baseptr, uint64_t limit, uint64_t size,
if (base + size <= limit) {		if (base + size <= limit) {
*addr = base;		*addr = base;
*baseptr = base + size;		*baseptr = base + size;
return (0);		return (0);
} else		} else
return (-1);		return (-1);
}		}

int
pci_emul_alloc_bar(struct pci_devinst *pdi, int idx, enum pcibar_type type,
uint64_t size)
{

return (pci_emul_alloc_pbar(pdi, idx, 0, type, size));
}

/*		/*
* Register (or unregister) the MMIO or I/O region associated with the BAR		* Register (or unregister) the MMIO or I/O region associated with the BAR
* register 'idx' of an emulated pci device.		* register 'idx' of an emulated pci device.
*/		*/
static void		static void
modify_bar_registration(struct pci_devinst *pi, int idx, int registration)		modify_bar_registration(struct pci_devinst *pi, int idx, int registration)
{		{
int error;		int error;
▲ Show 20 Lines • Show All 108 Lines • ▼ Show 20 Lines	default:
assert(0);		assert(0);
}		}

if (decode)		if (decode)
register_bar(pi, idx);		register_bar(pi, idx);
}		}

int		int
pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, uint64_t hostbase,		pci_emul_alloc_bar(struct pci_devinst *pdi, int idx, enum pcibar_type type,
enum pcibar_type type, uint64_t size)		uint64_t size)
{		{
int error;		int error;
uint64_t *baseptr, limit, addr, mask, lobits, bar;		uint64_t *baseptr, limit, addr, mask, lobits, bar;
uint16_t cmd, enbit;		uint16_t cmd, enbit;

assert(idx >= 0 && idx <= PCI_BARMAX);		assert(idx >= 0 && idx <= PCI_BARMAX);

if ((size & (size - 1)) != 0)		if ((size & (size - 1)) != 0)
Show All 24 Lines	case PCIBAR_MEM64:
/*		/*
* XXX		* XXX
* Some drivers do not work well if the 64-bit BAR is allocated		* Some drivers do not work well if the 64-bit BAR is allocated
* above 4GB. Allow for this by allocating small requests under		* above 4GB. Allow for this by allocating small requests under
* 4GB unless then allocation size is larger than some arbitrary		* 4GB unless then allocation size is larger than some arbitrary
* number (128MB currently).		* number (128MB currently).
*/		*/
if (size > 128 * 1024 * 1024) {		if (size > 128 * 1024 * 1024) {
/*
* XXX special case for device requiring peer-peer DMA
*/
if (size == 0x100000000UL)
baseptr = &hostbase;
else
baseptr = &pci_emul_membase64;		baseptr = &pci_emul_membase64;
limit = pci_emul_memlim64;		limit = pci_emul_memlim64;
mask = PCIM_BAR_MEM_BASE;		mask = PCIM_BAR_MEM_BASE;
lobits = PCIM_BAR_MEM_SPACE \| PCIM_BAR_MEM_64 \|		lobits = PCIM_BAR_MEM_SPACE \| PCIM_BAR_MEM_64 \|
PCIM_BAR_MEM_PREFETCH;		PCIM_BAR_MEM_PREFETCH;
} else {		} else {
baseptr = &pci_emul_membase32;		baseptr = &pci_emul_membase32;
limit = PCI_EMUL_MEMLIMIT32;		limit = PCI_EMUL_MEMLIMIT32;
mask = PCIM_BAR_MEM_BASE;		mask = PCIM_BAR_MEM_BASE;
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