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Differential D24522 Diff 70932 head/contrib/jemalloc/include/jemalloc/internal/atomic_gcc_sync.h

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head/contrib/jemalloc/include/jemalloc/internal/atomic_gcc_sync.h

Show All 21 Lines if (mo == atomic_memory_order_seq_cst) {
asm volatile("" ::: "memory"); asm volatile("" ::: "memory");
__sync_synchronize(); __sync_synchronize();
asm volatile("" ::: "memory"); asm volatile("" ::: "memory");
return; return;
} }
asm volatile("" ::: "memory"); asm volatile("" ::: "memory");
# if defined(__i386__) || defined(__x86_64__) # if defined(__i386__) || defined(__x86_64__)
/* This is implicit on x86. */ /* This is implicit on x86. */
# elif defined(__ppc__) # elif defined(__ppc64__)
asm volatile("lwsync"); asm volatile("lwsync");
# elif defined(__ppc__)
asm volatile("sync");
# elif defined(__sparc__) && defined(__arch64__) # elif defined(__sparc__) && defined(__arch64__)
if (mo == atomic_memory_order_acquire) { if (mo == atomic_memory_order_acquire) {
asm volatile("membar #LoadLoad | #LoadStore"); asm volatile("membar #LoadLoad | #LoadStore");
} else if (mo == atomic_memory_order_release) { } else if (mo == atomic_memory_order_release) {
asm volatile("membar #LoadStore | #StoreStore"); asm volatile("membar #LoadStore | #StoreStore");
} else { } else {
asm volatile("membar #LoadLoad | #LoadStore | #StoreStore"); asm volatile("membar #LoadLoad | #LoadStore | #StoreStore");
} }
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Linesatomic_store_##short_type(atomic_##short_type##_t *a, \
} \ } \
a->repr = val; \ a->repr = val; \
if (mo == atomic_memory_order_seq_cst) { \ if (mo == atomic_memory_order_seq_cst) { \
atomic_post_sc_store_fence(); \ atomic_post_sc_store_fence(); \
} \ } \
} \ } \
\ \
ATOMIC_INLINE type \ ATOMIC_INLINE type \
atomic_exchange_##short_type(atomic_##short_type##_t *a, type val, \ atomic_exchange_##short_type(atomic_##short_type##_t *a, type val, \
atomic_memory_order_t mo) { \ atomic_memory_order_t mo) { \
/* \ /* \
* Because of FreeBSD, we care about gcc 4.2, which doesn't have\ * Because of FreeBSD, we care about gcc 4.2, which doesn't have\
* an atomic exchange builtin. We fake it with a CAS loop. \ * an atomic exchange builtin. We fake it with a CAS loop. \
*/ \ */ \
while (true) { \ while (true) { \
type old = a->repr; \ type old = a->repr; \
if (__sync_bool_compare_and_swap(&a->repr, old, val)) { \ if (__sync_bool_compare_and_swap(&a->repr, old, val)) { \
return old; \ return old; \
} \ } \
} \ } \
} \ } \
\ \
ATOMIC_INLINE bool \ ATOMIC_INLINE bool \
atomic_compare_exchange_weak_##short_type(atomic_##short_type##_t *a, \ atomic_compare_exchange_weak_##short_type(atomic_##short_type##_t *a, \
type *expected, type desired, atomic_memory_order_t success_mo, \ type *expected, type desired, \
atomic_memory_order_t success_mo, \
atomic_memory_order_t failure_mo) { \ atomic_memory_order_t failure_mo) { \
type prev = __sync_val_compare_and_swap(&a->repr, *expected, \ type prev = __sync_val_compare_and_swap(&a->repr, *expected, \
desired); \ desired); \
if (prev == *expected) { \ if (prev == *expected) { \
return true; \ return true; \
} else { \ } else { \
*expected = prev; \ *expected = prev; \
return false; \ return false; \
} \ } \
} \ } \
ATOMIC_INLINE bool \ ATOMIC_INLINE bool \
atomic_compare_exchange_strong_##short_type(atomic_##short_type##_t *a, \ atomic_compare_exchange_strong_##short_type(atomic_##short_type##_t *a, \
type *expected, type desired, atomic_memory_order_t success_mo, \ type *expected, type desired, \
atomic_memory_order_t success_mo, \
atomic_memory_order_t failure_mo) { \ atomic_memory_order_t failure_mo) { \
type prev = __sync_val_compare_and_swap(&a->repr, *expected, \ type prev = __sync_val_compare_and_swap(&a->repr, *expected, \
desired); \ desired); \
if (prev == *expected) { \ if (prev == *expected) { \
return true; \ return true; \
} else { \ } else { \
*expected = prev; \ *expected = prev; \
return false; \ return false; \
} \ } \
Show All 37 Lines