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	/*			/*
	* CACHE_LINE_SIZE is the compile-time maximum cache line size for an			* CACHE_LINE_SIZE is the compile-time maximum cache line size for an
	* architecture. It should be used with appropriate caution.			* architecture. It should be used with appropriate caution.
	*/			*/
	#define CACHE_LINE_SHIFT 7			#define CACHE_LINE_SHIFT 7
	#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)			#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)

	#define PAGE_SHIFT 12			#define PAGE_SHIFT 12
	#define PAGE_SIZE (1L << PAGE_SHIFT) /* Page size */			#define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */
	#define PAGE_MASK (PAGE_SIZE - 1)			#define PAGE_MASK (PAGE_SIZE - 1)
	#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))			#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))

	#define MAXPAGESIZES 1 /* maximum number of supported page sizes */			#define MAXPAGESIZES 1 /* maximum number of supported page sizes */

	#ifndef KSTACK_PAGES			#ifndef KSTACK_PAGES
	#ifdef __powerpc64__			#ifdef __powerpc64__
	#define KSTACK_PAGES 8 /* includes pcb */			#define KSTACK_PAGES 8 /* includes pcb */
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