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head/sys/arm64/arm64/gic_v3_var.h
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}; | }; | ||||
#define GIC_INTR_ISRC(sc, irq) (&sc->gic_irqs[irq].gi_isrc) | #define GIC_INTR_ISRC(sc, irq) (&sc->gic_irqs[irq].gi_isrc) | ||||
MALLOC_DECLARE(M_GIC_V3); | MALLOC_DECLARE(M_GIC_V3); | ||||
/* ivars */ | /* ivars */ | ||||
#define GICV3_IVAR_NIRQS 1000 | #define GICV3_IVAR_NIRQS 1000 | ||||
#define GICV3_IVAR_REDIST_VADDR 1001 | /* 1001 was GICV3_IVAR_REDIST_VADDR */ | ||||
#define GICV3_IVAR_REDIST 1002 | #define GICV3_IVAR_REDIST 1002 | ||||
__BUS_ACCESSOR(gicv3, nirqs, GICV3, NIRQS, u_int); | __BUS_ACCESSOR(gicv3, nirqs, GICV3, NIRQS, u_int); | ||||
__BUS_ACCESSOR(gicv3, redist_vaddr, GICV3, REDIST_VADDR, void *); | |||||
__BUS_ACCESSOR(gicv3, redist, GICV3, REDIST, void *); | __BUS_ACCESSOR(gicv3, redist, GICV3, REDIST, void *); | ||||
/* Device methods */ | /* Device methods */ | ||||
int gic_v3_attach(device_t dev); | int gic_v3_attach(device_t dev); | ||||
int gic_v3_detach(device_t dev); | int gic_v3_detach(device_t dev); | ||||
int arm_gic_v3_intr(void *); | int arm_gic_v3_intr(void *); | ||||
uint32_t gic_r_read_4(device_t, bus_size_t); | uint32_t gic_r_read_4(device_t, bus_size_t); | ||||
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