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	/* Maximum DMA address for controllers that have 40bit DMA address bug. */			/* Maximum DMA address for controllers that have 40bit DMA address bug. */
	#if (BUS_SPACE_MAXADDR < 0xFFFFFFFFFF)			#if (BUS_SPACE_MAXADDR < 0xFFFFFFFFFF)
	#define BGE_DMA_MAXADDR BUS_SPACE_MAXADDR			#define BGE_DMA_MAXADDR BUS_SPACE_MAXADDR
	#else			#else
	#define BGE_DMA_MAXADDR 0xFFFFFFFFFF			#define BGE_DMA_MAXADDR 0xFFFFFFFFFF
	#endif			#endif

				#if (BUS_SPACE_MAXADDR > 0xFFFFFFFF)
				#define BGE_DMA_BNDRY 0x100000000
				#else
				#define BGE_DMA_BNDRY 0
				#endif

	/*			/*
	* Ring structures. Most of these reside in host memory and we tell			* Ring structures. Most of these reside in host memory and we tell
	* the NIC where they are via the ring control blocks. The exceptions			* the NIC where they are via the ring control blocks. The exceptions
	* are the tx and command rings, which live in NIC memory and which			* are the tx and command rings, which live in NIC memory and which
	* we access via the shared memory window.			* we access via the shared memory window.
	*/			*/

	struct bge_ring_data {			struct bge_ring_data {
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