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	#define SATA_AUX_MISC_CNTL 0x1108			#define SATA_AUX_MISC_CNTL 0x1108
	#define SATA_AUX_PAD_PLL_CTRL_0 0x1120			#define SATA_AUX_PAD_PLL_CTRL_0 0x1120
	#define SATA_AUX_PAD_PLL_CTRL_1 0x1124			#define SATA_AUX_PAD_PLL_CTRL_1 0x1124
	#define SATA_AUX_PAD_PLL_CTRL_2 0x1128			#define SATA_AUX_PAD_PLL_CTRL_2 0x1128
	#define SATA_AUX_PAD_PLL_CTRL_3 0x112c			#define SATA_AUX_PAD_PLL_CTRL_3 0x112c

	#define T_AHCI_HBA_CCC_PORTS 0x0018			#define T_AHCI_HBA_CCC_PORTS 0x0018
	#define T_AHCI_HBA_CAP_BKDR 0x00A0			#define T_AHCI_HBA_CAP_BKDR 0x00A0
	#define T_AHCI_HBA_CAP_BKDR_S64A (1 << 31)			#define T_AHCI_HBA_CAP_BKDR_S64A (1U << 31)
	#define T_AHCI_HBA_CAP_BKDR_SNCQ (1 << 30)			#define T_AHCI_HBA_CAP_BKDR_SNCQ (1 << 30)
	#define T_AHCI_HBA_CAP_BKDR_SSNTF (1 << 29)			#define T_AHCI_HBA_CAP_BKDR_SSNTF (1 << 29)
	#define T_AHCI_HBA_CAP_BKDR_SMPS (1 << 28)			#define T_AHCI_HBA_CAP_BKDR_SMPS (1 << 28)
	#define T_AHCI_HBA_CAP_BKDR_SUPP_STG_SPUP (1 << 27)			#define T_AHCI_HBA_CAP_BKDR_SUPP_STG_SPUP (1 << 27)
	#define T_AHCI_HBA_CAP_BKDR_SALP (1 << 26)			#define T_AHCI_HBA_CAP_BKDR_SALP (1 << 26)
	#define T_AHCI_HBA_CAP_BKDR_SAL (1 << 25)			#define T_AHCI_HBA_CAP_BKDR_SAL (1 << 25)
	#define T_AHCI_HBA_CAP_BKDR_SUPP_CLO (1 << 24)			#define T_AHCI_HBA_CAP_BKDR_SUPP_CLO (1 << 24)
	#define T_AHCI_HBA_CAP_BKDR_INTF_SPD_SUPP(x) (((x) & 0xF) << 20)			#define T_AHCI_HBA_CAP_BKDR_INTF_SPD_SUPP(x) (((x) & 0xF) << 20)
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