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sys/arm/allwinner/a10_fb.c
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#define DEBE_ATTCTL1 0x8a0 | #define DEBE_ATTCTL1 0x8a0 | ||||
#define ATTCTL1_FBFMT(fmt) ((fmt) << 8) | #define ATTCTL1_FBFMT(fmt) ((fmt) << 8) | ||||
#define FBFMT_XRGB8888 9 | #define FBFMT_XRGB8888 9 | ||||
#define ATTCTL1_FBPS(ps) ((ps) << 0) | #define ATTCTL1_FBPS(ps) ((ps) << 0) | ||||
#define FBPS_32BPP_ARGB 0 | #define FBPS_32BPP_ARGB 0 | ||||
/* Timing controller */ | /* Timing controller */ | ||||
#define TCON_GCTL 0x000 | #define TCON_GCTL 0x000 | ||||
#define GCTL_TCON_EN (1 << 31) | #define GCTL_TCON_EN (1U << 31) | ||||
#define GCTL_IO_MAP_SEL_TCON1 (1 << 0) | #define GCTL_IO_MAP_SEL_TCON1 (1 << 0) | ||||
#define TCON_GINT1 0x008 | #define TCON_GINT1 0x008 | ||||
#define GINT1_TCON1_LINENO(n) (((n) + 2) << 0) | #define GINT1_TCON1_LINENO(n) (((n) + 2) << 0) | ||||
#define TCON0_DCLK 0x044 | #define TCON0_DCLK 0x044 | ||||
#define DCLK_EN 0xf0000000 | #define DCLK_EN 0xf0000000 | ||||
#define TCON1_CTL 0x090 | #define TCON1_CTL 0x090 | ||||
#define TCON1_EN (1 << 31) | #define TCON1_EN (1U << 31) | ||||
#define INTERLACE_EN (1 << 20) | #define INTERLACE_EN (1 << 20) | ||||
#define TCON1_SRC_SEL(src) ((src) << 0) | #define TCON1_SRC_SEL(src) ((src) << 0) | ||||
#define TCON1_SRC_CH1 0 | #define TCON1_SRC_CH1 0 | ||||
#define TCON1_SRC_CH2 1 | #define TCON1_SRC_CH2 1 | ||||
#define TCON1_SRC_BLUE 2 | #define TCON1_SRC_BLUE 2 | ||||
#define TCON1_START_DELAY(sd) ((sd) << 4) | #define TCON1_START_DELAY(sd) ((sd) << 4) | ||||
#define TCON1_BASIC0 0x094 | #define TCON1_BASIC0 0x094 | ||||
#define TCON1_BASIC1 0x098 | #define TCON1_BASIC1 0x098 | ||||
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