Changeset View

Standalone View

	Show First 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
	#define HDSPE_PAGE_ADDR_BUF_OUT 8192			#define HDSPE_PAGE_ADDR_BUF_OUT 8192
	#define HDSPE_PAGE_ADDR_BUF_IN (HDSPE_PAGE_ADDR_BUF_OUT + 64 * 16 * 4)			#define HDSPE_PAGE_ADDR_BUF_IN (HDSPE_PAGE_ADDR_BUF_OUT + 64 * 16 * 4)
	#define HDSPE_BUF_POSITION_MASK 0x000FFC0			#define HDSPE_BUF_POSITION_MASK 0x000FFC0

	/* Frequency */			/* Frequency */
	#define HDSPE_FREQ_0 (1 << 6)			#define HDSPE_FREQ_0 (1 << 6)
	#define HDSPE_FREQ_1 (1 << 7)			#define HDSPE_FREQ_1 (1 << 7)
	#define HDSPE_FREQ_DOUBLE (1 << 8)			#define HDSPE_FREQ_DOUBLE (1 << 8)
	#define HDSPE_FREQ_QUAD (1 << 31)			#define HDSPE_FREQ_QUAD (1U << 31)

	#define HDSPE_FREQ_32000 HDSPE_FREQ_0			#define HDSPE_FREQ_32000 HDSPE_FREQ_0
	#define HDSPE_FREQ_44100 HDSPE_FREQ_1			#define HDSPE_FREQ_44100 HDSPE_FREQ_1
	#define HDSPE_FREQ_48000 (HDSPE_FREQ_0 \| HDSPE_FREQ_1)			#define HDSPE_FREQ_48000 (HDSPE_FREQ_0 \| HDSPE_FREQ_1)
	#define HDSPE_FREQ_MASK (HDSPE_FREQ_0 \| HDSPE_FREQ_1 \| \			#define HDSPE_FREQ_MASK (HDSPE_FREQ_0 \| HDSPE_FREQ_1 \| \
	HDSPE_FREQ_DOUBLE \| HDSPE_FREQ_QUAD)			HDSPE_FREQ_DOUBLE \| HDSPE_FREQ_QUAD)
	#define HDSPE_FREQ_MASK_DEFAULT HDSPE_FREQ_48000			#define HDSPE_FREQ_MASK_DEFAULT HDSPE_FREQ_48000
	#define HDSPE_FREQ_REG 256			#define HDSPE_FREQ_REG 256
	▲ Show 20 Lines • Show All 144 Lines • Show Last 20 Lines