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sys/arm/samsung/exynos/exynos5_xhci.c
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#define GCTL_SCALEDOWN_SHIFT 4 | #define GCTL_SCALEDOWN_SHIFT 4 | ||||
#define GCTL_DISSCRAMBLE (1 << 3) | #define GCTL_DISSCRAMBLE (1 << 3) | ||||
#define GCTL_DSBLCLKGTNG (1 << 0) | #define GCTL_DSBLCLKGTNG (1 << 0) | ||||
#define GHWPARAMS1 0x3c | #define GHWPARAMS1 0x3c | ||||
#define GHWPARAMS1_EN_PWROPT(n) (((n) & (3 << 24)) >> 24) | #define GHWPARAMS1_EN_PWROPT(n) (((n) & (3 << 24)) >> 24) | ||||
#define GHWPARAMS1_EN_PWROPT_NO 0 | #define GHWPARAMS1_EN_PWROPT_NO 0 | ||||
#define GHWPARAMS1_EN_PWROPT_CLK 1 | #define GHWPARAMS1_EN_PWROPT_CLK 1 | ||||
#define GUSB2PHYCFG(n) (0x100 + (n * 0x04)) | #define GUSB2PHYCFG(n) (0x100 + (n * 0x04)) | ||||
#define GUSB2PHYCFG_PHYSOFTRST (1 << 31) | #define GUSB2PHYCFG_PHYSOFTRST (1U << 31) | ||||
#define GUSB2PHYCFG_SUSPHY (1 << 6) | #define GUSB2PHYCFG_SUSPHY (1 << 6) | ||||
#define GUSB3PIPECTL(n) (0x1c0 + (n * 0x04)) | #define GUSB3PIPECTL(n) (0x1c0 + (n * 0x04)) | ||||
#define GUSB3PIPECTL_PHYSOFTRST (1 << 31) | #define GUSB3PIPECTL_PHYSOFTRST (1U << 31) | ||||
#define GUSB3PIPECTL_SUSPHY (1 << 17) | #define GUSB3PIPECTL_SUSPHY (1 << 17) | ||||
/* Forward declarations */ | /* Forward declarations */ | ||||
static device_attach_t exynos_xhci_attach; | static device_attach_t exynos_xhci_attach; | ||||
static device_detach_t exynos_xhci_detach; | static device_detach_t exynos_xhci_detach; | ||||
static device_probe_t exynos_xhci_probe; | static device_probe_t exynos_xhci_probe; | ||||
struct exynos_xhci_softc { | struct exynos_xhci_softc { | ||||
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