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sys/arm/nvidia/tegra124/tegra124_pmc.c
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#define PMC_REMOVE_CLAMPING_CMD 0x034 | #define PMC_REMOVE_CLAMPING_CMD 0x034 | ||||
#define PMC_REMOVE_CLAMPING_CMD_PARTID(x) (1 << ((x) & 0x1F)) | #define PMC_REMOVE_CLAMPING_CMD_PARTID(x) (1 << ((x) & 0x1F)) | ||||
#define PMC_PWRGATE_STATUS 0x038 | #define PMC_PWRGATE_STATUS 0x038 | ||||
#define PMC_PWRGATE_STATUS_PARTID(x) (1 << ((x) & 0x1F)) | #define PMC_PWRGATE_STATUS_PARTID(x) (1 << ((x) & 0x1F)) | ||||
#define PMC_SCRATCH0 0x050 | #define PMC_SCRATCH0 0x050 | ||||
#define PMC_SCRATCH0_MODE_RECOVERY (1 << 31) | #define PMC_SCRATCH0_MODE_RECOVERY (1U << 31) | ||||
#define PMC_SCRATCH0_MODE_BOOTLOADER (1 << 30) | #define PMC_SCRATCH0_MODE_BOOTLOADER (1 << 30) | ||||
#define PMC_SCRATCH0_MODE_RCM (1 << 1) | #define PMC_SCRATCH0_MODE_RCM (1 << 1) | ||||
#define PMC_SCRATCH0_MODE_MASK (PMC_SCRATCH0_MODE_RECOVERY | \ | #define PMC_SCRATCH0_MODE_MASK (PMC_SCRATCH0_MODE_RECOVERY | \ | ||||
PMC_SCRATCH0_MODE_BOOTLOADER | \ | PMC_SCRATCH0_MODE_BOOTLOADER | \ | ||||
PMC_SCRATCH0_MODE_RCM) | PMC_SCRATCH0_MODE_RCM) | ||||
#define PMC_CPUPWRGOOD_TIMER 0x0c8 | #define PMC_CPUPWRGOOD_TIMER 0x0c8 | ||||
#define PMC_CPUPWROFF_TIMER 0x0cc | #define PMC_CPUPWROFF_TIMER 0x0cc | ||||
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#define PMC_IO_DPD2_STATUS_HV (1 << 6) | #define PMC_IO_DPD2_STATUS_HV (1 << 6) | ||||
#define PMC_SEL_DPD_TIM 0x1c8 | #define PMC_SEL_DPD_TIM 0x1c8 | ||||
#define PMC_SCRATCH54 0x258 | #define PMC_SCRATCH54 0x258 | ||||
#define PMC_SCRATCH54_DATA_SHIFT 8 | #define PMC_SCRATCH54_DATA_SHIFT 8 | ||||
#define PMC_SCRATCH54_ADDR_SHIFT 0 | #define PMC_SCRATCH54_ADDR_SHIFT 0 | ||||
#define PMC_SCRATCH55 0x25c | #define PMC_SCRATCH55 0x25c | ||||
#define PMC_SCRATCH55_RST_ENABLE (1 << 31) | #define PMC_SCRATCH55_RST_ENABLE (1U << 31) | ||||
#define PMC_SCRATCH55_CNTRL_TYPE (1 << 30) | #define PMC_SCRATCH55_CNTRL_TYPE (1 << 30) | ||||
#define PMC_SCRATCH55_CNTRL_ID_SHIFT 27 | #define PMC_SCRATCH55_CNTRL_ID_SHIFT 27 | ||||
#define PMC_SCRATCH55_CNTRL_ID_MASK 0x07 | #define PMC_SCRATCH55_CNTRL_ID_MASK 0x07 | ||||
#define PMC_SCRATCH55_PINMUX_SHIFT 24 | #define PMC_SCRATCH55_PINMUX_SHIFT 24 | ||||
#define PMC_SCRATCH55_PINMUX_MASK 0x07 | #define PMC_SCRATCH55_PINMUX_MASK 0x07 | ||||
#define PMC_SCRATCH55_CHECKSUM_SHIFT 16 | #define PMC_SCRATCH55_CHECKSUM_SHIFT 16 | ||||
#define PMC_SCRATCH55_CHECKSUM_MASK 0xFF | #define PMC_SCRATCH55_CHECKSUM_MASK 0xFF | ||||
#define PMC_SCRATCH55_16BITOP (1 << 15) | #define PMC_SCRATCH55_16BITOP (1 << 15) | ||||
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