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sys/dev/hwpmc/hwpmc_intel.c
Show First 20 Lines • Show All 208 Lines • ▼ Show 20 Lines | case 0x45: /* Per Intel document 325462-045US 09/2014. */ | ||||
cputype = PMC_CPU_INTEL_HASWELL; | cputype = PMC_CPU_INTEL_HASWELL; | ||||
nclasses = 5; | nclasses = 5; | ||||
break; | break; | ||||
case 0x4D: /* Per Intel document 330061-001 01/2014. */ | case 0x4D: /* Per Intel document 330061-001 01/2014. */ | ||||
cputype = PMC_CPU_INTEL_ATOM_SILVERMONT; | cputype = PMC_CPU_INTEL_ATOM_SILVERMONT; | ||||
nclasses = 3; | nclasses = 3; | ||||
break; | break; | ||||
} | } | ||||
case 0x8E: /* Per Intel document 325462-063US July 2017. */ | |||||
case 0x9E: /* Per Intel document 325462-063US July 2017. */ | |||||
cputype = PMC_CPU_INTEL_KABYLAKE; | |||||
nclasses = 3; | |||||
break; | break; | ||||
break; | |||||
#if defined(__i386__) || defined(__amd64__) | #if defined(__i386__) || defined(__amd64__) | ||||
case 0xF00: /* P4 */ | case 0xF00: /* P4 */ | ||||
if (model >= 0 && model <= 6) /* known models */ | if (model >= 0 && model <= 6) /* known models */ | ||||
cputype = PMC_CPU_INTEL_PIV; | cputype = PMC_CPU_INTEL_PIV; | ||||
break; | break; | ||||
} | } | ||||
#endif | #endif | ||||
Show All 19 Lines | #if defined(__i386__) || defined(__amd64__) | ||||
* Intel Core, Core 2 and Atom processors. | * Intel Core, Core 2 and Atom processors. | ||||
*/ | */ | ||||
case PMC_CPU_INTEL_ATOM: | case PMC_CPU_INTEL_ATOM: | ||||
case PMC_CPU_INTEL_ATOM_SILVERMONT: | case PMC_CPU_INTEL_ATOM_SILVERMONT: | ||||
case PMC_CPU_INTEL_BROADWELL: | case PMC_CPU_INTEL_BROADWELL: | ||||
case PMC_CPU_INTEL_BROADWELL_XEON: | case PMC_CPU_INTEL_BROADWELL_XEON: | ||||
case PMC_CPU_INTEL_SKYLAKE_XEON: | case PMC_CPU_INTEL_SKYLAKE_XEON: | ||||
case PMC_CPU_INTEL_SKYLAKE: | case PMC_CPU_INTEL_SKYLAKE: | ||||
case PMC_CPU_INTEL_KABYLAKE: | |||||
case PMC_CPU_INTEL_CORE: | case PMC_CPU_INTEL_CORE: | ||||
case PMC_CPU_INTEL_CORE2: | case PMC_CPU_INTEL_CORE2: | ||||
case PMC_CPU_INTEL_CORE2EXTREME: | case PMC_CPU_INTEL_CORE2EXTREME: | ||||
case PMC_CPU_INTEL_COREI7: | case PMC_CPU_INTEL_COREI7: | ||||
case PMC_CPU_INTEL_NEHALEM_EX: | case PMC_CPU_INTEL_NEHALEM_EX: | ||||
case PMC_CPU_INTEL_IVYBRIDGE: | case PMC_CPU_INTEL_IVYBRIDGE: | ||||
case PMC_CPU_INTEL_SANDYBRIDGE: | case PMC_CPU_INTEL_SANDYBRIDGE: | ||||
case PMC_CPU_INTEL_WESTMERE: | case PMC_CPU_INTEL_WESTMERE: | ||||
▲ Show 20 Lines • Show All 81 Lines • ▼ Show 20 Lines | pmc_intel_finalize(struct pmc_mdep *md) | ||||
switch (md->pmd_cputype) { | switch (md->pmd_cputype) { | ||||
#if defined(__i386__) || defined(__amd64__) | #if defined(__i386__) || defined(__amd64__) | ||||
case PMC_CPU_INTEL_ATOM: | case PMC_CPU_INTEL_ATOM: | ||||
case PMC_CPU_INTEL_ATOM_SILVERMONT: | case PMC_CPU_INTEL_ATOM_SILVERMONT: | ||||
case PMC_CPU_INTEL_BROADWELL: | case PMC_CPU_INTEL_BROADWELL: | ||||
case PMC_CPU_INTEL_BROADWELL_XEON: | case PMC_CPU_INTEL_BROADWELL_XEON: | ||||
case PMC_CPU_INTEL_SKYLAKE_XEON: | case PMC_CPU_INTEL_SKYLAKE_XEON: | ||||
case PMC_CPU_INTEL_SKYLAKE: | case PMC_CPU_INTEL_SKYLAKE: | ||||
case PMC_CPU_INTEL_KABYLAKE: | |||||
case PMC_CPU_INTEL_CORE: | case PMC_CPU_INTEL_CORE: | ||||
case PMC_CPU_INTEL_CORE2: | case PMC_CPU_INTEL_CORE2: | ||||
case PMC_CPU_INTEL_CORE2EXTREME: | case PMC_CPU_INTEL_CORE2EXTREME: | ||||
case PMC_CPU_INTEL_COREI7: | case PMC_CPU_INTEL_COREI7: | ||||
case PMC_CPU_INTEL_NEHALEM_EX: | case PMC_CPU_INTEL_NEHALEM_EX: | ||||
case PMC_CPU_INTEL_HASWELL: | case PMC_CPU_INTEL_HASWELL: | ||||
case PMC_CPU_INTEL_HASWELL_XEON: | case PMC_CPU_INTEL_HASWELL_XEON: | ||||
case PMC_CPU_INTEL_IVYBRIDGE: | case PMC_CPU_INTEL_IVYBRIDGE: | ||||
▲ Show 20 Lines • Show All 45 Lines • Show Last 20 Lines |