Differential D12221 Diff 32725 head/lib/libpmc/libpmc.c

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head/lib/libpmc/libpmc.c

Show First 20 Lines • Show All 226 Lines • ▼ Show 20 Lines	static const struct pmc_event_descr broadwell_xeon_event_table[] =
__PMC_EV_ALIAS_BROADWELL_XEON()		__PMC_EV_ALIAS_BROADWELL_XEON()
};		};

static const struct pmc_event_descr skylake_event_table[] =		static const struct pmc_event_descr skylake_event_table[] =
{		{
__PMC_EV_ALIAS_SKYLAKE()		__PMC_EV_ALIAS_SKYLAKE()
};		};

		static const struct pmc_event_descr skylake_xeon_event_table[] =
		{
		__PMC_EV_ALIAS_SKYLAKE_XEON()
		};

static const struct pmc_event_descr ivybridge_event_table[] =		static const struct pmc_event_descr ivybridge_event_table[] =
{		{
__PMC_EV_ALIAS_IVYBRIDGE()		__PMC_EV_ALIAS_IVYBRIDGE()
};		};

static const struct pmc_event_descr ivybridge_xeon_event_table[] =		static const struct pmc_event_descr ivybridge_xeon_event_table[] =
{		{
__PMC_EV_ALIAS_IVYBRIDGE_XEON()		__PMC_EV_ALIAS_IVYBRIDGE_XEON()
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PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);		PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
PMC_MDEP_TABLE(corei7, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);		PMC_MDEP_TABLE(corei7, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
PMC_MDEP_TABLE(nehalem_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);		PMC_MDEP_TABLE(nehalem_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
PMC_MDEP_TABLE(haswell, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);		PMC_MDEP_TABLE(haswell, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
PMC_MDEP_TABLE(haswell_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);		PMC_MDEP_TABLE(haswell_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
PMC_MDEP_TABLE(broadwell, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);		PMC_MDEP_TABLE(broadwell, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
PMC_MDEP_TABLE(broadwell_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);		PMC_MDEP_TABLE(broadwell_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
PMC_MDEP_TABLE(skylake, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);		PMC_MDEP_TABLE(skylake, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
		PMC_MDEP_TABLE(skylake_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
PMC_MDEP_TABLE(ivybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);		PMC_MDEP_TABLE(ivybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
PMC_MDEP_TABLE(ivybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);		PMC_MDEP_TABLE(ivybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
PMC_MDEP_TABLE(sandybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);		PMC_MDEP_TABLE(sandybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
PMC_MDEP_TABLE(sandybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);		PMC_MDEP_TABLE(sandybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);		PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
PMC_MDEP_TABLE(westmere_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);		PMC_MDEP_TABLE(westmere_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
PMC_MDEP_TABLE(k7, K7, PMC_CLASS_SOFT, PMC_CLASS_TSC);		PMC_MDEP_TABLE(k7, K7, PMC_CLASS_SOFT, PMC_CLASS_TSC);
PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC);		PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC);
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PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap);		PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap);
PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap);		PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap);
PMC_CLASS_TABLE_DESC(nehalem_ex, IAP, nehalem_ex, iap);		PMC_CLASS_TABLE_DESC(nehalem_ex, IAP, nehalem_ex, iap);
PMC_CLASS_TABLE_DESC(haswell, IAP, haswell, iap);		PMC_CLASS_TABLE_DESC(haswell, IAP, haswell, iap);
PMC_CLASS_TABLE_DESC(haswell_xeon, IAP, haswell_xeon, iap);		PMC_CLASS_TABLE_DESC(haswell_xeon, IAP, haswell_xeon, iap);
PMC_CLASS_TABLE_DESC(broadwell, IAP, broadwell, iap);		PMC_CLASS_TABLE_DESC(broadwell, IAP, broadwell, iap);
PMC_CLASS_TABLE_DESC(broadwell_xeon, IAP, broadwell_xeon, iap);		PMC_CLASS_TABLE_DESC(broadwell_xeon, IAP, broadwell_xeon, iap);
PMC_CLASS_TABLE_DESC(skylake, IAP, skylake, iap);		PMC_CLASS_TABLE_DESC(skylake, IAP, skylake, iap);
		PMC_CLASS_TABLE_DESC(skylake_xeon, IAP, skylake_xeon, iap);
PMC_CLASS_TABLE_DESC(ivybridge, IAP, ivybridge, iap);		PMC_CLASS_TABLE_DESC(ivybridge, IAP, ivybridge, iap);
PMC_CLASS_TABLE_DESC(ivybridge_xeon, IAP, ivybridge_xeon, iap);		PMC_CLASS_TABLE_DESC(ivybridge_xeon, IAP, ivybridge_xeon, iap);
PMC_CLASS_TABLE_DESC(sandybridge, IAP, sandybridge, iap);		PMC_CLASS_TABLE_DESC(sandybridge, IAP, sandybridge, iap);
PMC_CLASS_TABLE_DESC(sandybridge_xeon, IAP, sandybridge_xeon, iap);		PMC_CLASS_TABLE_DESC(sandybridge_xeon, IAP, sandybridge_xeon, iap);
PMC_CLASS_TABLE_DESC(westmere, IAP, westmere, iap);		PMC_CLASS_TABLE_DESC(westmere, IAP, westmere, iap);
PMC_CLASS_TABLE_DESC(westmere_ex, IAP, westmere_ex, iap);		PMC_CLASS_TABLE_DESC(westmere_ex, IAP, westmere_ex, iap);
PMC_CLASS_TABLE_DESC(ucf, UCF, ucf, ucf);		PMC_CLASS_TABLE_DESC(ucf, UCF, ucf, ucf);
PMC_CLASS_TABLE_DESC(corei7uc, UCP, corei7uc, ucp);		PMC_CLASS_TABLE_DESC(corei7uc, UCP, corei7uc, ucp);
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#define haswell_xeon_aliases core2_aliases		#define haswell_xeon_aliases core2_aliases
#define haswell_xeon_aliases_without_iaf core2_aliases_without_iaf		#define haswell_xeon_aliases_without_iaf core2_aliases_without_iaf
#define broadwell_aliases core2_aliases		#define broadwell_aliases core2_aliases
#define broadwell_aliases_without_iaf core2_aliases_without_iaf		#define broadwell_aliases_without_iaf core2_aliases_without_iaf
#define broadwell_xeon_aliases core2_aliases		#define broadwell_xeon_aliases core2_aliases
#define broadwell_xeon_aliases_without_iaf core2_aliases_without_iaf		#define broadwell_xeon_aliases_without_iaf core2_aliases_without_iaf
#define skylake_aliases core2_aliases		#define skylake_aliases core2_aliases
#define skylake_aliases_without_iaf core2_aliases_without_iaf		#define skylake_aliases_without_iaf core2_aliases_without_iaf
		#define skylake_xeon_aliases core2_aliases
		#define skylake_xeon_aliases_without_iaf core2_aliases_without_iaf
#define ivybridge_aliases core2_aliases		#define ivybridge_aliases core2_aliases
#define ivybridge_aliases_without_iaf core2_aliases_without_iaf		#define ivybridge_aliases_without_iaf core2_aliases_without_iaf
#define ivybridge_xeon_aliases core2_aliases		#define ivybridge_xeon_aliases core2_aliases
#define ivybridge_xeon_aliases_without_iaf core2_aliases_without_iaf		#define ivybridge_xeon_aliases_without_iaf core2_aliases_without_iaf
#define sandybridge_aliases core2_aliases		#define sandybridge_aliases core2_aliases
#define sandybridge_aliases_without_iaf core2_aliases_without_iaf		#define sandybridge_aliases_without_iaf core2_aliases_without_iaf
#define sandybridge_xeon_aliases core2_aliases		#define sandybridge_xeon_aliases core2_aliases
#define sandybridge_xeon_aliases_without_iaf core2_aliases_without_iaf		#define sandybridge_xeon_aliases_without_iaf core2_aliases_without_iaf
▲ Show 20 Lines • Show All 300 Lines • ▼ Show 20 Lines	while ((p = strsep(&ctrspec, ",")) != NULL) {
} else if (cpu_info.pm_cputype == PMC_CPU_INTEL_BROADWELL \|\|		} else if (cpu_info.pm_cputype == PMC_CPU_INTEL_BROADWELL \|\|
cpu_info.pm_cputype == PMC_CPU_INTEL_BROADWELL_XEON) {		cpu_info.pm_cputype == PMC_CPU_INTEL_BROADWELL_XEON) {
/* Broadwell is defined to use same mask as haswell */		/* Broadwell is defined to use same mask as haswell */
if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) {		if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) {
n = pmc_parse_mask(iap_rsp_mask_haswell, p, &rsp);		n = pmc_parse_mask(iap_rsp_mask_haswell, p, &rsp);
} else		} else
return (-1);		return (-1);

} else if (cpu_info.pm_cputype == PMC_CPU_INTEL_SKYLAKE) {		} else if (cpu_info.pm_cputype == PMC_CPU_INTEL_SKYLAKE \|\|
		cpu_info.pm_cputype == PMC_CPU_INTEL_SKYLAKE_XEON) {
if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) {		if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) {
n = pmc_parse_mask(iap_rsp_mask_skylake, p, &rsp);		n = pmc_parse_mask(iap_rsp_mask_skylake, p, &rsp);
} else		} else
return (-1);		return (-1);

} else		} else
return (-1);		return (-1);

▲ Show 20 Lines • Show All 1,953 Lines • ▼ Show 20 Lines	case PMC_CLASS_IAP:
case PMC_CPU_INTEL_BROADWELL_XEON:		case PMC_CPU_INTEL_BROADWELL_XEON:
ev = broadwell_xeon_event_table;		ev = broadwell_xeon_event_table;
count = PMC_EVENT_TABLE_SIZE(broadwell_xeon);		count = PMC_EVENT_TABLE_SIZE(broadwell_xeon);
break;		break;
case PMC_CPU_INTEL_SKYLAKE:		case PMC_CPU_INTEL_SKYLAKE:
ev = skylake_event_table;		ev = skylake_event_table;
count = PMC_EVENT_TABLE_SIZE(skylake);		count = PMC_EVENT_TABLE_SIZE(skylake);
break;		break;
		case PMC_CPU_INTEL_SKYLAKE_XEON:
		ev = skylake_xeon_event_table;
		count = PMC_EVENT_TABLE_SIZE(skylake_xeon);
		break;
case PMC_CPU_INTEL_IVYBRIDGE:		case PMC_CPU_INTEL_IVYBRIDGE:
ev = ivybridge_event_table;		ev = ivybridge_event_table;
count = PMC_EVENT_TABLE_SIZE(ivybridge);		count = PMC_EVENT_TABLE_SIZE(ivybridge);
break;		break;
case PMC_CPU_INTEL_IVYBRIDGE_XEON:		case PMC_CPU_INTEL_IVYBRIDGE_XEON:
ev = ivybridge_xeon_event_table;		ev = ivybridge_xeon_event_table;
count = PMC_EVENT_TABLE_SIZE(ivybridge_xeon);		count = PMC_EVENT_TABLE_SIZE(ivybridge_xeon);
break;		break;
▲ Show 20 Lines • Show All 363 Lines • ▼ Show 20 Lines	case PMC_CPU_INTEL_BROADWELL:
PMC_MDEP_INIT_INTEL_V2(broadwell);		PMC_MDEP_INIT_INTEL_V2(broadwell);
break;		break;
case PMC_CPU_INTEL_BROADWELL_XEON:		case PMC_CPU_INTEL_BROADWELL_XEON:
PMC_MDEP_INIT_INTEL_V2(broadwell_xeon);		PMC_MDEP_INIT_INTEL_V2(broadwell_xeon);
break;		break;
case PMC_CPU_INTEL_SKYLAKE:		case PMC_CPU_INTEL_SKYLAKE:
PMC_MDEP_INIT_INTEL_V2(skylake);		PMC_MDEP_INIT_INTEL_V2(skylake);
break;		break;
		case PMC_CPU_INTEL_SKYLAKE_XEON:
		PMC_MDEP_INIT_INTEL_V2(skylake_xeon);
		break;
case PMC_CPU_INTEL_IVYBRIDGE:		case PMC_CPU_INTEL_IVYBRIDGE:
PMC_MDEP_INIT_INTEL_V2(ivybridge);		PMC_MDEP_INIT_INTEL_V2(ivybridge);
break;		break;
case PMC_CPU_INTEL_IVYBRIDGE_XEON:		case PMC_CPU_INTEL_IVYBRIDGE_XEON:
PMC_MDEP_INIT_INTEL_V2(ivybridge_xeon);		PMC_MDEP_INIT_INTEL_V2(ivybridge_xeon);
break;		break;
case PMC_CPU_INTEL_SANDYBRIDGE:		case PMC_CPU_INTEL_SANDYBRIDGE:
pmc_class_table[n++] = &ucf_class_table_descr;		pmc_class_table[n++] = &ucf_class_table_descr;
▲ Show 20 Lines • Show All 195 Lines • ▼ Show 20 Lines	if (pe >= PMC_EV_IAF_FIRST && pe <= PMC_EV_IAF_LAST) {
case PMC_CPU_INTEL_BROADWELL_XEON:		case PMC_CPU_INTEL_BROADWELL_XEON:
ev = broadwell_xeon_event_table;		ev = broadwell_xeon_event_table;
evfence = broadwell_xeon_event_table + PMC_EVENT_TABLE_SIZE(broadwell_xeon);		evfence = broadwell_xeon_event_table + PMC_EVENT_TABLE_SIZE(broadwell_xeon);
break;		break;
case PMC_CPU_INTEL_SKYLAKE:		case PMC_CPU_INTEL_SKYLAKE:
ev = skylake_event_table;		ev = skylake_event_table;
evfence = skylake_event_table +		evfence = skylake_event_table +
PMC_EVENT_TABLE_SIZE(skylake);		PMC_EVENT_TABLE_SIZE(skylake);
		break;
		case PMC_CPU_INTEL_SKYLAKE_XEON:
		ev = skylake_xeon_event_table;
		evfence = skylake_xeon_event_table +
		PMC_EVENT_TABLE_SIZE(skylake_xeon);
break;		break;
case PMC_CPU_INTEL_IVYBRIDGE:		case PMC_CPU_INTEL_IVYBRIDGE:
ev = ivybridge_event_table;		ev = ivybridge_event_table;
evfence = ivybridge_event_table + PMC_EVENT_TABLE_SIZE(ivybridge);		evfence = ivybridge_event_table + PMC_EVENT_TABLE_SIZE(ivybridge);
break;		break;
case PMC_CPU_INTEL_IVYBRIDGE_XEON:		case PMC_CPU_INTEL_IVYBRIDGE_XEON:
ev = ivybridge_xeon_event_table;		ev = ivybridge_xeon_event_table;
evfence = ivybridge_xeon_event_table + PMC_EVENT_TABLE_SIZE(ivybridge_xeon);		evfence = ivybridge_xeon_event_table + PMC_EVENT_TABLE_SIZE(ivybridge_xeon);
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