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sys/dev/ixl/ixl.h
/****************************************************************************** | /****************************************************************************** | ||||
Copyright (c) 2013-2015, Intel Corporation | Copyright (c) 2013-2016, Intel Corporation | ||||
All rights reserved. | All rights reserved. | ||||
Redistribution and use in source and binary forms, with or without | Redistribution and use in source and binary forms, with or without | ||||
modification, are permitted provided that the following conditions are met: | modification, are permitted provided that the following conditions are met: | ||||
1. Redistributions of source code must retain the above copyright notice, | 1. Redistributions of source code must retain the above copyright notice, | ||||
this list of conditions and the following disclaimer. | this list of conditions and the following disclaimer. | ||||
Show All 15 Lines | /****************************************************************************** | ||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | ||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||||
POSSIBILITY OF SUCH DAMAGE. | POSSIBILITY OF SUCH DAMAGE. | ||||
******************************************************************************/ | ******************************************************************************/ | ||||
/*$FreeBSD$*/ | /*$FreeBSD$*/ | ||||
#ifndef _IFLIB_IXL_H_ | |||||
#define _IFLIB_IXL_H_ | |||||
#ifndef _IXL_H_ | |||||
#define _IXL_H_ | |||||
#include "opt_inet.h" | |||||
#include "opt_inet6.h" | |||||
#include "opt_rss.h" | |||||
#include "opt_ixl.h" | |||||
#include <sys/param.h> | #include <sys/param.h> | ||||
#include <sys/systm.h> | #include <sys/systm.h> | ||||
#include <sys/buf_ring.h> | #include <sys/buf_ring.h> | ||||
#include <sys/mbuf.h> | #include <sys/mbuf.h> | ||||
#include <sys/protosw.h> | #include <sys/protosw.h> | ||||
#include <sys/socket.h> | #include <sys/socket.h> | ||||
#include <sys/malloc.h> | #include <sys/malloc.h> | ||||
#include <sys/kernel.h> | #include <sys/kernel.h> | ||||
#include <sys/module.h> | #include <sys/module.h> | ||||
#include <sys/sockio.h> | #include <sys/sockio.h> | ||||
#include <sys/eventhandler.h> | #include <sys/eventhandler.h> | ||||
#include <sys/syslog.h> | |||||
#include <net/if.h> | #include <net/if.h> | ||||
#include <net/if_var.h> | #include <net/if_var.h> | ||||
#include <net/if_arp.h> | #include <net/if_arp.h> | ||||
#include <net/bpf.h> | #include <net/bpf.h> | ||||
#include <net/ethernet.h> | #include <net/ethernet.h> | ||||
#include <net/if_dl.h> | #include <net/if_dl.h> | ||||
#include <net/if_media.h> | #include <net/if_media.h> | ||||
#include <net/iflib.h> | |||||
#include <net/bpf.h> | #include <net/bpf.h> | ||||
#include <net/if_types.h> | #include <net/if_types.h> | ||||
#include <net/if_vlan_var.h> | #include <net/if_vlan_var.h> | ||||
#include <netinet/in_systm.h> | #include <netinet/in_systm.h> | ||||
#include <netinet/in.h> | #include <netinet/in.h> | ||||
#include <netinet/if_ether.h> | #include <netinet/if_ether.h> | ||||
Show All 25 Lines | |||||
#include <machine/smp.h> | #include <machine/smp.h> | ||||
#include <machine/stdarg.h> | #include <machine/stdarg.h> | ||||
#ifdef RSS | #ifdef RSS | ||||
#include <net/rss_config.h> | #include <net/rss_config.h> | ||||
#include <netinet/in_rss.h> | #include <netinet/in_rss.h> | ||||
#endif | #endif | ||||
#include "ifdi_if.h" | |||||
#include "i40e_type.h" | #include "i40e_type.h" | ||||
#include "i40e_prototype.h" | #include "i40e_prototype.h" | ||||
#include "ixl_debug.h" | |||||
#define MAC_FORMAT "%02x:%02x:%02x:%02x:%02x:%02x" | |||||
#define MAC_FORMAT_ARGS(mac_addr) \ | |||||
(mac_addr)[0], (mac_addr)[1], (mac_addr)[2], (mac_addr)[3], \ | |||||
(mac_addr)[4], (mac_addr)[5] | |||||
#define ON_OFF_STR(is_set) ((is_set) ? "On" : "Off") | |||||
#ifdef IXL_DEBUG | |||||
#define _DBG_PRINTF(S, ...) printf("%s: " S "\n", __func__, ##__VA_ARGS__) | |||||
#define _DEV_DBG_PRINTF(dev, S, ...) device_printf(dev, "%s: " S "\n", __func__, ##__VA_ARGS__) | |||||
#define _IF_DBG_PRINTF(ifp, S, ...) if_printf(ifp, "%s: " S "\n", __func__, ##__VA_ARGS__) | |||||
/* Defines for printing generic debug information */ | |||||
#define DPRINTF(...) _DBG_PRINTF(__VA_ARGS__) | |||||
#define DDPRINTF(...) _DEV_DBG_PRINTF(__VA_ARGS__) | |||||
#define IDPRINTF(...) _IF_DBG_PRINTF(__VA_ARGS__) | |||||
/* Defines for printing specific debug information */ | |||||
#define DEBUG_INIT 1 | |||||
#define DEBUG_IOCTL 1 | |||||
#define DEBUG_HW 1 | |||||
#define INIT_DEBUGOUT(...) if (DEBUG_INIT) _DBG_PRINTF(__VA_ARGS__) | |||||
#define INIT_DBG_DEV(...) if (DEBUG_INIT) _DEV_DBG_PRINTF(__VA_ARGS__) | |||||
#define INIT_DBG_IF(...) if (DEBUG_INIT) _IF_DBG_PRINTF(__VA_ARGS__) | |||||
#define IOCTL_DEBUGOUT(...) if (DEBUG_IOCTL) _DBG_PRINTF(__VA_ARGS__) | |||||
#define IOCTL_DBG_IF2(ifp, S, ...) if (DEBUG_IOCTL) \ | |||||
if_printf(ifp, S "\n", ##__VA_ARGS__) | |||||
#define IOCTL_DBG_IF(...) if (DEBUG_IOCTL) _IF_DBG_PRINTF(__VA_ARGS__) | |||||
#define HW_DEBUGOUT(...) if (DEBUG_HW) _DBG_PRINTF(__VA_ARGS__) | |||||
#else /* no IXL_DEBUG */ | |||||
#define DEBUG_INIT 0 | |||||
#define DEBUG_IOCTL 0 | |||||
#define DEBUG_HW 0 | |||||
#define DPRINTF(...) | |||||
#define DDPRINTF(...) | |||||
#define IDPRINTF(...) | |||||
#define INIT_DEBUGOUT(...) | |||||
#define INIT_DBG_DEV(...) | |||||
#define INIT_DBG_IF(...) | |||||
#define IOCTL_DEBUGOUT(...) | |||||
#define IOCTL_DBG_IF2(...) | |||||
#define IOCTL_DBG_IF(...) | |||||
#define HW_DEBUGOUT(...) | |||||
#endif /* IXL_DEBUG */ | |||||
enum ixl_dbg_mask { | |||||
IXL_DBG_INFO = 0x00000001, | |||||
IXL_DBG_EN_DIS = 0x00000002, | |||||
IXL_DBG_AQ = 0x00000004, | |||||
IXL_DBG_NVMUPD = 0x00000008, | |||||
IXL_DBG_IOCTL_KNOWN = 0x00000010, | |||||
IXL_DBG_IOCTL_UNKNOWN = 0x00000020, | |||||
IXL_DBG_IOCTL_ALL = 0x00000030, | |||||
I40E_DEBUG_RSS = 0x00000100, | |||||
IXL_DBG_IOV = 0x00001000, | |||||
IXL_DBG_IOV_VC = 0x00002000, | |||||
IXL_DBG_SWITCH_INFO = 0x00010000, | |||||
IXL_DBG_I2C = 0x00020000, | |||||
IXL_DBG_ALL = 0xFFFFFFFF | |||||
}; | |||||
/* Tunables */ | /* Tunables */ | ||||
/* | /* | ||||
* Ring Descriptors Valid Range: 32-4096 Default Value: 1024 This value is the | * Ring Descriptors Valid Range: 32-4096 Default Value: 1024 This value is the | ||||
* number of tx/rx descriptors allocated by the driver. Increasing this | * number of tx/rx descriptors allocated by the driver. Increasing this | ||||
* value allows the driver to queue more operations. | * value allows the driver to queue more operations. | ||||
* | * | ||||
* Tx descriptors are always 16 bytes, but Rx descriptors can be 32 bytes. | * Tx descriptors are always 16 bytes, but Rx descriptors can be 32 bytes. | ||||
* The driver currently always uses 32 byte Rx descriptors. | * The driver currently always uses 32 byte Rx descriptors. | ||||
*/ | */ | ||||
#define IXL_DEFAULT_RING 1024 | #define DEFAULT_RING 1024 | ||||
#define IXL_MAX_RING 8160 | #define IXL_MAX_RING 8160 | ||||
#define IXL_MIN_RING 32 | #define IXL_MIN_RING 32 | ||||
#define IXL_RING_INCREMENT 32 | #define IXL_RING_INCREMENT 32 | ||||
#define IXL_AQ_LEN 256 | #define IXL_AQ_LEN 256 | ||||
#define IXL_AQ_LEN_MAX 1024 | #define IXL_AQ_LEN_MAX 1024 | ||||
/* | /* | ||||
Show All 17 Lines | |||||
*/ | */ | ||||
#define IXL_TX_CLEANUP_THRESHOLD (que->num_desc / 8) | #define IXL_TX_CLEANUP_THRESHOLD (que->num_desc / 8) | ||||
#define IXL_TX_OP_THRESHOLD (que->num_desc / 32) | #define IXL_TX_OP_THRESHOLD (que->num_desc / 32) | ||||
#define MAX_MULTICAST_ADDR 128 | #define MAX_MULTICAST_ADDR 128 | ||||
#define IXL_MSIX_BAR 3 | #define IXL_MSIX_BAR 3 | ||||
#define IXL_ADM_LIMIT 2 | #define IXL_ADM_LIMIT 2 | ||||
#define IXL_TSO_SIZE 65535 | // TODO: Find out which TSO_SIZE to use | ||||
//#define IXL_TSO_SIZE 65535 | |||||
#define IXL_TSO_SIZE ((255*1024)-1) | |||||
#define IXL_TX_BUF_SZ ((u32) 1514) | |||||
#define IXL_AQ_BUF_SZ ((u32) 4096) | #define IXL_AQ_BUF_SZ ((u32) 4096) | ||||
#define IXL_RX_HDR 128 | #define IXL_RX_HDR 128 | ||||
#define IXL_RX_LIMIT 512 | #define IXL_RX_LIMIT 512 | ||||
#define IXL_RX_ITR 0 | #define IXL_RX_ITR 0 | ||||
#define IXL_TX_ITR 1 | #define IXL_TX_ITR 1 | ||||
#define IXL_ITR_NONE 3 | #define IXL_ITR_NONE 3 | ||||
#define IXL_QUEUE_EOL 0x7FF | #define IXL_QUEUE_EOL 0x7FF | ||||
#define IXL_MAX_FRAME 9728 | #define IXL_MAX_FRAME 9728 | ||||
#define IXL_MAX_TX_SEGS 8 | #define IXL_MAX_TX_SEGS 8 | ||||
#define IXL_MAX_TSO_SEGS 128 | #define IXL_MAX_TSO_SEGS 128 | ||||
#define IXL_SPARSE_CHAIN 6 | #define IXL_SPARSE_CHAIN 6 | ||||
#define IXL_QUEUE_HUNG 0x80000000 | #define IXL_QUEUE_HUNG 0x80000000 | ||||
#define IXL_MIN_TSO_MSS 64 | |||||
#define IXL_RSS_KEY_SIZE_REG 13 | #define IXL_RSS_KEY_SIZE_REG 13 | ||||
#define IXL_RSS_KEY_SIZE (IXL_RSS_KEY_SIZE_REG * 4) | #define IXL_RSS_KEY_SIZE (IXL_RSS_KEY_SIZE_REG * 4) | ||||
#define IXL_RSS_VSI_LUT_SIZE 64 /* X722 -> VSI, X710 -> VF */ | #define IXL_RSS_VSI_LUT_SIZE 64 /* X722 -> VSI, X710 -> VF */ | ||||
#define IXL_RSS_VSI_LUT_ENTRY_MASK 0x3F | #define IXL_RSS_VSI_LUT_ENTRY_MASK 0x3F | ||||
#define IXL_RSS_VF_LUT_ENTRY_MASK 0xF | #define IXL_RSS_VF_LUT_ENTRY_MASK 0xF | ||||
#define IXL_VF_MAX_BUFFER 0x3F80 | #define IXL_VF_MAX_BUFFER 0x3F80 | ||||
#define IXL_VF_MAX_HDR_BUFFER 0x840 | #define IXL_VF_MAX_HDR_BUFFER 0x840 | ||||
#define IXL_VF_MAX_FRAME 0x3FFF | #define IXL_VF_MAX_FRAME 0x3FFF | ||||
/* ERJ: hardware can support ~2k (SW5+) filters between all functions */ | /* ERJ: hardware can support ~2k (SW5+) filters between all functions */ | ||||
#define IXL_MAX_FILTERS 256 | #define IXL_MAX_FILTERS 256 | ||||
#define IXL_MAX_TX_BUSY 10 | #define IXL_MAX_TX_BUSY 10 | ||||
#define IXL_NVM_VERSION_LO_SHIFT 0 | #define IXL_NVM_VERSION_LO_SHIFT 0 | ||||
#define IXL_NVM_VERSION_LO_MASK (0xff << IXL_NVM_VERSION_LO_SHIFT) | #define IXL_NVM_VERSION_LO_MASK (0xff << IXL_NVM_VERSION_LO_SHIFT) | ||||
#define IXL_NVM_VERSION_HI_SHIFT 12 | #define IXL_NVM_VERSION_HI_SHIFT 12 | ||||
#define IXL_NVM_VERSION_HI_MASK (0xf << IXL_NVM_VERSION_HI_SHIFT) | #define IXL_NVM_VERSION_HI_MASK (0xf << IXL_NVM_VERSION_HI_SHIFT) | ||||
/* | /* | ||||
* Interrupt Moderation parameters | * Interrupt Moderation parameters | ||||
* Multiply ITR values by 2 for real ITR value | |||||
*/ | */ | ||||
#define IXL_MAX_ITR 0x0FF0 | #define IXL_MAX_ITR 0x07FF | ||||
#define IXL_ITR_100K 0x0005 | #define IXL_ITR_100K 0x0005 | ||||
#define IXL_ITR_20K 0x0019 | #define IXL_ITR_20K 0x0019 | ||||
#define IXL_ITR_8K 0x003E | #define IXL_ITR_8K 0x003E | ||||
#define IXL_ITR_4K 0x007A | #define IXL_ITR_4K 0x007A | ||||
#define IXL_ITR_1K 0x01F4 | |||||
#define IXL_ITR_DYNAMIC 0x8000 | #define IXL_ITR_DYNAMIC 0x8000 | ||||
#define IXL_LOW_LATENCY 0 | #define IXL_LOW_LATENCY 0 | ||||
#define IXL_AVE_LATENCY 1 | #define IXL_AVE_LATENCY 1 | ||||
#define IXL_BULK_LATENCY 2 | #define IXL_BULK_LATENCY 2 | ||||
/* MacVlan Flags */ | /* MacVlan Flags */ | ||||
#define IXL_FILTER_USED (u16)(1 << 0) | #define IXL_FILTER_USED (u16)(1 << 0) | ||||
#define IXL_FILTER_VLAN (u16)(1 << 1) | #define IXL_FILTER_VLAN (u16)(1 << 1) | ||||
Show All 36 Lines | |||||
#define IXL_GLGEN_VFLRSTAT_INDEX(glb_vf) ((glb_vf) / 32) | #define IXL_GLGEN_VFLRSTAT_INDEX(glb_vf) ((glb_vf) / 32) | ||||
#define IXL_GLGEN_VFLRSTAT_MASK(glb_vf) (1 << ((glb_vf) % 32)) | #define IXL_GLGEN_VFLRSTAT_MASK(glb_vf) (1 << ((glb_vf) % 32)) | ||||
#define IXL_MAX_ITR_IDX 3 | #define IXL_MAX_ITR_IDX 3 | ||||
#define IXL_END_OF_INTR_LNKLST 0x7FF | #define IXL_END_OF_INTR_LNKLST 0x7FF | ||||
#define IXL_DEFAULT_RSS_HENA_BASE (\ | #define IXL_DEFAULT_RSS_HENA (\ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \ | BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \ | BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \ | ||||
BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD)) | BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD)) | ||||
#define IXL_DEFAULT_RSS_HENA_XL710 IXL_DEFAULT_RSS_HENA_BASE | #define IXL_CAPS \ | ||||
(IFCAP_TSO4 | IFCAP_TSO6 | IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \ | |||||
IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | IFCAP_HWCSUM | \ | |||||
IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO | \ | |||||
IFCAP_VLAN_MTU | IFCAP_HWCSUM_IPV6 | IFCAP_JUMBO_MTU | IFCAP_LRO) | |||||
#define IXL_DEFAULT_RSS_HENA_X722 (\ | #if 0 | ||||
IXL_DEFAULT_RSS_HENA_BASE | \ | |||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \ | |||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \ | |||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \ | |||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | \ | |||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \ | |||||
BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK)) | |||||
#define IXL_TX_LOCK(_sc) mtx_lock(&(_sc)->mtx) | #define IXL_TX_LOCK(_sc) mtx_lock(&(_sc)->mtx) | ||||
#define IXL_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) | #define IXL_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) | ||||
#define IXL_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) | #define IXL_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) | ||||
#define IXL_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->mtx) | #define IXL_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->mtx) | ||||
#define IXL_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) | #define IXL_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) | ||||
#define IXL_RX_LOCK(_sc) mtx_lock(&(_sc)->mtx) | #define IXL_RX_LOCK(_sc) mtx_lock(&(_sc)->mtx) | ||||
#define IXL_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) | #define IXL_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) | ||||
#define IXL_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) | #define IXL_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) | ||||
#endif | |||||
/* Pre-11 counter(9) compatibility */ | /* Pre-11 counter(9) compatibility */ | ||||
#if __FreeBSD_version >= 1100036 | #if __FreeBSD_version >= 1100036 | ||||
#define IXL_SET_IPACKETS(vsi, count) (vsi)->ipackets = (count) | #define IXL_SET_IPACKETS(vsi, count) (vsi)->ipackets = (count) | ||||
#define IXL_SET_IERRORS(vsi, count) (vsi)->ierrors = (count) | #define IXL_SET_IERRORS(vsi, count) (vsi)->ierrors = (count) | ||||
#define IXL_SET_OPACKETS(vsi, count) (vsi)->opackets = (count) | #define IXL_SET_OPACKETS(vsi, count) (vsi)->opackets = (count) | ||||
#define IXL_SET_OERRORS(vsi, count) (vsi)->oerrors = (count) | #define IXL_SET_OERRORS(vsi, count) (vsi)->oerrors = (count) | ||||
#define IXL_SET_COLLISIONS(vsi, count) /* Do nothing; collisions is always 0. */ | #define IXL_SET_COLLISIONS(vsi, count) /* Do nothing; collisions is always 0. */ | ||||
Show All 31 Lines | |||||
typedef struct _ixl_vendor_info_t { | typedef struct _ixl_vendor_info_t { | ||||
unsigned int vendor_id; | unsigned int vendor_id; | ||||
unsigned int device_id; | unsigned int device_id; | ||||
unsigned int subvendor_id; | unsigned int subvendor_id; | ||||
unsigned int subdevice_id; | unsigned int subdevice_id; | ||||
unsigned int index; | unsigned int index; | ||||
} ixl_vendor_info_t; | } ixl_vendor_info_t; | ||||
struct ixl_tx_buf { | |||||
u32 eop_index; | |||||
struct mbuf *m_head; | |||||
bus_dmamap_t map; | |||||
bus_dma_tag_t tag; | |||||
}; | |||||
struct ixl_rx_buf { | |||||
struct mbuf *m_head; | |||||
struct mbuf *m_pack; | |||||
struct mbuf *fmp; | |||||
bus_dmamap_t hmap; | |||||
bus_dmamap_t pmap; | |||||
}; | |||||
/* | /* | ||||
** This struct has multiple uses, multicast | ** This struct has multiple uses, multicast | ||||
** addresses, vlans, and mac filters all use it. | ** addresses, vlans, and mac filters all use it. | ||||
*/ | */ | ||||
struct ixl_mac_filter { | struct ixl_mac_filter { | ||||
SLIST_ENTRY(ixl_mac_filter) next; | SLIST_ENTRY(ixl_mac_filter) next; | ||||
u8 macaddr[ETHER_ADDR_LEN]; | u8 macaddr[ETHER_ADDR_LEN]; | ||||
s16 vlan; | s16 vlan; | ||||
u16 flags; | u16 flags; | ||||
}; | }; | ||||
/* | /* | ||||
* The Transmit ring control struct | * The Transmit ring control struct | ||||
*/ | */ | ||||
struct tx_ring { | struct tx_ring { | ||||
struct ixl_queue *que; | struct ixl_tx_queue *que; | ||||
struct mtx mtx; | |||||
u32 tail; | u32 tail; | ||||
struct i40e_tx_desc *base; | struct i40e_tx_desc *tx_base; | ||||
struct i40e_dma_mem dma; | |||||
u16 next_avail; | u16 next_avail; | ||||
u16 next_to_clean; | u64 tx_paddr; | ||||
u16 atr_rate; | u16 atr_rate; | ||||
u16 atr_count; | u16 atr_count; | ||||
u32 itr; | u32 itr; | ||||
u32 latency; | u32 latency; | ||||
struct ixl_tx_buf *buffers; | u32 me; | ||||
volatile u16 avail; | |||||
u32 cmd; | |||||
bus_dma_tag_t tx_tag; | |||||
bus_dma_tag_t tso_tag; | |||||
char mtx_name[16]; | |||||
struct buf_ring *br; | |||||
s32 watchdog_timer; | |||||
/* Used for Dynamic ITR calculation */ | /* Used for Dynamic ITR calculation */ | ||||
u32 packets; | u32 packets; | ||||
u32 bytes; | u32 bytes; | ||||
/* Soft Stats */ | /* Soft Stats */ | ||||
u64 tx_bytes; | u64 tx_bytes; | ||||
u64 no_desc; | |||||
u64 total_packets; | u64 total_packets; | ||||
}; | }; | ||||
/* | /* | ||||
* The Receive ring control struct | * The Receive ring control struct | ||||
*/ | */ | ||||
struct rx_ring { | struct rx_ring { | ||||
struct ixl_queue *que; | struct ixl_rx_queue *que; | ||||
struct mtx mtx; | union i40e_rx_desc *rx_base; | ||||
union i40e_rx_desc *base; | uint64_t rx_paddr; | ||||
struct i40e_dma_mem dma; | |||||
struct lro_ctrl lro; | |||||
bool lro_enabled; | |||||
bool hdr_split; | |||||
bool discard; | bool discard; | ||||
u32 next_refresh; | |||||
u32 next_check; | |||||
u32 itr; | u32 itr; | ||||
u32 latency; | u32 latency; | ||||
char mtx_name[16]; | |||||
struct ixl_rx_buf *buffers; | |||||
u32 mbuf_sz; | u32 mbuf_sz; | ||||
u32 tail; | u32 tail; | ||||
bus_dma_tag_t htag; | u32 me; | ||||
bus_dma_tag_t ptag; | |||||
/* Used for Dynamic ITR calculation */ | /* Used for Dynamic ITR calculation */ | ||||
u32 packets; | u32 packets; | ||||
u32 bytes; | u32 bytes; | ||||
/* Soft stats */ | /* Soft stats */ | ||||
// TODO: Remove since no header split | |||||
u64 split; | u64 split; | ||||
u64 rx_packets; | u64 rx_packets; | ||||
u64 rx_bytes; | u64 rx_bytes; | ||||
// TODO: Change to discarded? | |||||
u64 desc_errs; | u64 desc_errs; | ||||
u64 not_done; | |||||
}; | }; | ||||
/* | /* | ||||
** Driver queue struct: this is the interrupt container | ** Driver queue structs | ||||
** for the associated tx and rx ring pair. | // TODO: Add to this comment? | ||||
*/ | */ | ||||
struct ixl_queue { | struct ixl_tx_queue { | ||||
struct ixl_vsi *vsi; | struct ixl_vsi *vsi; | ||||
u32 me; | // TODO: Maybe this needs to get removed | ||||
u32 msix; /* This queue's MSIX vector */ | int busy; | ||||
u32 eims; /* This queue's EIMS bit */ | |||||
struct resource *res; | |||||
void *tag; | |||||
int num_desc; /* both tx and rx */ | |||||
struct tx_ring txr; | struct tx_ring txr; | ||||
struct rx_ring rxr; | /* Stats */ | ||||
struct task task; | |||||
struct task tx_task; | |||||
struct taskqueue *tq; | |||||
/* Queue stats */ | |||||
u64 irqs; | u64 irqs; | ||||
u64 tso; | u64 tso; | ||||
u64 mbuf_defrag_failed; | |||||
u64 mbuf_hdr_failed; | |||||
u64 mbuf_pkt_failed; | |||||
u64 tx_dmamap_failed; | |||||
u64 dropped_pkts; | |||||
u64 mss_too_small; | |||||
}; | }; | ||||
struct ixl_rx_queue { | |||||
struct ixl_vsi *vsi; | |||||
u32 msix; /* This queue's MSIX vector */ | |||||
u32 eims; // TODO: Change var name; there is no EIMS in fortville | |||||
struct rx_ring rxr; | |||||
struct if_irq que_irq; // TODO: Add comment | |||||
/* Stats */ | |||||
u64 irqs; | |||||
}; | |||||
#define DOWNCAST(sctx) ((struct ixl_vsi *)(sctx)) // TODO: Check if ixgbe has something similar | |||||
/* | /* | ||||
** Virtual Station Interface | ** Virtual Station Interface | ||||
*/ | */ | ||||
SLIST_HEAD(ixl_ftl_head, ixl_mac_filter); | SLIST_HEAD(ixl_ftl_head, ixl_mac_filter); | ||||
struct ixl_vsi { | struct ixl_vsi { | ||||
void *back; | if_ctx_t ctx; | ||||
if_softc_ctx_t shared; | |||||
struct ifnet *ifp; | struct ifnet *ifp; | ||||
device_t dev; | struct ifmedia *media; | ||||
// TODO: I don't like these defines | |||||
#define num_rx_queues shared->isc_nrxqsets | |||||
#define num_tx_queues shared->isc_ntxqsets | |||||
// This conflicts with a shared code struct definition | |||||
// #define max_frame_size shared->isc_max_frame_size | |||||
void *back; | |||||
struct i40e_hw *hw; | struct i40e_hw *hw; | ||||
struct ifmedia media; | // TODO: Remove? | ||||
enum i40e_vsi_type type; | u64 que_mask; | ||||
int id; | int id; | ||||
u16 num_queues; | u16 vsi_num; | ||||
// TODO: Replace | |||||
u16 msix_base; /* station base MSIX vector */ | |||||
// TODO: Replace | |||||
u16 first_queue; /* station base MSIX vector */ | |||||
u32 rx_itr_setting; | u32 rx_itr_setting; | ||||
u32 tx_itr_setting; | u32 tx_itr_setting; | ||||
u16 max_frame_size; | struct ixl_tx_queue *tx_queues; /* TX queue array */ | ||||
struct ixl_rx_queue *rx_queues; /* RX queue array */ | |||||
struct ixl_queue *queues; /* head of queues */ | |||||
u16 vsi_num; | |||||
bool link_active; | bool link_active; | ||||
u16 seid; | u16 seid; | ||||
u32 link_speed; | |||||
struct if_irq irq; // TODO: Comment | |||||
u16 uplink_seid; | u16 uplink_seid; | ||||
u16 downlink_seid; | u16 downlink_seid; | ||||
/* MAC/VLAN Filter list */ | /* MAC/VLAN Filter list */ | ||||
struct ixl_ftl_head ftl; | struct ixl_ftl_head ftl; | ||||
u16 num_macs; | u16 num_macs; | ||||
/* Contains readylist & stat counter id */ | /* Contains readylist & stat counter id */ | ||||
struct i40e_aqc_vsi_properties_data info; | struct i40e_aqc_vsi_properties_data info; | ||||
eventhandler_tag vlan_attach; | |||||
eventhandler_tag vlan_detach; | |||||
u16 num_vlans; | u16 num_vlans; | ||||
// TODO: Maybe these things should get their own struct | |||||
/* Per-VSI stats from hardware */ | /* Per-VSI stats from hardware */ | ||||
struct i40e_eth_stats eth_stats; | struct i40e_eth_stats eth_stats; | ||||
struct i40e_eth_stats eth_stats_offsets; | struct i40e_eth_stats eth_stats_offsets; | ||||
bool stat_offsets_loaded; | bool stat_offsets_loaded; | ||||
/* VSI stat counters */ | /* VSI stat counters */ | ||||
u64 ipackets; | u64 ipackets; | ||||
u64 ierrors; | u64 ierrors; | ||||
u64 opackets; | u64 opackets; | ||||
u64 oerrors; | u64 oerrors; | ||||
u64 ibytes; | u64 ibytes; | ||||
u64 obytes; | u64 obytes; | ||||
u64 imcasts; | u64 imcasts; | ||||
u64 omcasts; | u64 omcasts; | ||||
u64 iqdrops; | u64 iqdrops; | ||||
u64 oqdrops; | u64 oqdrops; | ||||
u64 noproto; | u64 noproto; | ||||
/* Driver statistics */ | /* Driver statistics */ | ||||
u64 hw_filters_del; | u64 hw_filters_del; | ||||
u64 hw_filters_add; | u64 hw_filters_add; | ||||
/* Misc. */ | /* Misc. */ | ||||
u64 active_queues; | |||||
u64 flags; | u64 flags; | ||||
struct sysctl_oid *vsi_node; | struct sysctl_oid *vsi_node; // TODO: Comment? | ||||
}; | }; | ||||
/* | /* | ||||
** Find the number of unrefreshed RX descriptors | |||||
*/ | |||||
static inline u16 | |||||
ixl_rx_unrefreshed(struct ixl_queue *que) | |||||
{ | |||||
struct rx_ring *rxr = &que->rxr; | |||||
if (rxr->next_check > rxr->next_refresh) | |||||
return (rxr->next_check - rxr->next_refresh - 1); | |||||
else | |||||
return ((que->num_desc + rxr->next_check) - | |||||
rxr->next_refresh - 1); | |||||
} | |||||
/* | |||||
** Find the next available unused filter | ** Find the next available unused filter | ||||
*/ | */ | ||||
static inline struct ixl_mac_filter * | static inline struct ixl_mac_filter * | ||||
ixl_get_filter(struct ixl_vsi *vsi) | ixl_get_filter(struct ixl_vsi *vsi) | ||||
{ | { | ||||
struct ixl_mac_filter *f; | struct ixl_mac_filter *f; | ||||
/* create a new empty filter */ | /* create a new empty filter */ | ||||
f = malloc(sizeof(struct ixl_mac_filter), | f = malloc(sizeof(struct ixl_mac_filter), | ||||
M_DEVBUF, M_NOWAIT | M_ZERO); | M_DEVBUF, M_NOWAIT | M_ZERO); | ||||
if (f) | if (f) | ||||
SLIST_INSERT_HEAD(&vsi->ftl, f, next); | SLIST_INSERT_HEAD(&vsi->ftl, f, next); | ||||
return (f); | return (f); | ||||
} | } | ||||
/* | /* | ||||
** Compare two ethernet addresses | ** Compare two ethernet addresses | ||||
*/ | */ | ||||
static inline bool | static inline bool | ||||
cmp_etheraddr(const u8 *ea1, const u8 *ea2) | cmp_etheraddr(const u8 *ea1, const u8 *ea2) | ||||
{ | { | ||||
bool cmp = FALSE; | return (bcmp(ea1, ea2, 6) == 0); | ||||
if ((ea1[0] == ea2[0]) && (ea1[1] == ea2[1]) && | |||||
(ea1[2] == ea2[2]) && (ea1[3] == ea2[3]) && | |||||
(ea1[4] == ea2[4]) && (ea1[5] == ea2[5])) | |||||
cmp = TRUE; | |||||
return (cmp); | |||||
} | } | ||||
/* | /* | ||||
* Return next largest power of 2, unsigned | * Return next largest power of 2, unsigned | ||||
* | * | ||||
* Public domain, from Bit Twiddling Hacks | * Public domain, from Bit Twiddling Hacks | ||||
*/ | */ | ||||
static inline u32 | static inline u32 | ||||
Show All 17 Lines | |||||
* Info for stats sysctls | * Info for stats sysctls | ||||
*/ | */ | ||||
struct ixl_sysctl_info { | struct ixl_sysctl_info { | ||||
u64 *stat; | u64 *stat; | ||||
char *name; | char *name; | ||||
char *description; | char *description; | ||||
}; | }; | ||||
static uint8_t ixl_bcast_addr[ETHER_ADDR_LEN] = | |||||
{0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; | |||||
/********************************************************************* | /********************************************************************* | ||||
* TXRX Function prototypes | * TXRX Function prototypes | ||||
*********************************************************************/ | *********************************************************************/ | ||||
int ixl_allocate_tx_data(struct ixl_queue *); | |||||
int ixl_allocate_rx_data(struct ixl_queue *); | |||||
void ixl_init_tx_ring(struct ixl_queue *); | |||||
int ixl_init_rx_ring(struct ixl_queue *); | |||||
bool ixl_rxeof(struct ixl_queue *, int); | |||||
bool ixl_txeof(struct ixl_queue *); | |||||
void ixl_free_que_tx(struct ixl_queue *); | |||||
void ixl_free_que_rx(struct ixl_queue *); | |||||
int ixl_mq_start(struct ifnet *, struct mbuf *); | int ixl_mq_start(struct ifnet *, struct mbuf *); | ||||
int ixl_mq_start_locked(struct ifnet *, struct tx_ring *); | int ixl_mq_start_locked(struct ifnet *, struct tx_ring *); | ||||
void ixl_deferred_mq_start(void *, int); | void ixl_deferred_mq_start(void *, int); | ||||
void ixl_free_vsi(struct ixl_vsi *); | void ixl_free_vsi(struct ixl_vsi *); | ||||
void ixl_qflush(struct ifnet *); | void ixl_qflush(struct ifnet *); | ||||
/********************************************************************* | |||||
* Common Function prototypes | |||||
*********************************************************************/ | |||||
/*** IFLIB interface ***/ | |||||
//int ixl_if_media_change(if_ctx_t ctx); | |||||
//static int ixl_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int ntxqs, int ntxqsets); | |||||
//static int ixl_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int nqs, int nqsets); | |||||
//void ixl_if_queues_free(if_ctx_t ctx); | |||||
/* Common function prototypes between PF/VF driver */ | /* Common function prototypes between PF/VF driver */ | ||||
#if __FreeBSD_version >= 1100000 | void ixl_init_tx_ring(struct ixl_vsi *vsi, struct ixl_tx_queue *que); | ||||
uint64_t ixl_get_counter(if_t ifp, ift_counter cnt); | void ixl_set_queue_rx_itr(struct ixl_rx_queue *que); | ||||
#if 0 | |||||
#if __FreeBSD_version >= 1020000 | |||||
static uint64_t ixl_if_get_counter(if_ctx_t ctx, ift_counter cnt); | |||||
#endif | #endif | ||||
#endif | |||||
void ixl_get_default_rss_key(u32 *); | void ixl_get_default_rss_key(u32 *); | ||||
#endif /* _IXL_H_ */ | #endif /* _IFLIB_IXL_H_ */ |