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sys/dev/ixl/i40e_nvm.c
Show First 20 Lines • Show All 214 Lines • ▼ Show 20 Lines | |||||
* | * | ||||
* Reads one 16 bit word from the Shadow RAM using the GLNVM_SRCTL register. | * Reads one 16 bit word from the Shadow RAM using the GLNVM_SRCTL register. | ||||
**/ | **/ | ||||
enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, | enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, | ||||
u16 *data) | u16 *data) | ||||
{ | { | ||||
enum i40e_status_code ret_code = I40E_SUCCESS; | enum i40e_status_code ret_code = I40E_SUCCESS; | ||||
if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) { | |||||
ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); | ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); | ||||
if (!ret_code) { | if (!ret_code) { | ||||
if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) { | |||||
ret_code = i40e_read_nvm_word_aq(hw, offset, data); | ret_code = i40e_read_nvm_word_aq(hw, offset, data); | ||||
i40e_release_nvm(hw); | |||||
} | |||||
} else { | } else { | ||||
ret_code = i40e_read_nvm_word_srctl(hw, offset, data); | ret_code = i40e_read_nvm_word_srctl(hw, offset, data); | ||||
} | } | ||||
i40e_release_nvm(hw); | |||||
} | |||||
return ret_code; | return ret_code; | ||||
} | } | ||||
/** | /** | ||||
* __i40e_read_nvm_word - Reads nvm word, assumes caller does the locking | * __i40e_read_nvm_word - Reads nvm word, assumes caller does the locking | ||||
* @hw: pointer to the HW structure | * @hw: pointer to the HW structure | ||||
* @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF) | * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF) | ||||
* @data: word read from the Shadow RAM | * @data: word read from the Shadow RAM | ||||
▲ Show 20 Lines • Show All 641 Lines • ▼ Show 20 Lines | if (upd_cmd == I40E_NVMUPD_STATUS) { | ||||
bytes[0] = hw->nvmupd_state; | bytes[0] = hw->nvmupd_state; | ||||
if (cmd->data_size >= 4) { | if (cmd->data_size >= 4) { | ||||
bytes[1] = 0; | bytes[1] = 0; | ||||
*((u16 *)&bytes[2]) = hw->nvm_wait_opcode; | *((u16 *)&bytes[2]) = hw->nvm_wait_opcode; | ||||
} | } | ||||
/* Clear error status on read */ | |||||
if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) | |||||
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; | |||||
return I40E_SUCCESS; | return I40E_SUCCESS; | ||||
} | } | ||||
/* Clear status even it is not read and log */ | |||||
if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) { | |||||
i40e_debug(hw, I40E_DEBUG_NVM, | |||||
"Clearing I40E_NVMUPD_STATE_ERROR state without reading\n"); | |||||
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; | |||||
} | |||||
switch (hw->nvmupd_state) { | switch (hw->nvmupd_state) { | ||||
case I40E_NVMUPD_STATE_INIT: | case I40E_NVMUPD_STATE_INIT: | ||||
status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno); | status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno); | ||||
break; | break; | ||||
case I40E_NVMUPD_STATE_READING: | case I40E_NVMUPD_STATE_READING: | ||||
status = i40e_nvmupd_state_reading(hw, cmd, bytes, perrno); | status = i40e_nvmupd_state_reading(hw, cmd, bytes, perrno); | ||||
break; | break; | ||||
▲ Show 20 Lines • Show All 342 Lines • ▼ Show 20 Lines | if (opcode == hw->nvm_wait_opcode) { | ||||
i40e_debug(hw, I40E_DEBUG_NVM, | i40e_debug(hw, I40E_DEBUG_NVM, | ||||
"NVMUPD: clearing wait on opcode 0x%04x\n", opcode); | "NVMUPD: clearing wait on opcode 0x%04x\n", opcode); | ||||
if (hw->nvm_release_on_done) { | if (hw->nvm_release_on_done) { | ||||
i40e_release_nvm(hw); | i40e_release_nvm(hw); | ||||
hw->nvm_release_on_done = FALSE; | hw->nvm_release_on_done = FALSE; | ||||
} | } | ||||
hw->nvm_wait_opcode = 0; | hw->nvm_wait_opcode = 0; | ||||
if (hw->aq.arq_last_status) { | |||||
hw->nvmupd_state = I40E_NVMUPD_STATE_ERROR; | |||||
return; | |||||
} | |||||
switch (hw->nvmupd_state) { | switch (hw->nvmupd_state) { | ||||
case I40E_NVMUPD_STATE_INIT_WAIT: | case I40E_NVMUPD_STATE_INIT_WAIT: | ||||
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; | hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; | ||||
break; | break; | ||||
case I40E_NVMUPD_STATE_WRITE_WAIT: | case I40E_NVMUPD_STATE_WRITE_WAIT: | ||||
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING; | hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING; | ||||
break; | break; | ||||
▲ Show 20 Lines • Show All 146 Lines • ▼ Show 20 Lines | if (!hw->nvm_buff.va) { | ||||
if (status) | if (status) | ||||
i40e_debug(hw, I40E_DEBUG_NVM, | i40e_debug(hw, I40E_DEBUG_NVM, | ||||
"NVMUPD: i40e_allocate_virt_mem for exec buff failed, %d\n", | "NVMUPD: i40e_allocate_virt_mem for exec buff failed, %d\n", | ||||
status); | status); | ||||
} | } | ||||
if (hw->nvm_buff.va) { | if (hw->nvm_buff.va) { | ||||
buff = hw->nvm_buff.va; | buff = hw->nvm_buff.va; | ||||
memcpy(buff, &bytes[aq_desc_len], aq_data_len); | i40e_memcpy(buff, &bytes[aq_desc_len], aq_data_len, | ||||
I40E_NONDMA_TO_NONDMA); | |||||
} | } | ||||
} | } | ||||
/* and away we go! */ | /* and away we go! */ | ||||
status = i40e_asq_send_command(hw, aq_desc, buff, | status = i40e_asq_send_command(hw, aq_desc, buff, | ||||
buff_size, &cmd_details); | buff_size, &cmd_details); | ||||
if (status) { | if (status) { | ||||
i40e_debug(hw, I40E_DEBUG_NVM, | i40e_debug(hw, I40E_DEBUG_NVM, | ||||
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines | static enum i40e_status_code i40e_nvmupd_get_aq_result(struct i40e_hw *hw, | ||||
if (cmd->offset < aq_desc_len) { | if (cmd->offset < aq_desc_len) { | ||||
u32 len = aq_desc_len - cmd->offset; | u32 len = aq_desc_len - cmd->offset; | ||||
len = min(len, cmd->data_size); | len = min(len, cmd->data_size); | ||||
i40e_debug(hw, I40E_DEBUG_NVM, "%s: aq_desc bytes %d to %d\n", | i40e_debug(hw, I40E_DEBUG_NVM, "%s: aq_desc bytes %d to %d\n", | ||||
__func__, cmd->offset, cmd->offset + len); | __func__, cmd->offset, cmd->offset + len); | ||||
buff = ((u8 *)&hw->nvm_wb_desc) + cmd->offset; | buff = ((u8 *)&hw->nvm_wb_desc) + cmd->offset; | ||||
memcpy(bytes, buff, len); | i40e_memcpy(bytes, buff, len, I40E_NONDMA_TO_NONDMA); | ||||
bytes += len; | bytes += len; | ||||
remainder -= len; | remainder -= len; | ||||
buff = hw->nvm_buff.va; | buff = hw->nvm_buff.va; | ||||
} else { | } else { | ||||
buff = (u8 *)hw->nvm_buff.va + (cmd->offset - aq_desc_len); | buff = (u8 *)hw->nvm_buff.va + (cmd->offset - aq_desc_len); | ||||
} | } | ||||
if (remainder > 0) { | if (remainder > 0) { | ||||
int start_byte = buff - (u8 *)hw->nvm_buff.va; | int start_byte = buff - (u8 *)hw->nvm_buff.va; | ||||
i40e_debug(hw, I40E_DEBUG_NVM, "%s: databuf bytes %d to %d\n", | i40e_debug(hw, I40E_DEBUG_NVM, "%s: databuf bytes %d to %d\n", | ||||
__func__, start_byte, start_byte + remainder); | __func__, start_byte, start_byte + remainder); | ||||
memcpy(bytes, buff, remainder); | i40e_memcpy(bytes, buff, remainder, I40E_NONDMA_TO_NONDMA); | ||||
} | } | ||||
return I40E_SUCCESS; | return I40E_SUCCESS; | ||||
} | } | ||||
/** | /** | ||||
* i40e_nvmupd_nvm_read - Read NVM | * i40e_nvmupd_nvm_read - Read NVM | ||||
* @hw: pointer to hardware structure | * @hw: pointer to hardware structure | ||||
▲ Show 20 Lines • Show All 116 Lines • Show Last 20 Lines |