Changeset View

Standalone View

Show First 20 Lines • Show All 1,014 Lines • ▼ Show 20 Lines	if (ntu == ntc) {
ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK;		ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK;
goto clean_arq_element_out;		goto clean_arq_element_out;
}		}

/* now clean the next descriptor */		/* now clean the next descriptor */
desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc);		desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc);
desc_idx = ntc;		desc_idx = ntc;

		hw->aq.arq_last_status =
		(enum i40e_admin_queue_err)LE16_TO_CPU(desc->retval);
flags = LE16_TO_CPU(desc->flags);		flags = LE16_TO_CPU(desc->flags);
if (flags & I40E_AQ_FLAG_ERR) {		if (flags & I40E_AQ_FLAG_ERR) {
ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;		ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;
hw->aq.arq_last_status =
(enum i40e_admin_queue_err)LE16_TO_CPU(desc->retval);
i40e_debug(hw,		i40e_debug(hw,
I40E_DEBUG_AQ_MESSAGE,		I40E_DEBUG_AQ_MESSAGE,
"AQRX: Event received with error 0x%X.\n",		"AQRX: Event received with error 0x%X.\n",
hw->aq.arq_last_status);		hw->aq.arq_last_status);
}		}

i40e_memcpy(&e->desc, desc, sizeof(struct i40e_aq_desc),		i40e_memcpy(&e->desc, desc, sizeof(struct i40e_aq_desc),
I40E_DMA_TO_NONDMA);		I40E_DMA_TO_NONDMA);
▲ Show 20 Lines • Show All 45 Lines • Show Last 20 Lines