Changeset View

Standalone View

Show First 20 Lines • Show All 161 Lines • ▼ Show 20 Lines	if (ret == 0) {
if (!arm64_get_writable_addr(addr, &addr)) {		if (!arm64_get_writable_addr(addr, &addr)) {
ret = 1;		ret = 1;
} else {		} else {
dst = (char *)addr;		dst = (char *)addr;
for (i = 0; i < size; i++)		for (i = 0; i < size; i++)
dst++ = data++;		dst++ = data++;
dsb(ish);		dsb(ish);

/* Clean D-cache and invalidate I-cache */		/*
cpu_dcache_wb_range(addr, (vm_size_t)size);		* Ensure the I & D cache are in sync if we wrote
		* to executable memory.
		*/
cpu_icache_sync_range(addr, (vm_size_t)size);		cpu_icache_sync_range(addr, (vm_size_t)size);
}		}
}		}
(void)kdb_jmpbuf(prev_jb);		(void)kdb_jmpbuf(prev_jb);

return (ret);		return (ret);
}		}