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D6389.1794820366.diff
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Index: head/sys/dev/sfxge/common/ef10_impl.h
===================================================================
--- head/sys/dev/sfxge/common/ef10_impl.h
+++ head/sys/dev/sfxge/common/ef10_impl.h
@@ -1056,7 +1056,9 @@
extern __checkReturn efx_rc_t
efx_mcdi_get_clock(
__in efx_nic_t *enp,
- __out uint32_t *sys_freqp);
+ __out uint32_t *sys_freqp,
+ __out uint32_t *dpcpu_freqp);
+
extern __checkReturn efx_rc_t
efx_mcdi_get_vector_cfg(
Index: head/sys/dev/sfxge/common/ef10_nic.c
===================================================================
--- head/sys/dev/sfxge/common/ef10_nic.c
+++ head/sys/dev/sfxge/common/ef10_nic.c
@@ -389,7 +389,8 @@
__checkReturn efx_rc_t
efx_mcdi_get_clock(
__in efx_nic_t *enp,
- __out uint32_t *sys_freqp)
+ __out uint32_t *sys_freqp,
+ __out uint32_t *dpcpu_freqp)
{
efx_mcdi_req_t req;
uint8_t payload[MAX(MC_CMD_GET_CLOCK_IN_LEN,
@@ -423,9 +424,16 @@
rc = EINVAL;
goto fail3;
}
+ *dpcpu_freqp = MCDI_OUT_DWORD(req, GET_CLOCK_OUT_DPCPU_FREQ);
+ if (*dpcpu_freqp == 0) {
+ rc = EINVAL;
+ goto fail4;
+ }
return (0);
+fail4:
+ EFSYS_PROBE(fail4);
fail3:
EFSYS_PROBE(fail3);
fail2:
Index: head/sys/dev/sfxge/common/hunt_nic.c
===================================================================
--- head/sys/dev/sfxge/common/hunt_nic.c
+++ head/sys/dev/sfxge/common/hunt_nic.c
@@ -114,7 +114,7 @@
uint32_t vf;
uint32_t mask;
uint32_t flags;
- uint32_t sysclk;
+ uint32_t sysclk, dpcpu_clk;
uint32_t base, nvec;
uint32_t bandwidth;
efx_rc_t rc;
@@ -274,13 +274,13 @@
goto fail10;
}
- /* Get sysclk frequency (in MHz). */
- if ((rc = efx_mcdi_get_clock(enp, &sysclk)) != 0)
+ /* Get clock frequencies (in MHz). */
+ if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
goto fail11;
/*
- * The timer quantum is 1536 sysclk cycles, documented for the
- * EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
+ * The Huntington timer quantum is 1536 sysclk cycles, documented for
+ * the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
*/
encp->enc_evq_timer_quantum_ns = 1536000UL / sysclk; /* 1536 cycles */
if (encp->enc_bug35388_workaround) {
Index: head/sys/dev/sfxge/common/medford_nic.c
===================================================================
--- head/sys/dev/sfxge/common/medford_nic.c
+++ head/sys/dev/sfxge/common/medford_nic.c
@@ -141,7 +141,7 @@
uint32_t pf;
uint32_t vf;
uint32_t mask;
- uint32_t sysclk;
+ uint32_t sysclk, dpcpu_clk;
uint32_t base, nvec;
uint32_t end_padding;
uint32_t bandwidth;
@@ -231,15 +231,15 @@
/* Chained multicast is always enabled on Medford */
encp->enc_bug26807_workaround = B_TRUE;
- /* Get sysclk frequency (in MHz). */
- if ((rc = efx_mcdi_get_clock(enp, &sysclk)) != 0)
+ /* Get clock frequencies (in MHz). */
+ if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
goto fail8;
/*
- * The timer quantum is 1536 sysclk cycles, documented for the
- * EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
+ * The Medford timer quantum is 1536 dpcpu_clk cycles, documented for
+ * the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
*/
- encp->enc_evq_timer_quantum_ns = 1536000UL / sysclk; /* 1536 cycles */
+ encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */
encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;

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