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Index: head/sys/amd64/include/pcpu.h
===================================================================
--- head/sys/amd64/include/pcpu.h
+++ head/sys/amd64/include/pcpu.h
@@ -36,6 +36,13 @@
#endif
#define PC_PTI_STACK_SZ 16
+
+struct monitorbuf {
+ int idle_state; /* Used by cpu_idle_mwait. */
+ char padding[128 - (1 * sizeof(int))];
+};
+_Static_assert(sizeof(struct monitorbuf) == 128, "2x cache line");
+
/*
* The SMP parts are setup in pmap.c and locore.s for the BSP, and
* mp_machdep.c sets up the data for the AP's to "see" when they awake.
@@ -44,7 +51,7 @@
* other processors"
*/
#define PCPU_MD_FIELDS \
- char pc_monitorbuf[128] __aligned(128); /* cache line */ \
+ struct monitorbuf pc_monitorbuf __aligned(128); /* cache line */\
struct pcpu *pc_prvspace; /* Self-reference */ \
struct pmap *pc_curpmap; \
struct amd64tss *pc_tssp; /* TSS segment active on CPU */ \
Index: head/sys/i386/include/pcpu.h
===================================================================
--- head/sys/i386/include/pcpu.h
+++ head/sys/i386/include/pcpu.h
@@ -41,6 +41,12 @@
#include <sys/_lock.h>
#include <sys/_mutex.h>
+struct monitorbuf {
+ int idle_state; /* Used by cpu_idle_mwait. */
+ char padding[128 - (1 * sizeof(int))];
+};
+_Static_assert(sizeof(struct monitorbuf) == 128, "2x cache line");
+
/*
* The SMP parts are setup in pmap.c and machdep.c for the BSP, and
* pmap.c and mp_machdep.c sets up the data for the AP's to "see" when
@@ -50,7 +56,7 @@
*/
#define PCPU_MD_FIELDS \
- char pc_monitorbuf[128] __aligned(128); /* cache line */ \
+ struct monitorbuf pc_monitorbuf __aligned(128); /* cache line */\
struct pcpu *pc_prvspace; /* Self-reference */ \
struct pmap *pc_curpmap; \
struct segment_descriptor pc_common_tssd; \
Index: head/sys/x86/x86/cpu_machdep.c
===================================================================
--- head/sys/x86/x86/cpu_machdep.c
+++ head/sys/x86/x86/cpu_machdep.c
@@ -164,7 +164,7 @@
* but all Intel CPUs provide hardware coordination.
*/
- state = (int *)PCPU_PTR(monitorbuf);
+ state = &PCPU_PTR(monitorbuf)->idle_state;
KASSERT(atomic_load_int(state) == STATE_SLEEPING,
("cpu_mwait_cx: wrong monitorbuf state"));
atomic_store_int(state, STATE_MWAIT);
@@ -422,7 +422,7 @@
{
int *state;
- state = (int *)PCPU_PTR(monitorbuf);
+ state = &PCPU_PTR(monitorbuf)->idle_state;
atomic_store_int(state, STATE_SLEEPING);
/* See comments in cpu_idle_hlt(). */
@@ -441,7 +441,7 @@
{
int *state;
- state = (int *)PCPU_PTR(monitorbuf);
+ state = &PCPU_PTR(monitorbuf)->idle_state;
atomic_store_int(state, STATE_SLEEPING);
/*
@@ -473,7 +473,7 @@
{
int *state;
- state = (int *)PCPU_PTR(monitorbuf);
+ state = &PCPU_PTR(monitorbuf)->idle_state;
atomic_store_int(state, STATE_MWAIT);
/* See comments in cpu_idle_hlt(). */
@@ -498,7 +498,7 @@
int *state;
int i;
- state = (int *)PCPU_PTR(monitorbuf);
+ state = &PCPU_PTR(monitorbuf)->idle_state;
atomic_store_int(state, STATE_RUNNING);
/*
@@ -598,9 +598,11 @@
int
cpu_idle_wakeup(int cpu)
{
+ struct monitorbuf *mb;
int *state;
- state = (int *)pcpu_find(cpu)->pc_monitorbuf;
+ mb = &pcpu_find(cpu)->pc_monitorbuf;
+ state = &mb->idle_state;
switch (atomic_load_int(state)) {
case STATE_SLEEPING:
return (0);

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