D15422.1794725677.diff
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D15422.1794725677.diff
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	Index: head/sys/x86/x86/local_apic.c
	===================================================================
	--- head/sys/x86/x86/local_apic.c
	+++ head/sys/x86/x86/local_apic.c
	@@ -206,6 +206,9 @@
	SYSCTL_INT(_hw_apic, OID_AUTO, timer_tsc_deadline, CTLFLAG_RD,
	&lapic_timer_tsc_deadline, 0, "");

	+static void lapic_calibrate_initcount(struct lapic *la);
	+static void lapic_calibrate_deadline(struct lapic *la);
	+
	static uint32_t
	lapic_read32(enum LAPIC_REGISTERS reg)
	{
	@@ -787,6 +790,13 @@
	intrcnt_add(buf, &la->la_timer_count);
	}

	+ /* Calibrate the timer parameters using BSP. */
	+ if (boot && IS_BSP()) {
	+ lapic_calibrate_initcount(la);
	+ if (lapic_timer_tsc_deadline)
	+ lapic_calibrate_deadline(la);
	+ }
	+
	/* Setup the timer if configured. */
	if (la->la_timer_mode != LAT_MODE_UNDEF) {
	KASSERT(la->la_timer_period != 0, ("lapic%u: zero divisor",
	@@ -921,7 +931,7 @@
	}

	static void
	-lapic_calibrate_initcount(struct eventtimer et, struct lapic la)
	+lapic_calibrate_initcount(struct lapic *la)
	{
	u_long value;

	@@ -947,7 +957,7 @@
	}

	static void
	-lapic_calibrate_deadline(struct eventtimer et, struct lapic la __unused)
	+lapic_calibrate_deadline(struct lapic *la __unused)
	{

	if (bootverbose) {
	@@ -989,11 +999,6 @@
	struct lapic *la;

	la = &lapics[PCPU_GET(apic_id)];
	- if (et->et_frequency == 0) {
	- lapic_calibrate_initcount(et, la);
	- if (lapic_timer_tsc_deadline)
	- lapic_calibrate_deadline(et, la);
	- }
	if (period != 0) {
	lapic_change_mode(et, la, LAT_MODE_PERIODIC);
	la->la_timer_period = ((uint32_t)et->et_frequency * period) >>