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D60770.1794685058.diff
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diff --git a/sys/dev/hwpmc/hwpmc_amd.c b/sys/dev/hwpmc/hwpmc_amd.c
--- a/sys/dev/hwpmc/hwpmc_amd.c
+++ b/sys/dev/hwpmc/hwpmc_amd.c
@@ -797,7 +797,10 @@
}
/* Enable EVSEL while the virtual slot's global bit is off. */
- config = pm->pm_md.pm_amd.pm_amd_evsel | AMD_PMC_ENABLE;
+ if (pd->pm_subclass == PMC_AMD_SUB_CLASS_UMC)
+ config = pm->pm_md.pm_amd.pm_amd_evsel | AMD_PMC_UMC_ENABLE;
+ else
+ config = pm->pm_md.pm_amd.pm_amd_evsel | AMD_PMC_ENABLE;
wrmsr(pd->pm_evsel, config);
if (pd->pm_subclass == PMC_AMD_SUB_CLASS_CORE &&
@@ -868,6 +871,7 @@
{
const struct amd_descr *pd;
enum pmc_mode mode;
+ uint64_t config;
int i;
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
@@ -888,8 +892,11 @@
}
/* Disable EVSEL after the counter's global bit is off. */
- wrmsr(pd->pm_evsel,
- pm->pm_md.pm_amd.pm_amd_evsel & ~AMD_PMC_ENABLE);
+ if (pd->pm_subclass == PMC_AMD_SUB_CLASS_UMC)
+ config = pm->pm_md.pm_amd.pm_amd_evsel & ~AMD_PMC_UMC_ENABLE;
+ else
+ config = pm->pm_md.pm_amd.pm_amd_evsel & ~AMD_PMC_ENABLE;
+ wrmsr(pd->pm_evsel, config);
/* Wait out an in-flight overflow NMI. The handler clears the status bit. */
if (pd->pm_subclass == PMC_AMD_SUB_CLASS_CORE &&
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D60770: hwpmc: use the UMC enable bit with PerfMonV2
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