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D60892.1794684804.diff
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diff --git a/sys/dev/clk/rockchip/rk3568_cru.c b/sys/dev/clk/rockchip/rk3568_cru.c
--- a/sys/dev/clk/rockchip/rk3568_cru.c
+++ b/sys/dev/clk/rockchip/rk3568_cru.c
@@ -480,7 +480,8 @@
/* 7 Reserved */
MUX(0, "bclk_emmc_sel", gpll200_gpll150_cpll125_p, 0, 28, 8, 2),
/* 10:11 Reserved */
- MUX(0, "cclk_emmc_sel", cclk_emmc_p, 0, 28, 12, 3),
+ MUX(0, "cclk_emmc_sel", cclk_emmc_p,
+ RK_CLK_MUX_ROUND_PARENT, 28, 12, 3),
/* 15 Reserved */
/* CRU_CLKSEL_CON29 */
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D60892.1794684804.diff (477 B)
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D60892: clk: rockchip: rk3568: Select the eMMC core clock by rate
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