D61274.1794684312.diff
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	diff --git a/secure/lib/libcrypto/Makefile.asm b/secure/lib/libcrypto/Makefile.asm
	--- a/secure/lib/libcrypto/Makefile.asm
	+++ b/secure/lib/libcrypto/Makefile.asm
	@@ -15,9 +15,7 @@
	${LCRYPTO_SRC}/crypto/md5/asm \
	${LCRYPTO_SRC}/crypto/modes/asm \
	${LCRYPTO_SRC}/crypto/poly1305/asm \
	- ${LCRYPTO_SRC}/crypto/sha/asm \
	- ${LCRYPTO_SRC}/crypto/sm3/asm \
	- ${LCRYPTO_SRC}/crypto/sm4/asm
	+ ${LCRYPTO_SRC}/crypto/sha/asm

	PERLPATH= -I${LCRYPTO_SRC}/crypto/perlasm

	@@ -34,7 +32,7 @@
	SRCS+= chacha-armv8.pl chacha-armv8-sve.pl

	# ec
	-SRCS+= ecp_nistz256-armv8.pl ecp_sm2p256-armv8.pl
	+SRCS+= ecp_nistz256-armv8.pl

	# md5
	SRCS+= md5-aarch64.pl
	@@ -48,12 +46,6 @@
	# sha
	SRCS+= keccak1600-armv8.pl sha1-armv8.pl sha512-armv8.pl

	-# sm3
	-SRCS+= sm3-armv8.pl
	-
	-# sm4
	-SRCS+= sm4-armv8.pl vpsm4-armv8.pl vpsm4_ex-armv8.pl
	-
	ASM= ${SRCS:R:S/$/.S/} sha256-armv8.S

	all: ${ASM}
	@@ -218,7 +210,6 @@
	${LCRYPTO_SRC}/crypto/bf/asm \
	${LCRYPTO_SRC}/crypto/bn/asm \
	${LCRYPTO_SRC}/crypto/camellia/asm \
	- ${LCRYPTO_SRC}/crypto/cast/asm \
	${LCRYPTO_SRC}/crypto/chacha/asm \
	${LCRYPTO_SRC}/crypto/des/asm \
	${LCRYPTO_SRC}/crypto/ec/asm \
	@@ -226,7 +217,6 @@
	${LCRYPTO_SRC}/crypto/modes/asm \
	${LCRYPTO_SRC}/crypto/poly1305/asm \
	${LCRYPTO_SRC}/crypto/rc4/asm \
	- ${LCRYPTO_SRC}/crypto/rc5/asm \
	${LCRYPTO_SRC}/crypto/ripemd/asm \
	${LCRYPTO_SRC}/crypto/sha/asm \
	${LCRYPTO_SRC}/crypto/whrlpool/asm \
	@@ -250,9 +240,6 @@
	# camellia
	SRCS+= cmll-x86.pl

	-# cast
	-SRCS+= cast-586.pl
	-
	# chacha
	SRCS+= chacha-x86.pl

	@@ -274,9 +261,6 @@
	# rc4
	SRCS+= rc4-586.pl

	-# rc5
	-SRCS+= rc5-586.pl
	-
	# ripemd
	SRCS+= rmd-586.pl

	@@ -329,7 +313,7 @@
	SRCS+= sha1-ppc.pl sha512-ppc.pl sha512p8-ppc.pl

	#modes
	-SRCS+= aes-gcm-ppc.pl ghashp8-ppc.pl
	+SRCS+= ghashp8-ppc.pl

	#chacha
	SRCS+= chacha-ppc.pl chachap10-ppc.pl
	diff --git a/sys/crypto/openssl/aarch64/ecp_sm2p256-armv8.S b/sys/crypto/openssl/aarch64/ecp_sm2p256-armv8.S
	deleted file mode 100644
	--- a/sys/crypto/openssl/aarch64/ecp_sm2p256-armv8.S
	+++ /dev/null
	@@ -1,837 +0,0 @@
	-/* Do not modify. This file is auto-generated from ecp_sm2p256-armv8.pl. */
	-#include "arm_arch.h"
	-.arch armv8-a
	-.section .rodata
	-
	-.align 5
	-// The polynomial p
	-.Lpoly:
	-.quad 0xffffffffffffffff,0xffffffff00000000,0xffffffffffffffff,0xfffffffeffffffff
	-// The order of polynomial n
	-.Lord:
	-.quad 0x53bbf40939d54123,0x7203df6b21c6052b,0xffffffffffffffff,0xfffffffeffffffff
	-// (p + 1) / 2
	-.Lpoly_div_2:
	-.quad 0x8000000000000000,0xffffffff80000000,0xffffffffffffffff,0x7fffffff7fffffff
	-// (n + 1) / 2
	-.Lord_div_2:
	-.quad 0xa9ddfa049ceaa092,0xb901efb590e30295,0xffffffffffffffff,0x7fffffff7fffffff
	-
	-.text
	-
	-// void bn_rshift1(BN_ULONG *a);
	-.globl bn_rshift1
	-.type bn_rshift1,%function
	-.align 5
	-bn_rshift1:
	- AARCH64_VALID_CALL_TARGET
	- // Load inputs
	- ldp x7,x8,[x0]
	- ldp x9,x10,[x0,#16]
	-
	- // Right shift
	- extr x7,x8,x7,#1
	- extr x8,x9,x8,#1
	- extr x9,x10,x9,#1
	- lsr x10,x10,#1
	-
	- // Store results
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	-
	- ret
	-.size bn_rshift1,.-bn_rshift1
	-
	-// void bn_sub(BN_ULONG r, const BN_ULONG a, const BN_ULONG *b);
	-.globl bn_sub
	-.type bn_sub,%function
	-.align 5
	-bn_sub:
	- AARCH64_VALID_CALL_TARGET
	- // Load inputs
	- ldp x7,x8,[x1]
	- ldp x9,x10,[x1,#16]
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	- // Subtraction
	- subs x7,x7,x11
	- sbcs x8,x8,x12
	- sbcs x9,x9,x13
	- sbc x10,x10,x14
	-
	- // Store results
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	-
	- ret
	-.size bn_sub,.-bn_sub
	-
	-// void ecp_sm2p256_div_by_2(BN_ULONG r,const BN_ULONG a);
	-.globl ecp_sm2p256_div_by_2
	-.type ecp_sm2p256_div_by_2,%function
	-.align 5
	-ecp_sm2p256_div_by_2:
	- AARCH64_VALID_CALL_TARGET
	- // Load inputs
	- ldp x7,x8,[x1]
	- ldp x9,x10,[x1,#16]
	-
	- // Save the least significant bit
	- mov x3,x7
	-
	- // Right shift 1
	- extr x7,x8,x7,#1
	- extr x8,x9,x8,#1
	- extr x9,x10,x9,#1
	- lsr x10,x10,#1
	-
	- // Load mod
	- adrp x2,.Lpoly_div_2
	- add x2,x2,#:lo12:.Lpoly_div_2
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	- // Parity check
	- tst x3,#1
	- csel x11,xzr,x11,eq
	- csel x12,xzr,x12,eq
	- csel x13,xzr,x13,eq
	- csel x14,xzr,x14,eq
	-
	- // Add
	- adds x7,x7,x11
	- adcs x8,x8,x12
	- adcs x9,x9,x13
	- adc x10,x10,x14
	-
	- // Store results
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	- ret
	-.size ecp_sm2p256_div_by_2,.-ecp_sm2p256_div_by_2
	-
	-// void ecp_sm2p256_div_by_2_mod_ord(BN_ULONG r,const BN_ULONG a);
	-.globl ecp_sm2p256_div_by_2_mod_ord
	-.type ecp_sm2p256_div_by_2_mod_ord,%function
	-.align 5
	-ecp_sm2p256_div_by_2_mod_ord:
	- AARCH64_VALID_CALL_TARGET
	- // Load inputs
	- ldp x7,x8,[x1]
	- ldp x9,x10,[x1,#16]
	-
	- // Save the least significant bit
	- mov x3,x7
	-
	- // Right shift 1
	- extr x7,x8,x7,#1
	- extr x8,x9,x8,#1
	- extr x9,x10,x9,#1
	- lsr x10,x10,#1
	-
	- // Load mod
	- adrp x2,.Lord_div_2
	- add x2,x2,#:lo12:.Lord_div_2
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	- // Parity check
	- tst x3,#1
	- csel x11,xzr,x11,eq
	- csel x12,xzr,x12,eq
	- csel x13,xzr,x13,eq
	- csel x14,xzr,x14,eq
	-
	- // Add
	- adds x7,x7,x11
	- adcs x8,x8,x12
	- adcs x9,x9,x13
	- adc x10,x10,x14
	-
	- // Store results
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	- ret
	-.size ecp_sm2p256_div_by_2_mod_ord,.-ecp_sm2p256_div_by_2_mod_ord
	-
	-// void ecp_sm2p256_mul_by_3(BN_ULONG r,const BN_ULONG a);
	-.globl ecp_sm2p256_mul_by_3
	-.type ecp_sm2p256_mul_by_3,%function
	-.align 5
	-ecp_sm2p256_mul_by_3:
	- AARCH64_VALID_CALL_TARGET
	- // Load inputs
	- ldp x7,x8,[x1]
	- ldp x9,x10,[x1,#16]
	-
	- // 2*a
	- adds x7,x7,x7
	- adcs x8,x8,x8
	- adcs x9,x9,x9
	- adcs x10,x10,x10
	- adcs x15,xzr,xzr
	-
	- mov x3,x7
	- mov x4,x8
	- mov x5,x9
	- mov x6,x10
	-
	- // Sub polynomial
	- adrp x2,.Lpoly
	- add x2,x2,#:lo12:.Lpoly
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	- subs x7,x7,x11
	- sbcs x8,x8,x12
	- sbcs x9,x9,x13
	- sbcs x10,x10,x14
	- sbcs x15,x15,xzr
	-
	- csel x7,x7,x3,cs
	- csel x8,x8,x4,cs
	- csel x9,x9,x5,cs
	- csel x10,x10,x6,cs
	- eor x15,x15,x15
	-
	- // 3*a
	- ldp x11,x12,[x1]
	- ldp x13,x14,[x1,#16]
	- adds x7,x7,x11
	- adcs x8,x8,x12
	- adcs x9,x9,x13
	- adcs x10,x10,x14
	- adcs x15,xzr,xzr
	-
	- mov x3,x7
	- mov x4,x8
	- mov x5,x9
	- mov x6,x10
	-
	- // Sub polynomial
	- adrp x2,.Lpoly
	- add x2,x2,#:lo12:.Lpoly
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	- subs x7,x7,x11
	- sbcs x8,x8,x12
	- sbcs x9,x9,x13
	- sbcs x10,x10,x14
	- sbcs x15,x15,xzr
	-
	- csel x7,x7,x3,cs
	- csel x8,x8,x4,cs
	- csel x9,x9,x5,cs
	- csel x10,x10,x6,cs
	-
	- // Store results
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	-
	- ret
	-.size ecp_sm2p256_mul_by_3,.-ecp_sm2p256_mul_by_3
	-
	-// void ecp_sm2p256_add(BN_ULONG r,const BN_ULONG a,const BN_ULONG *b);
	-.globl ecp_sm2p256_add
	-.type ecp_sm2p256_add,%function
	-.align 5
	-ecp_sm2p256_add:
	- AARCH64_VALID_CALL_TARGET
	- // Load inputs
	- ldp x7,x8,[x1]
	- ldp x9,x10,[x1,#16]
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	- // Addition
	- adds x7,x7,x11
	- adcs x8,x8,x12
	- adcs x9,x9,x13
	- adcs x10,x10,x14
	- adc x15,xzr,xzr
	-
	- // Load polynomial
	- adrp x2,.Lpoly
	- add x2,x2,#:lo12:.Lpoly
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	- // Backup Addition
	- mov x3,x7
	- mov x4,x8
	- mov x5,x9
	- mov x6,x10
	-
	- // Sub polynomial
	- subs x3,x3,x11
	- sbcs x4,x4,x12
	- sbcs x5,x5,x13
	- sbcs x6,x6,x14
	- sbcs x15,x15,xzr
	-
	- // Select based on carry
	- csel x7,x7,x3,cc
	- csel x8,x8,x4,cc
	- csel x9,x9,x5,cc
	- csel x10,x10,x6,cc
	-
	- // Store results
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	- ret
	-.size ecp_sm2p256_add,.-ecp_sm2p256_add
	-
	-// void ecp_sm2p256_sub(BN_ULONG r,const BN_ULONG a,const BN_ULONG *b);
	-.globl ecp_sm2p256_sub
	-.type ecp_sm2p256_sub,%function
	-.align 5
	-ecp_sm2p256_sub:
	- AARCH64_VALID_CALL_TARGET
	- // Load inputs
	- ldp x7,x8,[x1]
	- ldp x9,x10,[x1,#16]
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	- // Subtraction
	- subs x7,x7,x11
	- sbcs x8,x8,x12
	- sbcs x9,x9,x13
	- sbcs x10,x10,x14
	- sbc x15,xzr,xzr
	-
	- // Load polynomial
	- adrp x2,.Lpoly
	- add x2,x2,#:lo12:.Lpoly
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	- // Backup subtraction
	- mov x3,x7
	- mov x4,x8
	- mov x5,x9
	- mov x6,x10
	-
	- // Add polynomial
	- adds x3,x3,x11
	- adcs x4,x4,x12
	- adcs x5,x5,x13
	- adcs x6,x6,x14
	- tst x15,x15
	-
	- // Select based on carry
	- csel x7,x7,x3,eq
	- csel x8,x8,x4,eq
	- csel x9,x9,x5,eq
	- csel x10,x10,x6,eq
	-
	- // Store results
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	- ret
	-.size ecp_sm2p256_sub,.-ecp_sm2p256_sub
	-
	-// void ecp_sm2p256_sub_mod_ord(BN_ULONG r,const BN_ULONG a,const BN_ULONG *b);
	-.globl ecp_sm2p256_sub_mod_ord
	-.type ecp_sm2p256_sub_mod_ord,%function
	-.align 5
	-ecp_sm2p256_sub_mod_ord:
	- AARCH64_VALID_CALL_TARGET
	- // Load inputs
	- ldp x7,x8,[x1]
	- ldp x9,x10,[x1,#16]
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	- // Subtraction
	- subs x7,x7,x11
	- sbcs x8,x8,x12
	- sbcs x9,x9,x13
	- sbcs x10,x10,x14
	- sbc x15,xzr,xzr
	-
	- // Load polynomial
	- adrp x2,.Lord
	- add x2,x2,#:lo12:.Lord
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	- // Backup subtraction
	- mov x3,x7
	- mov x4,x8
	- mov x5,x9
	- mov x6,x10
	-
	- // Add polynomial
	- adds x3,x3,x11
	- adcs x4,x4,x12
	- adcs x5,x5,x13
	- adcs x6,x6,x14
	- tst x15,x15
	-
	- // Select based on carry
	- csel x7,x7,x3,eq
	- csel x8,x8,x4,eq
	- csel x9,x9,x5,eq
	- csel x10,x10,x6,eq
	-
	- // Store results
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	- ret
	-.size ecp_sm2p256_sub_mod_ord,.-ecp_sm2p256_sub_mod_ord
	-
	-.macro RDC
	- // a = \| s7 \| ... \| s0 \|, where si are 64-bit quantities
	- // = \|a15\|a14\| ... \|a1\|a0\|, where ai are 32-bit quantities
	- // \| s7 \| s6 \| s5 \| s4 \|
	- // \| a15 \| a14 \| a13 \| a12 \| a11 \| a10 \| a9 \| a8 \|
	- // \| s3 \| s2 \| s1 \| s0 \|
	- // \| a7 \| a6 \| a5 \| a4 \| a3 \| a2 \| a1 \| a0 \|
	- // =================================================
	- // \| a8 \| a11 \| a10 \| a9 \| a8 \| 0 \| s4 \| (+)
	- // \| a9 \| a15 \| s6 \| a11 \| 0 \| a10 \| a9 \| (+)
	- // \| a10 \| 0 \| a14 \| a13 \| a12 \| 0 \| s5 \| (+)
	- // \| a11 \| 0 \| s7 \| a13 \| 0 \| a12 \| a11 \| (+)
	- // \| a12 \| 0 \| s7 \| a13 \| 0 \| s6 \| (+)
	- // \| a12 \| 0 \| 0 \| a15 \| a14 \| 0 \| a14 \| a13 \| (+)
	- // \| a13 \| 0 \| 0 \| 0 \| a15 \| 0 \| a14 \| a13 \| (+)
	- // \| a13 \| 0 \| 0 \| 0 \| 0 \| 0 \| s7 \| (+)
	- // \| a14 \| 0 \| 0 \| 0 \| 0 \| 0 \| s7 \| (+)
	- // \| a14 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| a15 \| (+)
	- // \| a15 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| a15 \| (+)
	- // \| a15 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| (+)
	- // \| s7 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| (+)
	- // \| 0 \| 0 \| 0 \| 0 \| 0 \| a8 \| 0 \| 0 \| (-)
	- // \| 0 \| 0 \| 0 \| 0 \| 0 \| a9 \| 0 \| 0 \| (-)
	- // \| 0 \| 0 \| 0 \| 0 \| 0 \| a13 \| 0 \| 0 \| (-)
	- // \| 0 \| 0 \| 0 \| 0 \| 0 \| a14 \| 0 \| 0 \| (-)
	- // \| U[7]\| U[6]\| U[5]\| U[4]\| U[3]\| U[2]\| U[1]\| U[0]\|
	- // \| V[3] \| V[2] \| V[1] \| V[0] \|
	-
	- // 1. 64-bit addition
	- // t2=s6+s7+s7
	- adds x5,x13,x14
	- adcs x4,xzr,xzr
	- adds x5,x5,x14
	- adcs x4,x4,xzr
	- // t3=s4+s5+t2
	- adds x6,x11,x5
	- adcs x15,x4,xzr
	- adds x6,x6,x12
	- adcs x15,x15,xzr
	- // sum
	- adds x7,x7,x6
	- adcs x8,x8,x15
	- adcs x9,x9,x5
	- adcs x10,x10,x14
	- adcs x3,xzr,xzr
	- adds x10,x10,x4
	- adcs x3,x3,xzr
	-
	- stp x7,x8,[sp,#32]
	- stp x9,x10,[sp,#48]
	-
	- // 2. 64-bit to 32-bit spread
	- mov x4,#0xffffffff
	- mov x7,x11
	- mov x8,x12
	- mov x9,x13
	- mov x10,x14
	- and x7,x7,x4 // a8
	- and x8,x8,x4 // a10
	- and x9,x9,x4 // a12
	- and x10,x10,x4 // a14
	- lsr x11,x11,#32 // a9
	- lsr x12,x12,#32 // a11
	- lsr x13,x13,#32 // a13
	- lsr x14,x14,#32 // a15
	-
	- // 3. 32-bit addition
	- add x4,x10,x9 // t1 <- a12 + a14
	- add x5,x14,x13 // t2 <- a13 + a15
	- add x6,x7,x11 // t3 <- a8 + a9
	- add x15,x10,x8 // t4 <- a10 + a14
	- add x14,x14,x12 // a15 <- a11 + a15
	- add x9,x5,x4 // a12 <- a12 + a13 + a14 + a15
	- add x8,x8,x9 // a10 <- a10 + a12 + a13 + a14 + a15
	- add x8,x8,x9 // a10 <- a10 + 2*(a12 + a13 + a14 + a15)
	- add x8,x8,x6 // a10 <- a8 + a9 + a10 + 2*(a12 + a13 + a14 + a15)
	- add x8,x8,x12 // a10 <- a8 + a9 + a10 + a11 + 2*(a12 + a13 + a14 + a15)
	- add x9,x9,x13 // a12 <- a12 + 2*a13 + a14 + a15
	- add x9,x9,x12 // a12 <- a11 + a12 + 2*a13 + a14 + a15
	- add x9,x9,x7 // a12 <- a8 + a11 + a12 + 2*a13 + a14 + a15
	- add x6,x6,x10 // t3 <- a8 + a9 + a14
	- add x6,x6,x13 // t3 <- a8 + a9 + a13 + a14
	- add x11,x11,x5 // a9 <- a9 + a13 + a15
	- add x12,x12,x11 // a11 <- a9 + a11 + a13 + a15
	- add x12,x12,x5 // a11 <- a9 + a11 + 2*(a13 + a15)
	- add x4,x4,x15 // t1 <- a10 + a12 + 2*a14
	-
	- // U[0] s5 a9 + a11 + 2*(a13 + a15)
	- // U[1] t1 a10 + a12 + 2*a14
	- // U[2] -t3 a8 + a9 + a13 + a14
	- // U[3] s2 a8 + a11 + a12 + 2*a13 + a14 + a15
	- // U[4] s4 a9 + a13 + a15
	- // U[5] t4 a10 + a14
	- // U[6] s7 a11 + a15
	- // U[7] s1 a8 + a9 + a10 + a11 + 2*(a12 + a13 + a14 + a15)
	-
	- // 4. 32-bit to 64-bit
	- lsl x7,x4,#32
	- extr x4,x9,x4,#32
	- extr x9,x15,x9,#32
	- extr x15,x8,x15,#32
	- lsr x8,x8,#32
	-
	- // 5. 64-bit addition
	- adds x12,x12,x7
	- adcs x4,x4,xzr
	- adcs x11,x11,x9
	- adcs x14,x14,x15
	- adcs x3,x3,x8
	-
	- // V[0] s5
	- // V[1] t1
	- // V[2] s4
	- // V[3] s7
	- // carry t0
	- // sub t3
	-
	- // 5. Process s0-s3
	- ldp x7,x8,[sp,#32]
	- ldp x9,x10,[sp,#48]
	- // add with V0-V3
	- adds x7,x7,x12
	- adcs x8,x8,x4
	- adcs x9,x9,x11
	- adcs x10,x10,x14
	- adcs x3,x3,xzr
	- // sub with t3
	- subs x8,x8,x6
	- sbcs x9,x9,xzr
	- sbcs x10,x10,xzr
	- sbcs x3,x3,xzr
	-
	- // 6. MOD
	- // First Mod
	- lsl x4,x3,#32
	- subs x5,x4,x3
	-
	- adds x7,x7,x3
	- adcs x8,x8,x5
	- adcs x9,x9,xzr
	- adcs x10,x10,x4
	-
	- // Last Mod
	- // return y - p if y > p else y
	- mov x11,x7
	- mov x12,x8
	- mov x13,x9
	- mov x14,x10
	-
	- adrp x3,.Lpoly
	- add x3,x3,#:lo12:.Lpoly
	- ldp x4,x5,[x3]
	- ldp x6,x15,[x3,#16]
	-
	- adcs x16,xzr,xzr
	-
	- subs x7,x7,x4
	- sbcs x8,x8,x5
	- sbcs x9,x9,x6
	- sbcs x10,x10,x15
	- sbcs x16,x16,xzr
	-
	- csel x7,x7,x11,cs
	- csel x8,x8,x12,cs
	- csel x9,x9,x13,cs
	- csel x10,x10,x14,cs
	-
	-.endm
	-
	-// void ecp_sm2p256_mul(BN_ULONG r, const BN_ULONG a, const BN_ULONG *b);
	-.globl ecp_sm2p256_mul
	-.type ecp_sm2p256_mul,%function
	-.align 5
	-ecp_sm2p256_mul:
	- AARCH64_SIGN_LINK_REGISTER
	- // Store scalar registers
	- stp x29,x30,[sp,#-80]!
	- add x29,sp,#0
	- stp x16,x17,[sp,#16]
	- stp x19,x20,[sp,#64]
	-
	- // Load inputs
	- ldp x7,x8,[x1]
	- ldp x9,x10,[x1,#16]
	- ldp x11,x12,[x2]
	- ldp x13,x14,[x2,#16]
	-
	-// ### multiplication ###
	- // ========================
	- // s3 s2 s1 s0
	- // * s7 s6 s5 s4
	- // ------------------------
	- // + s0 s0 s0 s0
	- // * * * *
	- // s7 s6 s5 s4
	- // s1 s1 s1 s1
	- // * * * *
	- // s7 s6 s5 s4
	- // s2 s2 s2 s2
	- // * * * *
	- // s7 s6 s5 s4
	- // s3 s3 s3 s3
	- // * * * *
	- // s7 s6 s5 s4
	- // ------------------------
	- // s7 s6 s5 s4 s3 s2 s1 s0
	- // ========================
	-
	-// ### s0*s4 ###
	- mul x16,x7,x11
	- umulh x5,x7,x11
	-
	-// ### s1s4 + s0s5 ###
	- mul x3,x8,x11
	- umulh x4,x8,x11
	- adds x5,x5,x3
	- adcs x6,x4,xzr
	-
	- mul x3,x7,x12
	- umulh x4,x7,x12
	- adds x5,x5,x3
	- adcs x6,x6,x4
	- adcs x15,xzr,xzr
	-
	-// ### s2s4 + s1s5 + s0*s6 ###
	- mul x3,x9,x11
	- umulh x4,x9,x11
	- adds x6,x6,x3
	- adcs x15,x15,x4
	-
	- mul x3,x8,x12
	- umulh x4,x8,x12
	- adds x6,x6,x3
	- adcs x15,x15,x4
	- adcs x17,xzr,xzr
	-
	- mul x3,x7,x13
	- umulh x4,x7,x13
	- adds x6,x6,x3
	- adcs x15,x15,x4
	- adcs x17,x17,xzr
	-
	-// ### s3s4 + s2s5 + s1s6 + s0s7 ###
	- mul x3,x10,x11
	- umulh x4,x10,x11
	- adds x15,x15,x3
	- adcs x17,x17,x4
	- adcs x19,xzr,xzr
	-
	- mul x3,x9,x12
	- umulh x4,x9,x12
	- adds x15,x15,x3
	- adcs x17,x17,x4
	- adcs x19,x19,xzr
	-
	- mul x3,x8,x13
	- umulh x4,x8,x13
	- adds x15,x15,x3
	- adcs x17,x17,x4
	- adcs x19,x19,xzr
	-
	- mul x3,x7,x14
	- umulh x4,x7,x14
	- adds x15,x15,x3
	- adcs x17,x17,x4
	- adcs x19,x19,xzr
	-
	-// ### s3s5 + s2s6 + s1*s7 ###
	- mul x3,x10,x12
	- umulh x4,x10,x12
	- adds x17,x17,x3
	- adcs x19,x19,x4
	- adcs x20,xzr,xzr
	-
	- mul x3,x9,x13
	- umulh x4,x9,x13
	- adds x17,x17,x3
	- adcs x19,x19,x4
	- adcs x20,x20,xzr
	-
	- mul x3,x8,x14
	- umulh x4,x8,x14
	- adds x11,x17,x3
	- adcs x19,x19,x4
	- adcs x20,x20,xzr
	-
	-// ### s3s6 + s2s7 ###
	- mul x3,x10,x13
	- umulh x4,x10,x13
	- adds x19,x19,x3
	- adcs x20,x20,x4
	- adcs x17,xzr,xzr
	-
	- mul x3,x9,x14
	- umulh x4,x9,x14
	- adds x12,x19,x3
	- adcs x20,x20,x4
	- adcs x17,x17,xzr
	-
	-// ### s3*s7 ###
	- mul x3,x10,x14
	- umulh x4,x10,x14
	- adds x13,x20,x3
	- adcs x14,x17,x4
	-
	- mov x7,x16
	- mov x8,x5
	- mov x9,x6
	- mov x10,x15
	-
	- // result of mul: s7 s6 s5 s4 s3 s2 s1 s0
	-
	-// ### Reduction ###
	- RDC
	-
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	-
	- // Restore scalar registers
	- ldp x16,x17,[sp,#16]
	- ldp x19,x20,[sp,#64]
	- ldp x29,x30,[sp],#80
	-
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size ecp_sm2p256_mul,.-ecp_sm2p256_mul
	-
	-// void ecp_sm2p256_sqr(BN_ULONG r, const BN_ULONG a);
	-.globl ecp_sm2p256_sqr
	-.type ecp_sm2p256_sqr,%function
	-.align 5
	-
	-ecp_sm2p256_sqr:
	- AARCH64_SIGN_LINK_REGISTER
	- // Store scalar registers
	- stp x29,x30,[sp,#-80]!
	- add x29,sp,#0
	- stp x16,x17,[sp,#16]
	- stp x19,x20,[sp,#64]
	-
	- // Load inputs
	- ldp x11,x12,[x1]
	- ldp x13,x14,[x1,#16]
	-
	-// ### square ###
	- // ========================
	- // s7 s6 s5 s4
	- // * s7 s6 s5 s4
	- // ------------------------
	- // + s4 s4 s4 s4
	- // * * * *
	- // s7 s6 s5 s4
	- // s5 s5 s5 s5
	- // * * * *
	- // s7 s6 s5 s4
	- // s6 s6 s6 s6
	- // * * * *
	- // s7 s6 s5 s4
	- // s7 s7 s7 s7
	- // * * * *
	- // s7 s6 s5 s4
	- // ------------------------
	- // s7 s6 s5 s4 s3 s2 s1 s0
	- // ========================
	-
	-// ### s4*s5 ###
	- mul x8,x11,x12
	- umulh x9,x11,x12
	-
	-// ### s4*s6 ###
	- mul x3,x13,x11
	- umulh x10,x13,x11
	- adds x9,x9,x3
	- adcs x10,x10,xzr
	-
	-// ### s4s7 + s5s6 ###
	- mul x3,x14,x11
	- umulh x4,x14,x11
	- adds x10,x10,x3
	- adcs x7,x4,xzr
	-
	- mul x3,x13,x12
	- umulh x4,x13,x12
	- adds x10,x10,x3
	- adcs x7,x7,x4
	- adcs x5,xzr,xzr
	-
	-// ### s5*s7 ###
	- mul x3,x14,x12
	- umulh x4,x14,x12
	- adds x7,x7,x3
	- adcs x5,x5,x4
	-
	-// ### s6*s7 ###
	- mul x3,x14,x13
	- umulh x4,x14,x13
	- adds x5,x5,x3
	- adcs x6,x4,xzr
	-
	-// ### 2*(t3,t2,s0,s3,s2,s1) ###
	- adds x8,x8,x8
	- adcs x9,x9,x9
	- adcs x10,x10,x10
	- adcs x7,x7,x7
	- adcs x5,x5,x5
	- adcs x6,x6,x6
	- adcs x15,xzr,xzr
	-
	-// ### s4*s4 ###
	- mul x16,x11,x11
	- umulh x17,x11,x11
	-
	-// ### s5*s5 ###
	- mul x11,x12,x12
	- umulh x12,x12,x12
	-
	-// ### s6*s6 ###
	- mul x3,x13,x13
	- umulh x4,x13,x13
	-
	-// ### s7*s7 ###
	- mul x19,x14,x14
	- umulh x20,x14,x14
	-
	- adds x8,x8,x17
	- adcs x9,x9,x11
	- adcs x10,x10,x12
	- adcs x7,x7,x3
	- adcs x5,x5,x4
	- adcs x6,x6,x19
	- adcs x15,x15,x20
	-
	- mov x11,x7
	- mov x7,x16
	- mov x12,x5
	- mov x13,x6
	- mov x14,x15
	-
	- // result of mul: s7 s6 s5 s4 s3 s2 s1 s0
	-
	-// ### Reduction ###
	- RDC
	-
	- stp x7,x8,[x0]
	- stp x9,x10,[x0,#16]
	-
	- // Restore scalar registers
	- ldp x16,x17,[sp,#16]
	- ldp x19,x20,[sp,#64]
	- ldp x29,x30,[sp],#80
	-
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size ecp_sm2p256_sqr,.-ecp_sm2p256_sqr
	diff --git a/sys/crypto/openssl/aarch64/sm3-armv8.S b/sys/crypto/openssl/aarch64/sm3-armv8.S
	deleted file mode 100644
	--- a/sys/crypto/openssl/aarch64/sm3-armv8.S
	+++ /dev/null
	@@ -1,509 +0,0 @@
	-/* Do not modify. This file is auto-generated from sm3-armv8.pl. */
	-// Copyright 2021-2025 The OpenSSL Project Authors. All Rights Reserved.
	-//
	-// Licensed under the Apache License 2.0 (the "License"). You may not use
	-// this file except in compliance with the License. You can obtain a copy
	-// in the file LICENSE in the source distribution or at
	-// https://www.openssl.org/source/license.html
	-//
	-// This module implements support for Armv8 SM3 instructions
	-
	-// $output is the last argument if it looks like a file (it has an extension)
	-// $flavour is the first argument if it doesn't look like a file
	-#include "arm_arch.h"
	-.text
	-.globl ossl_hwsm3_block_data_order
	-.type ossl_hwsm3_block_data_order,%function
	-.align 5
	-ossl_hwsm3_block_data_order:
	- AARCH64_VALID_CALL_TARGET
	- // load state
	- ld1 {v5.4s,v6.4s}, [x0]
	- rev64 v5.4s, v5.4s
	- rev64 v6.4s, v6.4s
	- ext v5.16b, v5.16b, v5.16b, #8
	- ext v6.16b, v6.16b, v6.16b, #8
	- adrp x8, .Tj
	- add x8, x8, #:lo12:.Tj
	- ldp s16, s17, [x8]
	-
	-.Loop:
	- // load input
	- ld1 {v0.4s,v1.4s,v2.4s,v3.4s}, [x1], #64
	- sub w2, w2, #1
	-
	- mov v18.16b, v5.16b
	- mov v19.16b, v6.16b
	-
	-#ifndef __AARCH64EB__
	- rev32 v0.16b, v0.16b
	- rev32 v1.16b, v1.16b
	- rev32 v2.16b, v2.16b
	- rev32 v3.16b, v3.16b
	-#endif
	-
	- ext v20.16b, v16.16b, v16.16b, #4
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v4.16b, v1.16b, v2.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v0.16b, v1.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v2.16b, v3.16b, #8
	-.inst 0xce63c004 //sm3partw1 v4.4s, v0.4s, v3.4s
	-.inst 0xce76c6e4 //sm3partw2 v4.4s, v23.4s, v22.4s
	- eor v22.16b, v0.16b, v1.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5682e5 //sm3tt1a v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce408ae6 //sm3tt2a v6.4s, v23.4s, v0.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5692e5 //sm3tt1a v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce409ae6 //sm3tt2a v6.4s, v23.4s, v0.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a2e5 //sm3tt1a v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce40aae6 //sm3tt2a v6.4s, v23.4s, v0.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b2e5 //sm3tt1a v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce40bae6 //sm3tt2a v6.4s, v23.4s, v0.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v0.16b, v2.16b, v3.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v1.16b, v2.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v3.16b, v4.16b, #8
	-.inst 0xce64c020 //sm3partw1 v0.4s, v1.4s, v4.4s
	-.inst 0xce76c6e0 //sm3partw2 v0.4s, v23.4s, v22.4s
	- eor v22.16b, v1.16b, v2.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5682e5 //sm3tt1a v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce418ae6 //sm3tt2a v6.4s, v23.4s, v1.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5692e5 //sm3tt1a v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce419ae6 //sm3tt2a v6.4s, v23.4s, v1.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a2e5 //sm3tt1a v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce41aae6 //sm3tt2a v6.4s, v23.4s, v1.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b2e5 //sm3tt1a v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce41bae6 //sm3tt2a v6.4s, v23.4s, v1.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v1.16b, v3.16b, v4.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v2.16b, v3.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v4.16b, v0.16b, #8
	-.inst 0xce60c041 //sm3partw1 v1.4s, v2.4s, v0.4s
	-.inst 0xce76c6e1 //sm3partw2 v1.4s, v23.4s, v22.4s
	- eor v22.16b, v2.16b, v3.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5682e5 //sm3tt1a v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce428ae6 //sm3tt2a v6.4s, v23.4s, v2.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5692e5 //sm3tt1a v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce429ae6 //sm3tt2a v6.4s, v23.4s, v2.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a2e5 //sm3tt1a v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce42aae6 //sm3tt2a v6.4s, v23.4s, v2.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b2e5 //sm3tt1a v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce42bae6 //sm3tt2a v6.4s, v23.4s, v2.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v2.16b, v4.16b, v0.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v3.16b, v4.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v0.16b, v1.16b, #8
	-.inst 0xce61c062 //sm3partw1 v2.4s, v3.4s, v1.4s
	-.inst 0xce76c6e2 //sm3partw2 v2.4s, v23.4s, v22.4s
	- eor v22.16b, v3.16b, v4.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5682e5 //sm3tt1a v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce438ae6 //sm3tt2a v6.4s, v23.4s, v3.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5692e5 //sm3tt1a v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce439ae6 //sm3tt2a v6.4s, v23.4s, v3.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a2e5 //sm3tt1a v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce43aae6 //sm3tt2a v6.4s, v23.4s, v3.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b2e5 //sm3tt1a v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce43bae6 //sm3tt2a v6.4s, v23.4s, v3.4s[3]
	- ext v20.16b, v17.16b, v17.16b, #4
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v3.16b, v0.16b, v1.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v4.16b, v0.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v1.16b, v2.16b, #8
	-.inst 0xce62c083 //sm3partw1 v3.4s, v4.4s, v2.4s
	-.inst 0xce76c6e3 //sm3partw2 v3.4s, v23.4s, v22.4s
	- eor v22.16b, v4.16b, v0.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce448ee6 //sm3tt2b v6.4s, v23.4s, v4.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce449ee6 //sm3tt2b v6.4s, v23.4s, v4.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce44aee6 //sm3tt2b v6.4s, v23.4s, v4.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce44bee6 //sm3tt2b v6.4s, v23.4s, v4.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v4.16b, v1.16b, v2.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v0.16b, v1.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v2.16b, v3.16b, #8
	-.inst 0xce63c004 //sm3partw1 v4.4s, v0.4s, v3.4s
	-.inst 0xce76c6e4 //sm3partw2 v4.4s, v23.4s, v22.4s
	- eor v22.16b, v0.16b, v1.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce408ee6 //sm3tt2b v6.4s, v23.4s, v0.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce409ee6 //sm3tt2b v6.4s, v23.4s, v0.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce40aee6 //sm3tt2b v6.4s, v23.4s, v0.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce40bee6 //sm3tt2b v6.4s, v23.4s, v0.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v0.16b, v2.16b, v3.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v1.16b, v2.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v3.16b, v4.16b, #8
	-.inst 0xce64c020 //sm3partw1 v0.4s, v1.4s, v4.4s
	-.inst 0xce76c6e0 //sm3partw2 v0.4s, v23.4s, v22.4s
	- eor v22.16b, v1.16b, v2.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce418ee6 //sm3tt2b v6.4s, v23.4s, v1.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce419ee6 //sm3tt2b v6.4s, v23.4s, v1.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce41aee6 //sm3tt2b v6.4s, v23.4s, v1.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce41bee6 //sm3tt2b v6.4s, v23.4s, v1.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v1.16b, v3.16b, v4.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v2.16b, v3.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v4.16b, v0.16b, #8
	-.inst 0xce60c041 //sm3partw1 v1.4s, v2.4s, v0.4s
	-.inst 0xce76c6e1 //sm3partw2 v1.4s, v23.4s, v22.4s
	- eor v22.16b, v2.16b, v3.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce428ee6 //sm3tt2b v6.4s, v23.4s, v2.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce429ee6 //sm3tt2b v6.4s, v23.4s, v2.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce42aee6 //sm3tt2b v6.4s, v23.4s, v2.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce42bee6 //sm3tt2b v6.4s, v23.4s, v2.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v2.16b, v4.16b, v0.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v3.16b, v4.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v0.16b, v1.16b, #8
	-.inst 0xce61c062 //sm3partw1 v2.4s, v3.4s, v1.4s
	-.inst 0xce76c6e2 //sm3partw2 v2.4s, v23.4s, v22.4s
	- eor v22.16b, v3.16b, v4.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce438ee6 //sm3tt2b v6.4s, v23.4s, v3.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce439ee6 //sm3tt2b v6.4s, v23.4s, v3.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce43aee6 //sm3tt2b v6.4s, v23.4s, v3.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce43bee6 //sm3tt2b v6.4s, v23.4s, v3.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v3.16b, v0.16b, v1.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v4.16b, v0.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v1.16b, v2.16b, #8
	-.inst 0xce62c083 //sm3partw1 v3.4s, v4.4s, v2.4s
	-.inst 0xce76c6e3 //sm3partw2 v3.4s, v23.4s, v22.4s
	- eor v22.16b, v4.16b, v0.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce448ee6 //sm3tt2b v6.4s, v23.4s, v4.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce449ee6 //sm3tt2b v6.4s, v23.4s, v4.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce44aee6 //sm3tt2b v6.4s, v23.4s, v4.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce44bee6 //sm3tt2b v6.4s, v23.4s, v4.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v4.16b, v1.16b, v2.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v0.16b, v1.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v2.16b, v3.16b, #8
	-.inst 0xce63c004 //sm3partw1 v4.4s, v0.4s, v3.4s
	-.inst 0xce76c6e4 //sm3partw2 v4.4s, v23.4s, v22.4s
	- eor v22.16b, v0.16b, v1.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce408ee6 //sm3tt2b v6.4s, v23.4s, v0.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce409ee6 //sm3tt2b v6.4s, v23.4s, v0.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce40aee6 //sm3tt2b v6.4s, v23.4s, v0.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce40bee6 //sm3tt2b v6.4s, v23.4s, v0.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v0.16b, v2.16b, v3.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v1.16b, v2.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v3.16b, v4.16b, #8
	-.inst 0xce64c020 //sm3partw1 v0.4s, v1.4s, v4.4s
	-.inst 0xce76c6e0 //sm3partw2 v0.4s, v23.4s, v22.4s
	- eor v22.16b, v1.16b, v2.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce418ee6 //sm3tt2b v6.4s, v23.4s, v1.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce419ee6 //sm3tt2b v6.4s, v23.4s, v1.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce41aee6 //sm3tt2b v6.4s, v23.4s, v1.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce41bee6 //sm3tt2b v6.4s, v23.4s, v1.4s[3]
	- // s4 = w7 \| w8 \| w9 \| w10
	- ext v1.16b, v3.16b, v4.16b, #12
	- // vtmp1 = w3 \| w4 \| w5 \| w6
	- ext v22.16b, v2.16b, v3.16b, #12
	- // vtmp2 = w10 \| w11 \| w12 \| w13
	- ext v23.16b, v4.16b, v0.16b, #8
	-.inst 0xce60c041 //sm3partw1 v1.4s, v2.4s, v0.4s
	-.inst 0xce76c6e1 //sm3partw2 v1.4s, v23.4s, v22.4s
	- eor v22.16b, v2.16b, v3.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce428ee6 //sm3tt2b v6.4s, v23.4s, v2.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce429ee6 //sm3tt2b v6.4s, v23.4s, v2.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce42aee6 //sm3tt2b v6.4s, v23.4s, v2.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce42bee6 //sm3tt2b v6.4s, v23.4s, v2.4s[3]
	- eor v22.16b, v3.16b, v4.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce438ee6 //sm3tt2b v6.4s, v23.4s, v3.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce439ee6 //sm3tt2b v6.4s, v23.4s, v3.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce43aee6 //sm3tt2b v6.4s, v23.4s, v3.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce43bee6 //sm3tt2b v6.4s, v23.4s, v3.4s[3]
	- eor v22.16b, v4.16b, v0.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce448ee6 //sm3tt2b v6.4s, v23.4s, v4.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce449ee6 //sm3tt2b v6.4s, v23.4s, v4.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce44aee6 //sm3tt2b v6.4s, v23.4s, v4.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce44bee6 //sm3tt2b v6.4s, v23.4s, v4.4s[3]
	- eor v22.16b, v0.16b, v1.16b
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce5686e5 //sm3tt1b v5.4s, v23.4s, v22.4s[0]
	-.inst 0xce408ee6 //sm3tt2b v6.4s, v23.4s, v0.4s[0]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce5696e5 //sm3tt1b v5.4s, v23.4s, v22.4s[1]
	-.inst 0xce409ee6 //sm3tt2b v6.4s, v23.4s, v0.4s[1]
	-.inst 0xce5418b7 //sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s
	- shl v21.4s, v20.4s, #1
	- sri v21.4s, v20.4s, #31
	-.inst 0xce56a6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[2]
	-.inst 0xce40aee6 //sm3tt2b v6.4s, v23.4s, v0.4s[2]
	-.inst 0xce5518b7 //sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s
	- shl v20.4s, v21.4s, #1
	- sri v20.4s, v21.4s, #31
	-.inst 0xce56b6e5 //sm3tt1b v5.4s, v23.4s, v22.4s[3]
	-.inst 0xce40bee6 //sm3tt2b v6.4s, v23.4s, v0.4s[3]
	- eor v5.16b, v5.16b, v18.16b
	- eor v6.16b, v6.16b, v19.16b
	-
	- // any remained blocks?
	- cbnz w2, .Loop
	-
	- // save state
	- rev64 v5.4s, v5.4s
	- rev64 v6.4s, v6.4s
	- ext v5.16b, v5.16b, v5.16b, #8
	- ext v6.16b, v6.16b, v6.16b, #8
	- st1 {v5.4s,v6.4s}, [x0]
	- ret
	-.size ossl_hwsm3_block_data_order,.-ossl_hwsm3_block_data_order
	-.section .rodata
	-
	-.type _sm3_consts,%object
	-.align 3
	-_sm3_consts:
	-.Tj:
	-.word 0x79cc4519, 0x9d8a7a87
	-.size _sm3_consts,.-_sm3_consts
	-.previous
	diff --git a/sys/crypto/openssl/aarch64/sm4-armv8.S b/sys/crypto/openssl/aarch64/sm4-armv8.S
	deleted file mode 100644
	--- a/sys/crypto/openssl/aarch64/sm4-armv8.S
	+++ /dev/null
	@@ -1,1093 +0,0 @@
	-/* Do not modify. This file is auto-generated from sm4-armv8.pl. */
	-// Copyright 2022-2025 The OpenSSL Project Authors. All Rights Reserved.
	-//
	-// Licensed under the Apache License 2.0 (the "License"). You may not use
	-// this file except in compliance with the License. You can obtain a copy
	-// in the file LICENSE in the source distribution or at
	-// https://www.openssl.org/source/license.html
	-
	-//
	-// This module implements support for SM4 hw support on aarch64
	-// Oct 2021
	-//
	-
	-// $output is the last argument if it looks like a file (it has an extension)
	-// $flavour is the first argument if it doesn't look like a file
	-#include "arm_arch.h"
	-.arch armv8-a+crypto
	-.text
	-
	-.section .rodata
	-.type _sm4_v8_consts,%object
	-.align 6
	-_sm4_v8_consts:
	-.Lck:
	-.long 0x00070E15, 0x1C232A31, 0x383F464D, 0x545B6269
	-.long 0x70777E85, 0x8C939AA1, 0xA8AFB6BD, 0xC4CBD2D9
	-.long 0xE0E7EEF5, 0xFC030A11, 0x181F262D, 0x343B4249
	-.long 0x50575E65, 0x6C737A81, 0x888F969D, 0xA4ABB2B9
	-.long 0xC0C7CED5, 0xDCE3EAF1, 0xF8FF060D, 0x141B2229
	-.long 0x30373E45, 0x4C535A61, 0x686F767D, 0x848B9299
	-.long 0xA0A7AEB5, 0xBCC3CAD1, 0xD8DFE6ED, 0xF4FB0209
	-.long 0x10171E25, 0x2C333A41, 0x484F565D, 0x646B7279
	-.Lfk:
	-.long 0xa3b1bac6, 0x56aa3350, 0x677d9197, 0xb27022dc
	-.size _sm4_v8_consts,.-_sm4_v8_consts
	-.previous
	-
	-.globl sm4_v8_set_encrypt_key
	-.type sm4_v8_set_encrypt_key,%function
	-.align 5
	-sm4_v8_set_encrypt_key:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v0.4s},[x0]
	- adrp x2,.Lfk
	- add x2,x2,#:lo12:.Lfk
	- ld1 {v24.4s},[x2]
	- adrp x2,.Lck
	- add x2,x2,#:lo12:.Lck
	- ld1 {v16.4s,v17.4s,v18.4s,v19.4s},[x2],64
	-#ifndef __AARCH64EB__
	- rev32 v0.16b,v0.16b
	-#endif
	- ld1 {v20.4s,v21.4s,v22.4s,v23.4s},[x2]
	- eor v0.16b,v0.16b,v24.16b;
	-.inst 0xce70c800 //sm4ekey v0.4S,v0.4S,v16.4S
	-.inst 0xce71c801 //sm4ekey v1.4S,v0.4S,v17.4S
	-.inst 0xce72c822 //sm4ekey v2.4S,v1.4S,v18.4S
	-.inst 0xce73c843 //sm4ekey v3.4S,v2.4S,v19.4S
	-.inst 0xce74c864 //sm4ekey v4.4S,v3.4S,v20.4S
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],64
	-.inst 0xce75c885 //sm4ekey v5.4S,v4.4S,v21.4S
	-.inst 0xce76c8a6 //sm4ekey v6.4S,v5.4S,v22.4S
	-.inst 0xce77c8c7 //sm4ekey v7.4S,v6.4S,v23.4S
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1]
	- ret
	-.size sm4_v8_set_encrypt_key,.-sm4_v8_set_encrypt_key
	-.globl sm4_v8_set_decrypt_key
	-.type sm4_v8_set_decrypt_key,%function
	-.align 5
	-sm4_v8_set_decrypt_key:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v7.4s},[x0]
	- adrp x2,.Lfk
	- add x2,x2,#:lo12:.Lfk
	- ld1 {v24.4s},[x2]
	- adrp x2,.Lck
	- add x2,x2,#:lo12:.Lck
	- ld1 {v16.4s,v17.4s,v18.4s,v19.4s},[x2],64
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- ld1 {v20.4s,v21.4s,v22.4s,v23.4s},[x2]
	- eor v7.16b, v7.16b,v24.16b;
	-.inst 0xce70c8e7 //sm4ekey v7.4S,v7.4S,v16.4S
	-.inst 0xce71c8e6 //sm4ekey v6.4S,v7.4S,v17.4S
	-.inst 0xce72c8c5 //sm4ekey v5.4S,v6.4S,v18.4S
	- rev64 v7.4s,v7.4s
	- rev64 v6.4s,v6.4s
	- ext v7.16b,v7.16b,v7.16b,#8
	- ext v6.16b,v6.16b,v6.16b,#8
	-.inst 0xce73c8a4 //sm4ekey v4.4S,v5.4S,v19.4S
	-.inst 0xce74c883 //sm4ekey v3.4S,v4.4S,v20.4S
	- rev64 v5.4s,v5.4s
	- rev64 v4.4s,v4.4s
	- ext v5.16b,v5.16b,v5.16b,#8
	- ext v4.16b,v4.16b,v4.16b,#8
	-.inst 0xce75c862 //sm4ekey v2.4S,v3.4S,v21.4S
	-.inst 0xce76c841 //sm4ekey v1.4S,v2.4S,v22.4S
	- rev64 v3.4s,v3.4s
	- rev64 v2.4s,v2.4s
	- ext v3.16b,v3.16b,v3.16b,#8
	- ext v2.16b,v2.16b,v2.16b,#8
	-.inst 0xce77c820 //sm4ekey v0.4S,v1.4S,v23.4S
	- rev64 v1.4s, v1.4s
	- rev64 v0.4s, v0.4s
	- ext v1.16b,v1.16b,v1.16b,#8
	- ext v0.16b,v0.16b,v0.16b,#8
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],64
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1]
	- ret
	-.size sm4_v8_set_decrypt_key,.-sm4_v8_set_decrypt_key
	-.globl sm4_v8_encrypt
	-.type sm4_v8_encrypt,%function
	-.align 5
	-sm4_v8_encrypt:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v16.4s},[x0]
	- ld1 {v0.4s,v1.4s,v2.4s,v3.4s},[x2],64
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x2]
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	- ext v16.16b,v16.16b,v16.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- st1 {v16.4s},[x1]
	- ret
	-.size sm4_v8_encrypt,.-sm4_v8_encrypt
	-.globl sm4_v8_decrypt
	-.type sm4_v8_decrypt,%function
	-.align 5
	-sm4_v8_decrypt:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v16.4s},[x0]
	- ld1 {v0.4s,v1.4s,v2.4s,v3.4s},[x2],64
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x2]
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	- ext v16.16b,v16.16b,v16.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- st1 {v16.4s},[x1]
	- ret
	-.size sm4_v8_decrypt,.-sm4_v8_decrypt
	-.globl sm4_v8_ecb_encrypt
	-.type sm4_v8_ecb_encrypt,%function
	-.align 5
	-sm4_v8_ecb_encrypt:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v0.4s,v1.4s,v2.4s,v3.4s},[x3],#64
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x3]
	-1:
	- cmp x2,#64
	- b.lt 1f
	- ld1 {v16.4s,v17.4s,v18.4s,v19.4s},[x0],#64
	- cmp x2,#128
	- b.lt 2f
	- ld1 {v20.4s,v21.4s,v22.4s,v23.4s},[x0],#64
	- // 8 blocks
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v20.16b,v20.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v21.16b,v21.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v22.16b,v22.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v23.16b,v23.16b
	-#endif
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08411 //sm4e v17.4s,v0.4s
	-.inst 0xcec08412 //sm4e v18.4s,v0.4s
	-.inst 0xcec08413 //sm4e v19.4s,v0.4s
	-
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08431 //sm4e v17.4s,v1.4s
	-.inst 0xcec08432 //sm4e v18.4s,v1.4s
	-.inst 0xcec08433 //sm4e v19.4s,v1.4s
	-
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08451 //sm4e v17.4s,v2.4s
	-.inst 0xcec08452 //sm4e v18.4s,v2.4s
	-.inst 0xcec08453 //sm4e v19.4s,v2.4s
	-
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08471 //sm4e v17.4s,v3.4s
	-.inst 0xcec08472 //sm4e v18.4s,v3.4s
	-.inst 0xcec08473 //sm4e v19.4s,v3.4s
	-
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec08491 //sm4e v17.4s,v4.4s
	-.inst 0xcec08492 //sm4e v18.4s,v4.4s
	-.inst 0xcec08493 //sm4e v19.4s,v4.4s
	-
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084b1 //sm4e v17.4s,v5.4s
	-.inst 0xcec084b2 //sm4e v18.4s,v5.4s
	-.inst 0xcec084b3 //sm4e v19.4s,v5.4s
	-
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084d1 //sm4e v17.4s,v6.4s
	-.inst 0xcec084d2 //sm4e v18.4s,v6.4s
	-.inst 0xcec084d3 //sm4e v19.4s,v6.4s
	-
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	-.inst 0xcec084f1 //sm4e v17.4s,v7.4s
	- ext v16.16b,v16.16b,v16.16b,#8
	- rev64 v17.4S,v17.4S
	-.inst 0xcec084f2 //sm4e v18.4s,v7.4s
	- ext v17.16b,v17.16b,v17.16b,#8
	- rev64 v18.4S,v18.4S
	-.inst 0xcec084f3 //sm4e v19.4s,v7.4s
	- ext v18.16b,v18.16b,v18.16b,#8
	- rev64 v19.4S,v19.4S
	- ext v19.16b,v19.16b,v19.16b,#8
	-.inst 0xcec08414 //sm4e v20.4s,v0.4s
	-.inst 0xcec08415 //sm4e v21.4s,v0.4s
	-.inst 0xcec08416 //sm4e v22.4s,v0.4s
	-.inst 0xcec08417 //sm4e v23.4s,v0.4s
	-
	-.inst 0xcec08434 //sm4e v20.4s,v1.4s
	-.inst 0xcec08435 //sm4e v21.4s,v1.4s
	-.inst 0xcec08436 //sm4e v22.4s,v1.4s
	-.inst 0xcec08437 //sm4e v23.4s,v1.4s
	-
	-.inst 0xcec08454 //sm4e v20.4s,v2.4s
	-.inst 0xcec08455 //sm4e v21.4s,v2.4s
	-.inst 0xcec08456 //sm4e v22.4s,v2.4s
	-.inst 0xcec08457 //sm4e v23.4s,v2.4s
	-
	-.inst 0xcec08474 //sm4e v20.4s,v3.4s
	-.inst 0xcec08475 //sm4e v21.4s,v3.4s
	-.inst 0xcec08476 //sm4e v22.4s,v3.4s
	-.inst 0xcec08477 //sm4e v23.4s,v3.4s
	-
	-.inst 0xcec08494 //sm4e v20.4s,v4.4s
	-.inst 0xcec08495 //sm4e v21.4s,v4.4s
	-.inst 0xcec08496 //sm4e v22.4s,v4.4s
	-.inst 0xcec08497 //sm4e v23.4s,v4.4s
	-
	-.inst 0xcec084b4 //sm4e v20.4s,v5.4s
	-.inst 0xcec084b5 //sm4e v21.4s,v5.4s
	-.inst 0xcec084b6 //sm4e v22.4s,v5.4s
	-.inst 0xcec084b7 //sm4e v23.4s,v5.4s
	-
	-.inst 0xcec084d4 //sm4e v20.4s,v6.4s
	-.inst 0xcec084d5 //sm4e v21.4s,v6.4s
	-.inst 0xcec084d6 //sm4e v22.4s,v6.4s
	-.inst 0xcec084d7 //sm4e v23.4s,v6.4s
	-
	-.inst 0xcec084f4 //sm4e v20.4s,v7.4s
	- rev64 v20.4S,v20.4S
	-.inst 0xcec084f5 //sm4e v21.4s,v7.4s
	- ext v20.16b,v20.16b,v20.16b,#8
	- rev64 v21.4S,v21.4S
	-.inst 0xcec084f6 //sm4e v22.4s,v7.4s
	- ext v21.16b,v21.16b,v21.16b,#8
	- rev64 v22.4S,v22.4S
	-.inst 0xcec084f7 //sm4e v23.4s,v7.4s
	- ext v22.16b,v22.16b,v22.16b,#8
	- rev64 v23.4S,v23.4S
	- ext v23.16b,v23.16b,v23.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v20.16b,v20.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v21.16b,v21.16b
	-#endif
	- st1 {v16.4s,v17.4s,v18.4s,v19.4s},[x1],#64
	-#ifndef __AARCH64EB__
	- rev32 v22.16b,v22.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v23.16b,v23.16b
	-#endif
	- st1 {v20.4s,v21.4s,v22.4s,v23.4s},[x1],#64
	- subs x2,x2,#128
	- b.gt 1b
	- ret
	- // 4 blocks
	-2:
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08411 //sm4e v17.4s,v0.4s
	-.inst 0xcec08412 //sm4e v18.4s,v0.4s
	-.inst 0xcec08413 //sm4e v19.4s,v0.4s
	-
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08431 //sm4e v17.4s,v1.4s
	-.inst 0xcec08432 //sm4e v18.4s,v1.4s
	-.inst 0xcec08433 //sm4e v19.4s,v1.4s
	-
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08451 //sm4e v17.4s,v2.4s
	-.inst 0xcec08452 //sm4e v18.4s,v2.4s
	-.inst 0xcec08453 //sm4e v19.4s,v2.4s
	-
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08471 //sm4e v17.4s,v3.4s
	-.inst 0xcec08472 //sm4e v18.4s,v3.4s
	-.inst 0xcec08473 //sm4e v19.4s,v3.4s
	-
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec08491 //sm4e v17.4s,v4.4s
	-.inst 0xcec08492 //sm4e v18.4s,v4.4s
	-.inst 0xcec08493 //sm4e v19.4s,v4.4s
	-
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084b1 //sm4e v17.4s,v5.4s
	-.inst 0xcec084b2 //sm4e v18.4s,v5.4s
	-.inst 0xcec084b3 //sm4e v19.4s,v5.4s
	-
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084d1 //sm4e v17.4s,v6.4s
	-.inst 0xcec084d2 //sm4e v18.4s,v6.4s
	-.inst 0xcec084d3 //sm4e v19.4s,v6.4s
	-
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	-.inst 0xcec084f1 //sm4e v17.4s,v7.4s
	- ext v16.16b,v16.16b,v16.16b,#8
	- rev64 v17.4S,v17.4S
	-.inst 0xcec084f2 //sm4e v18.4s,v7.4s
	- ext v17.16b,v17.16b,v17.16b,#8
	- rev64 v18.4S,v18.4S
	-.inst 0xcec084f3 //sm4e v19.4s,v7.4s
	- ext v18.16b,v18.16b,v18.16b,#8
	- rev64 v19.4S,v19.4S
	- ext v19.16b,v19.16b,v19.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	- st1 {v16.4s,v17.4s,v18.4s,v19.4s},[x1],#64
	- subs x2,x2,#64
	- b.gt 1b
	-1:
	- subs x2,x2,#16
	- b.lt 1f
	- ld1 {v16.4s},[x0],#16
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	- ext v16.16b,v16.16b,v16.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- st1 {v16.4s},[x1],#16
	- b.ne 1b
	-1:
	- ret
	-.size sm4_v8_ecb_encrypt,.-sm4_v8_ecb_encrypt
	-.globl sm4_v8_cbc_encrypt
	-.type sm4_v8_cbc_encrypt,%function
	-.align 5
	-sm4_v8_cbc_encrypt:
	- AARCH64_VALID_CALL_TARGET
	- stp d8,d9,[sp, #-16]!
	-
	- ld1 {v0.4s,v1.4s,v2.4s,v3.4s},[x3],#64
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x3]
	- ld1 {v8.4s},[x4]
	- cmp w5,#0
	- b.eq .Ldec
	-1:
	- cmp x2, #64
	- b.lt 1f
	- ld1 {v16.4s,v17.4s,v18.4s,v19.4s},[x0],#64
	- eor v16.16b,v16.16b,v8.16b
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	- ext v16.16b,v16.16b,v16.16b,#8
	- eor v17.16b,v17.16b,v16.16b
	-.inst 0xcec08411 //sm4e v17.4s,v0.4s
	-.inst 0xcec08431 //sm4e v17.4s,v1.4s
	-.inst 0xcec08451 //sm4e v17.4s,v2.4s
	-.inst 0xcec08471 //sm4e v17.4s,v3.4s
	-.inst 0xcec08491 //sm4e v17.4s,v4.4s
	-.inst 0xcec084b1 //sm4e v17.4s,v5.4s
	-.inst 0xcec084d1 //sm4e v17.4s,v6.4s
	-.inst 0xcec084f1 //sm4e v17.4s,v7.4s
	- rev64 v17.4S,v17.4S
	- ext v17.16b,v17.16b,v17.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- eor v18.16b,v18.16b,v17.16b
	-.inst 0xcec08412 //sm4e v18.4s,v0.4s
	-.inst 0xcec08432 //sm4e v18.4s,v1.4s
	-.inst 0xcec08452 //sm4e v18.4s,v2.4s
	-.inst 0xcec08472 //sm4e v18.4s,v3.4s
	-.inst 0xcec08492 //sm4e v18.4s,v4.4s
	-.inst 0xcec084b2 //sm4e v18.4s,v5.4s
	-.inst 0xcec084d2 //sm4e v18.4s,v6.4s
	-.inst 0xcec084f2 //sm4e v18.4s,v7.4s
	- rev64 v18.4S,v18.4S
	- ext v18.16b,v18.16b,v18.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	- eor v19.16b,v19.16b,v18.16b
	-.inst 0xcec08413 //sm4e v19.4s,v0.4s
	-.inst 0xcec08433 //sm4e v19.4s,v1.4s
	-.inst 0xcec08453 //sm4e v19.4s,v2.4s
	-.inst 0xcec08473 //sm4e v19.4s,v3.4s
	-.inst 0xcec08493 //sm4e v19.4s,v4.4s
	-.inst 0xcec084b3 //sm4e v19.4s,v5.4s
	-.inst 0xcec084d3 //sm4e v19.4s,v6.4s
	-.inst 0xcec084f3 //sm4e v19.4s,v7.4s
	- rev64 v19.4S,v19.4S
	- ext v19.16b,v19.16b,v19.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	- mov v8.16b,v19.16b
	- st1 {v16.4s,v17.4s,v18.4s,v19.4s},[x1],#64
	- subs x2,x2,#64
	- b.ne 1b
	-1:
	- subs x2,x2,#16
	- b.lt 3f
	- ld1 {v16.4s},[x0],#16
	- eor v8.16b,v8.16b,v16.16b
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	-.inst 0xcec08408 //sm4e v8.4s,v0.4s
	-.inst 0xcec08428 //sm4e v8.4s,v1.4s
	-.inst 0xcec08448 //sm4e v8.4s,v2.4s
	-.inst 0xcec08468 //sm4e v8.4s,v3.4s
	-.inst 0xcec08488 //sm4e v8.4s,v4.4s
	-.inst 0xcec084a8 //sm4e v8.4s,v5.4s
	-.inst 0xcec084c8 //sm4e v8.4s,v6.4s
	-.inst 0xcec084e8 //sm4e v8.4s,v7.4s
	- rev64 v8.4S,v8.4S
	- ext v8.16b,v8.16b,v8.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- st1 {v8.4s},[x1],#16
	- b.ne 1b
	- b 3f
	-.Ldec:
	-1:
	- cmp x2, #64
	- b.lt 1f
	- ld1 {v16.4s,v17.4s,v18.4s,v19.4s},[x0]
	- ld1 {v24.4s,v25.4s,v26.4s,v27.4s},[x0],#64
	- cmp x2,#128
	- b.lt 2f
	- // 8 blocks mode
	- ld1 {v20.4s,v21.4s,v22.4s,v23.4s},[x0]
	- ld1 {v28.4s,v29.4s,v30.4s,v31.4s},[x0],#64
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v20.16b,v20.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v21.16b,v21.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v22.16b,v22.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v23.16b,v23.16b
	-#endif
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08411 //sm4e v17.4s,v0.4s
	-.inst 0xcec08412 //sm4e v18.4s,v0.4s
	-.inst 0xcec08413 //sm4e v19.4s,v0.4s
	-
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08431 //sm4e v17.4s,v1.4s
	-.inst 0xcec08432 //sm4e v18.4s,v1.4s
	-.inst 0xcec08433 //sm4e v19.4s,v1.4s
	-
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08451 //sm4e v17.4s,v2.4s
	-.inst 0xcec08452 //sm4e v18.4s,v2.4s
	-.inst 0xcec08453 //sm4e v19.4s,v2.4s
	-
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08471 //sm4e v17.4s,v3.4s
	-.inst 0xcec08472 //sm4e v18.4s,v3.4s
	-.inst 0xcec08473 //sm4e v19.4s,v3.4s
	-
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec08491 //sm4e v17.4s,v4.4s
	-.inst 0xcec08492 //sm4e v18.4s,v4.4s
	-.inst 0xcec08493 //sm4e v19.4s,v4.4s
	-
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084b1 //sm4e v17.4s,v5.4s
	-.inst 0xcec084b2 //sm4e v18.4s,v5.4s
	-.inst 0xcec084b3 //sm4e v19.4s,v5.4s
	-
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084d1 //sm4e v17.4s,v6.4s
	-.inst 0xcec084d2 //sm4e v18.4s,v6.4s
	-.inst 0xcec084d3 //sm4e v19.4s,v6.4s
	-
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	-.inst 0xcec084f1 //sm4e v17.4s,v7.4s
	- ext v16.16b,v16.16b,v16.16b,#8
	- rev64 v17.4S,v17.4S
	-.inst 0xcec084f2 //sm4e v18.4s,v7.4s
	- ext v17.16b,v17.16b,v17.16b,#8
	- rev64 v18.4S,v18.4S
	-.inst 0xcec084f3 //sm4e v19.4s,v7.4s
	- ext v18.16b,v18.16b,v18.16b,#8
	- rev64 v19.4S,v19.4S
	- ext v19.16b,v19.16b,v19.16b,#8
	-.inst 0xcec08414 //sm4e v20.4s,v0.4s
	-.inst 0xcec08415 //sm4e v21.4s,v0.4s
	-.inst 0xcec08416 //sm4e v22.4s,v0.4s
	-.inst 0xcec08417 //sm4e v23.4s,v0.4s
	-
	-.inst 0xcec08434 //sm4e v20.4s,v1.4s
	-.inst 0xcec08435 //sm4e v21.4s,v1.4s
	-.inst 0xcec08436 //sm4e v22.4s,v1.4s
	-.inst 0xcec08437 //sm4e v23.4s,v1.4s
	-
	-.inst 0xcec08454 //sm4e v20.4s,v2.4s
	-.inst 0xcec08455 //sm4e v21.4s,v2.4s
	-.inst 0xcec08456 //sm4e v22.4s,v2.4s
	-.inst 0xcec08457 //sm4e v23.4s,v2.4s
	-
	-.inst 0xcec08474 //sm4e v20.4s,v3.4s
	-.inst 0xcec08475 //sm4e v21.4s,v3.4s
	-.inst 0xcec08476 //sm4e v22.4s,v3.4s
	-.inst 0xcec08477 //sm4e v23.4s,v3.4s
	-
	-.inst 0xcec08494 //sm4e v20.4s,v4.4s
	-.inst 0xcec08495 //sm4e v21.4s,v4.4s
	-.inst 0xcec08496 //sm4e v22.4s,v4.4s
	-.inst 0xcec08497 //sm4e v23.4s,v4.4s
	-
	-.inst 0xcec084b4 //sm4e v20.4s,v5.4s
	-.inst 0xcec084b5 //sm4e v21.4s,v5.4s
	-.inst 0xcec084b6 //sm4e v22.4s,v5.4s
	-.inst 0xcec084b7 //sm4e v23.4s,v5.4s
	-
	-.inst 0xcec084d4 //sm4e v20.4s,v6.4s
	-.inst 0xcec084d5 //sm4e v21.4s,v6.4s
	-.inst 0xcec084d6 //sm4e v22.4s,v6.4s
	-.inst 0xcec084d7 //sm4e v23.4s,v6.4s
	-
	-.inst 0xcec084f4 //sm4e v20.4s,v7.4s
	- rev64 v20.4S,v20.4S
	-.inst 0xcec084f5 //sm4e v21.4s,v7.4s
	- ext v20.16b,v20.16b,v20.16b,#8
	- rev64 v21.4S,v21.4S
	-.inst 0xcec084f6 //sm4e v22.4s,v7.4s
	- ext v21.16b,v21.16b,v21.16b,#8
	- rev64 v22.4S,v22.4S
	-.inst 0xcec084f7 //sm4e v23.4s,v7.4s
	- ext v22.16b,v22.16b,v22.16b,#8
	- rev64 v23.4S,v23.4S
	- ext v23.16b,v23.16b,v23.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v20.16b,v20.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v21.16b,v21.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v22.16b,v22.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v23.16b,v23.16b
	-#endif
	- eor v16.16b,v16.16b,v8.16b
	- eor v17.16b,v17.16b,v24.16b
	- eor v18.16b,v18.16b,v25.16b
	- mov v8.16b,v31.16b
	- eor v19.16b,v19.16b,v26.16b
	- eor v20.16b,v20.16b,v27.16b
	- eor v21.16b,v21.16b,v28.16b
	- eor v22.16b,v22.16b,v29.16b
	- eor v23.16b,v23.16b,v30.16b
	- st1 {v16.4s,v17.4s,v18.4s,v19.4s},[x1],#64
	- st1 {v20.4s,v21.4s,v22.4s,v23.4s},[x1],#64
	- subs x2,x2,128
	- b.gt 1b
	- b 3f
	- // 4 blocks mode
	-2:
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08411 //sm4e v17.4s,v0.4s
	-.inst 0xcec08412 //sm4e v18.4s,v0.4s
	-.inst 0xcec08413 //sm4e v19.4s,v0.4s
	-
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08431 //sm4e v17.4s,v1.4s
	-.inst 0xcec08432 //sm4e v18.4s,v1.4s
	-.inst 0xcec08433 //sm4e v19.4s,v1.4s
	-
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08451 //sm4e v17.4s,v2.4s
	-.inst 0xcec08452 //sm4e v18.4s,v2.4s
	-.inst 0xcec08453 //sm4e v19.4s,v2.4s
	-
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08471 //sm4e v17.4s,v3.4s
	-.inst 0xcec08472 //sm4e v18.4s,v3.4s
	-.inst 0xcec08473 //sm4e v19.4s,v3.4s
	-
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec08491 //sm4e v17.4s,v4.4s
	-.inst 0xcec08492 //sm4e v18.4s,v4.4s
	-.inst 0xcec08493 //sm4e v19.4s,v4.4s
	-
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084b1 //sm4e v17.4s,v5.4s
	-.inst 0xcec084b2 //sm4e v18.4s,v5.4s
	-.inst 0xcec084b3 //sm4e v19.4s,v5.4s
	-
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084d1 //sm4e v17.4s,v6.4s
	-.inst 0xcec084d2 //sm4e v18.4s,v6.4s
	-.inst 0xcec084d3 //sm4e v19.4s,v6.4s
	-
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	-.inst 0xcec084f1 //sm4e v17.4s,v7.4s
	- ext v16.16b,v16.16b,v16.16b,#8
	- rev64 v17.4S,v17.4S
	-.inst 0xcec084f2 //sm4e v18.4s,v7.4s
	- ext v17.16b,v17.16b,v17.16b,#8
	- rev64 v18.4S,v18.4S
	-.inst 0xcec084f3 //sm4e v19.4s,v7.4s
	- ext v18.16b,v18.16b,v18.16b,#8
	- rev64 v19.4S,v19.4S
	- ext v19.16b,v19.16b,v19.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	- eor v16.16b,v16.16b,v8.16b
	- eor v17.16b,v17.16b,v24.16b
	- mov v8.16b,v27.16b
	- eor v18.16b,v18.16b,v25.16b
	- eor v19.16b,v19.16b,v26.16b
	- st1 {v16.4s,v17.4s,v18.4s,v19.4s},[x1],#64
	- subs x2,x2,#64
	- b.gt 1b
	-1:
	- subs x2,x2,#16
	- b.lt 3f
	- ld1 {v16.4s},[x0],#16
	- mov v24.16b,v16.16b
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	- ext v16.16b,v16.16b,v16.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- eor v16.16b,v16.16b,v8.16b
	- mov v8.16b,v24.16b
	- st1 {v16.4s},[x1],#16
	- b.ne 1b
	-3:
	- // save back IV
	- st1 {v8.4s},[x4]
	- ldp d8,d9,[sp],#16
	- ret
	-.size sm4_v8_cbc_encrypt,.-sm4_v8_cbc_encrypt
	-.globl sm4_v8_ctr32_encrypt_blocks
	-.type sm4_v8_ctr32_encrypt_blocks,%function
	-.align 5
	-sm4_v8_ctr32_encrypt_blocks:
	- AARCH64_VALID_CALL_TARGET
	- stp d8,d9,[sp, #-16]!
	-
	- ld1 {v8.4s},[x4]
	- ld1 {v0.4s,v1.4s,v2.4s,v3.4s},[x3],64
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x3]
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov w5,v8.s[3]
	-1:
	- cmp x2,#4
	- b.lt 1f
	- ld1 {v24.4s,v25.4s,v26.4s,v27.4s},[x0],#64
	- mov v16.16b,v8.16b
	- mov v17.16b,v8.16b
	- mov v18.16b,v8.16b
	- mov v19.16b,v8.16b
	- add w5,w5,#1
	- mov v17.s[3],w5
	- add w5,w5,#1
	- mov v18.s[3],w5
	- add w5,w5,#1
	- mov v19.s[3],w5
	- cmp x2,#8
	- b.lt 2f
	- ld1 {v28.4s,v29.4s,v30.4s,v31.4s},[x0],#64
	- mov v20.16b,v8.16b
	- mov v21.16b,v8.16b
	- mov v22.16b,v8.16b
	- mov v23.16b,v8.16b
	- add w5,w5,#1
	- mov v20.s[3],w5
	- add w5,w5,#1
	- mov v21.s[3],w5
	- add w5,w5,#1
	- mov v22.s[3],w5
	- add w5,w5,#1
	- mov v23.s[3],w5
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08411 //sm4e v17.4s,v0.4s
	-.inst 0xcec08412 //sm4e v18.4s,v0.4s
	-.inst 0xcec08413 //sm4e v19.4s,v0.4s
	-
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08431 //sm4e v17.4s,v1.4s
	-.inst 0xcec08432 //sm4e v18.4s,v1.4s
	-.inst 0xcec08433 //sm4e v19.4s,v1.4s
	-
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08451 //sm4e v17.4s,v2.4s
	-.inst 0xcec08452 //sm4e v18.4s,v2.4s
	-.inst 0xcec08453 //sm4e v19.4s,v2.4s
	-
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08471 //sm4e v17.4s,v3.4s
	-.inst 0xcec08472 //sm4e v18.4s,v3.4s
	-.inst 0xcec08473 //sm4e v19.4s,v3.4s
	-
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec08491 //sm4e v17.4s,v4.4s
	-.inst 0xcec08492 //sm4e v18.4s,v4.4s
	-.inst 0xcec08493 //sm4e v19.4s,v4.4s
	-
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084b1 //sm4e v17.4s,v5.4s
	-.inst 0xcec084b2 //sm4e v18.4s,v5.4s
	-.inst 0xcec084b3 //sm4e v19.4s,v5.4s
	-
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084d1 //sm4e v17.4s,v6.4s
	-.inst 0xcec084d2 //sm4e v18.4s,v6.4s
	-.inst 0xcec084d3 //sm4e v19.4s,v6.4s
	-
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	-.inst 0xcec084f1 //sm4e v17.4s,v7.4s
	- ext v16.16b,v16.16b,v16.16b,#8
	- rev64 v17.4S,v17.4S
	-.inst 0xcec084f2 //sm4e v18.4s,v7.4s
	- ext v17.16b,v17.16b,v17.16b,#8
	- rev64 v18.4S,v18.4S
	-.inst 0xcec084f3 //sm4e v19.4s,v7.4s
	- ext v18.16b,v18.16b,v18.16b,#8
	- rev64 v19.4S,v19.4S
	- ext v19.16b,v19.16b,v19.16b,#8
	-.inst 0xcec08414 //sm4e v20.4s,v0.4s
	-.inst 0xcec08415 //sm4e v21.4s,v0.4s
	-.inst 0xcec08416 //sm4e v22.4s,v0.4s
	-.inst 0xcec08417 //sm4e v23.4s,v0.4s
	-
	-.inst 0xcec08434 //sm4e v20.4s,v1.4s
	-.inst 0xcec08435 //sm4e v21.4s,v1.4s
	-.inst 0xcec08436 //sm4e v22.4s,v1.4s
	-.inst 0xcec08437 //sm4e v23.4s,v1.4s
	-
	-.inst 0xcec08454 //sm4e v20.4s,v2.4s
	-.inst 0xcec08455 //sm4e v21.4s,v2.4s
	-.inst 0xcec08456 //sm4e v22.4s,v2.4s
	-.inst 0xcec08457 //sm4e v23.4s,v2.4s
	-
	-.inst 0xcec08474 //sm4e v20.4s,v3.4s
	-.inst 0xcec08475 //sm4e v21.4s,v3.4s
	-.inst 0xcec08476 //sm4e v22.4s,v3.4s
	-.inst 0xcec08477 //sm4e v23.4s,v3.4s
	-
	-.inst 0xcec08494 //sm4e v20.4s,v4.4s
	-.inst 0xcec08495 //sm4e v21.4s,v4.4s
	-.inst 0xcec08496 //sm4e v22.4s,v4.4s
	-.inst 0xcec08497 //sm4e v23.4s,v4.4s
	-
	-.inst 0xcec084b4 //sm4e v20.4s,v5.4s
	-.inst 0xcec084b5 //sm4e v21.4s,v5.4s
	-.inst 0xcec084b6 //sm4e v22.4s,v5.4s
	-.inst 0xcec084b7 //sm4e v23.4s,v5.4s
	-
	-.inst 0xcec084d4 //sm4e v20.4s,v6.4s
	-.inst 0xcec084d5 //sm4e v21.4s,v6.4s
	-.inst 0xcec084d6 //sm4e v22.4s,v6.4s
	-.inst 0xcec084d7 //sm4e v23.4s,v6.4s
	-
	-.inst 0xcec084f4 //sm4e v20.4s,v7.4s
	- rev64 v20.4S,v20.4S
	-.inst 0xcec084f5 //sm4e v21.4s,v7.4s
	- ext v20.16b,v20.16b,v20.16b,#8
	- rev64 v21.4S,v21.4S
	-.inst 0xcec084f6 //sm4e v22.4s,v7.4s
	- ext v21.16b,v21.16b,v21.16b,#8
	- rev64 v22.4S,v22.4S
	-.inst 0xcec084f7 //sm4e v23.4s,v7.4s
	- ext v22.16b,v22.16b,v22.16b,#8
	- rev64 v23.4S,v23.4S
	- ext v23.16b,v23.16b,v23.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v20.16b,v20.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v21.16b,v21.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v22.16b,v22.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v23.16b,v23.16b
	-#endif
	- eor v16.16b,v16.16b,v24.16b
	- eor v17.16b,v17.16b,v25.16b
	- eor v18.16b,v18.16b,v26.16b
	- eor v19.16b,v19.16b,v27.16b
	- eor v20.16b,v20.16b,v28.16b
	- eor v21.16b,v21.16b,v29.16b
	- eor v22.16b,v22.16b,v30.16b
	- eor v23.16b,v23.16b,v31.16b
	- st1 {v16.4s,v17.4s,v18.4s,v19.4s},[x1],#64
	- st1 {v20.4s,v21.4s,v22.4s,v23.4s},[x1],#64
	- subs x2,x2,#8
	- b.eq 3f
	- add w5,w5,#1
	- mov v8.s[3],w5
	- b 1b
	-2:
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08411 //sm4e v17.4s,v0.4s
	-.inst 0xcec08412 //sm4e v18.4s,v0.4s
	-.inst 0xcec08413 //sm4e v19.4s,v0.4s
	-
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08431 //sm4e v17.4s,v1.4s
	-.inst 0xcec08432 //sm4e v18.4s,v1.4s
	-.inst 0xcec08433 //sm4e v19.4s,v1.4s
	-
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08451 //sm4e v17.4s,v2.4s
	-.inst 0xcec08452 //sm4e v18.4s,v2.4s
	-.inst 0xcec08453 //sm4e v19.4s,v2.4s
	-
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08471 //sm4e v17.4s,v3.4s
	-.inst 0xcec08472 //sm4e v18.4s,v3.4s
	-.inst 0xcec08473 //sm4e v19.4s,v3.4s
	-
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec08491 //sm4e v17.4s,v4.4s
	-.inst 0xcec08492 //sm4e v18.4s,v4.4s
	-.inst 0xcec08493 //sm4e v19.4s,v4.4s
	-
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084b1 //sm4e v17.4s,v5.4s
	-.inst 0xcec084b2 //sm4e v18.4s,v5.4s
	-.inst 0xcec084b3 //sm4e v19.4s,v5.4s
	-
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084d1 //sm4e v17.4s,v6.4s
	-.inst 0xcec084d2 //sm4e v18.4s,v6.4s
	-.inst 0xcec084d3 //sm4e v19.4s,v6.4s
	-
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	-.inst 0xcec084f1 //sm4e v17.4s,v7.4s
	- ext v16.16b,v16.16b,v16.16b,#8
	- rev64 v17.4S,v17.4S
	-.inst 0xcec084f2 //sm4e v18.4s,v7.4s
	- ext v17.16b,v17.16b,v17.16b,#8
	- rev64 v18.4S,v18.4S
	-.inst 0xcec084f3 //sm4e v19.4s,v7.4s
	- ext v18.16b,v18.16b,v18.16b,#8
	- rev64 v19.4S,v19.4S
	- ext v19.16b,v19.16b,v19.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	- eor v16.16b,v16.16b,v24.16b
	- eor v17.16b,v17.16b,v25.16b
	- eor v18.16b,v18.16b,v26.16b
	- eor v19.16b,v19.16b,v27.16b
	- st1 {v16.4s,v17.4s,v18.4s,v19.4s},[x1],#64
	- subs x2,x2,#4
	- b.eq 3f
	- add w5,w5,#1
	- mov v8.s[3],w5
	- b 1b
	-1:
	- subs x2,x2,#1
	- b.lt 3f
	- mov v16.16b,v8.16b
	- ld1 {v24.4s},[x0],#16
	-.inst 0xcec08410 //sm4e v16.4s,v0.4s
	-.inst 0xcec08430 //sm4e v16.4s,v1.4s
	-.inst 0xcec08450 //sm4e v16.4s,v2.4s
	-.inst 0xcec08470 //sm4e v16.4s,v3.4s
	-.inst 0xcec08490 //sm4e v16.4s,v4.4s
	-.inst 0xcec084b0 //sm4e v16.4s,v5.4s
	-.inst 0xcec084d0 //sm4e v16.4s,v6.4s
	-.inst 0xcec084f0 //sm4e v16.4s,v7.4s
	- rev64 v16.4S,v16.4S
	- ext v16.16b,v16.16b,v16.16b,#8
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- eor v16.16b,v16.16b,v24.16b
	- st1 {v16.4s},[x1],#16
	- b.eq 3f
	- add w5,w5,#1
	- mov v8.s[3],w5
	- b 1b
	-3:
	- ldp d8,d9,[sp],#16
	- ret
	-.size sm4_v8_ctr32_encrypt_blocks,.-sm4_v8_ctr32_encrypt_blocks
	diff --git a/sys/crypto/openssl/aarch64/vpsm4-armv8.S b/sys/crypto/openssl/aarch64/vpsm4-armv8.S
	deleted file mode 100644
	--- a/sys/crypto/openssl/aarch64/vpsm4-armv8.S
	+++ /dev/null
	@@ -1,5021 +0,0 @@
	-/* Do not modify. This file is auto-generated from vpsm4-armv8.pl. */
	-// Copyright 2020-2025 The OpenSSL Project Authors. All Rights Reserved.
	-//
	-// Licensed under the Apache License 2.0 (the "License"). You may not use
	-// this file except in compliance with the License. You can obtain a copy
	-// in the file LICENSE in the source distribution or at
	-// https://www.openssl.org/source/license.html
	-
	-//
	-// This module implements SM4 with ASIMD on aarch64
	-//
	-// Feb 2022
	-//
	-
	-// $output is the last argument if it looks like a file (it has an extension)
	-// $flavour is the first argument if it doesn't look like a file
	-#include "arm_arch.h"
	-.arch armv8-a
	-.text
	-
	-.section .rodata
	-.type _vpsm4_consts,%object
	-.align 7
	-_vpsm4_consts:
	-.Lsbox:
	-.byte 0xD6,0x90,0xE9,0xFE,0xCC,0xE1,0x3D,0xB7,0x16,0xB6,0x14,0xC2,0x28,0xFB,0x2C,0x05
	-.byte 0x2B,0x67,0x9A,0x76,0x2A,0xBE,0x04,0xC3,0xAA,0x44,0x13,0x26,0x49,0x86,0x06,0x99
	-.byte 0x9C,0x42,0x50,0xF4,0x91,0xEF,0x98,0x7A,0x33,0x54,0x0B,0x43,0xED,0xCF,0xAC,0x62
	-.byte 0xE4,0xB3,0x1C,0xA9,0xC9,0x08,0xE8,0x95,0x80,0xDF,0x94,0xFA,0x75,0x8F,0x3F,0xA6
	-.byte 0x47,0x07,0xA7,0xFC,0xF3,0x73,0x17,0xBA,0x83,0x59,0x3C,0x19,0xE6,0x85,0x4F,0xA8
	-.byte 0x68,0x6B,0x81,0xB2,0x71,0x64,0xDA,0x8B,0xF8,0xEB,0x0F,0x4B,0x70,0x56,0x9D,0x35
	-.byte 0x1E,0x24,0x0E,0x5E,0x63,0x58,0xD1,0xA2,0x25,0x22,0x7C,0x3B,0x01,0x21,0x78,0x87
	-.byte 0xD4,0x00,0x46,0x57,0x9F,0xD3,0x27,0x52,0x4C,0x36,0x02,0xE7,0xA0,0xC4,0xC8,0x9E
	-.byte 0xEA,0xBF,0x8A,0xD2,0x40,0xC7,0x38,0xB5,0xA3,0xF7,0xF2,0xCE,0xF9,0x61,0x15,0xA1
	-.byte 0xE0,0xAE,0x5D,0xA4,0x9B,0x34,0x1A,0x55,0xAD,0x93,0x32,0x30,0xF5,0x8C,0xB1,0xE3
	-.byte 0x1D,0xF6,0xE2,0x2E,0x82,0x66,0xCA,0x60,0xC0,0x29,0x23,0xAB,0x0D,0x53,0x4E,0x6F
	-.byte 0xD5,0xDB,0x37,0x45,0xDE,0xFD,0x8E,0x2F,0x03,0xFF,0x6A,0x72,0x6D,0x6C,0x5B,0x51
	-.byte 0x8D,0x1B,0xAF,0x92,0xBB,0xDD,0xBC,0x7F,0x11,0xD9,0x5C,0x41,0x1F,0x10,0x5A,0xD8
	-.byte 0x0A,0xC1,0x31,0x88,0xA5,0xCD,0x7B,0xBD,0x2D,0x74,0xD0,0x12,0xB8,0xE5,0xB4,0xB0
	-.byte 0x89,0x69,0x97,0x4A,0x0C,0x96,0x77,0x7E,0x65,0xB9,0xF1,0x09,0xC5,0x6E,0xC6,0x84
	-.byte 0x18,0xF0,0x7D,0xEC,0x3A,0xDC,0x4D,0x20,0x79,0xEE,0x5F,0x3E,0xD7,0xCB,0x39,0x48
	-.Lck:
	-.long 0x00070E15, 0x1C232A31, 0x383F464D, 0x545B6269
	-.long 0x70777E85, 0x8C939AA1, 0xA8AFB6BD, 0xC4CBD2D9
	-.long 0xE0E7EEF5, 0xFC030A11, 0x181F262D, 0x343B4249
	-.long 0x50575E65, 0x6C737A81, 0x888F969D, 0xA4ABB2B9
	-.long 0xC0C7CED5, 0xDCE3EAF1, 0xF8FF060D, 0x141B2229
	-.long 0x30373E45, 0x4C535A61, 0x686F767D, 0x848B9299
	-.long 0xA0A7AEB5, 0xBCC3CAD1, 0xD8DFE6ED, 0xF4FB0209
	-.long 0x10171E25, 0x2C333A41, 0x484F565D, 0x646B7279
	-.Lfk:
	-.quad 0x56aa3350a3b1bac6,0xb27022dc677d9197
	-.Lshuffles:
	-.quad 0x0B0A090807060504,0x030201000F0E0D0C
	-.Lxts_magic:
	-.quad 0x0101010101010187,0x0101010101010101
	-
	-.size _vpsm4_consts,.-_vpsm4_consts
	-
	-.previous
	-
	-.type _vpsm4_set_key,%function
	-.align 4
	-_vpsm4_set_key:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v5.4s},[x0]
	- adrp x10,.Lsbox
	- add x10,x10,#:lo12:.Lsbox
	- ld1 {v16.16b,v17.16b,v18.16b,v19.16b},[x10],#64
	- ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
	- ld1 {v24.16b,v25.16b,v26.16b,v27.16b},[x10],#64
	- ld1 {v28.16b,v29.16b,v30.16b,v31.16b},[x10]
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	- adrp x5,.Lshuffles
	- add x5,x5,#:lo12:.Lshuffles
	- ld1 {v7.2d},[x5]
	- adrp x5,.Lfk
	- add x5,x5,#:lo12:.Lfk
	- ld1 {v6.2d},[x5]
	- eor v5.16b,v5.16b,v6.16b
	- mov x6,#32
	- adrp x5,.Lck
	- add x5,x5,#:lo12:.Lck
	- movi v0.16b,#64
	- cbnz w2,1f
	- add x1,x1,124
	-1:
	- mov w7,v5.s[1]
	- ldr w8,[x5],#4
	- eor w8,w8,w7
	- mov w7,v5.s[2]
	- eor w8,w8,w7
	- mov w7,v5.s[3]
	- eor w8,w8,w7
	- // sbox lookup
	- mov v4.s[0],w8
	- tbl v1.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v4.16b
	- sub v4.16b,v4.16b,v0.16b
	- tbx v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v4.16b
	- sub v4.16b,v4.16b,v0.16b
	- tbx v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v4.16b
	- sub v4.16b,v4.16b,v0.16b
	- tbx v1.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v4.16b
	- mov w7,v1.s[0]
	- eor w8,w7,w7,ror #19
	- eor w8,w8,w7,ror #9
	- mov w7,v5.s[0]
	- eor w8,w8,w7
	- mov v5.s[0],w8
	- cbz w2,2f
	- str w8,[x1],#4
	- b 3f
	-2:
	- str w8,[x1],#-4
	-3:
	- tbl v5.16b,{v5.16b},v7.16b
	- subs x6,x6,#1
	- b.ne 1b
	- ret
	-.size _vpsm4_set_key,.-_vpsm4_set_key
	-.type _vpsm4_enc_4blks,%function
	-.align 4
	-_vpsm4_enc_4blks:
	- AARCH64_VALID_CALL_TARGET
	- mov x10,x3
	- mov w11,#8
	-10:
	- ldp w7,w8,[x10],8
	- dup v12.4s,w7
	- dup v13.4s,w8
	-
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor v14.16b,v6.16b,v7.16b
	- eor v12.16b,v5.16b,v12.16b
	- eor v12.16b,v14.16b,v12.16b
	- movi v0.16b,#64
	- movi v1.16b,#128
	- movi v2.16b,#192
	- sub v0.16b,v12.16b,v0.16b
	- sub v1.16b,v12.16b,v1.16b
	- sub v2.16b,v12.16b,v2.16b
	- tbl v12.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v12.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v0.2d,v0.2d,v1.2d
	- add v2.2d,v2.2d,v12.2d
	- add v12.2d,v0.2d,v2.2d
	-
	- ushr v0.4s,v12.4s,32-2
	- sli v0.4s,v12.4s,2
	- ushr v2.4s,v12.4s,32-10
	- eor v1.16b,v0.16b,v12.16b
	- sli v2.4s,v12.4s,10
	- eor v1.16b,v2.16b,v1.16b
	- ushr v0.4s,v12.4s,32-18
	- sli v0.4s,v12.4s,18
	- ushr v2.4s,v12.4s,32-24
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v12.4s,24
	- eor v12.16b,v2.16b,v1.16b
	- eor v4.16b,v4.16b,v12.16b
	-
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor v14.16b,v14.16b,v4.16b
	- eor v13.16b,v14.16b,v13.16b
	- movi v0.16b,#64
	- movi v1.16b,#128
	- movi v2.16b,#192
	- sub v0.16b,v13.16b,v0.16b
	- sub v1.16b,v13.16b,v1.16b
	- sub v2.16b,v13.16b,v2.16b
	- tbl v13.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v13.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v0.2d,v0.2d,v1.2d
	- add v2.2d,v2.2d,v13.2d
	- add v13.2d,v0.2d,v2.2d
	-
	- ushr v0.4s,v13.4s,32-2
	- sli v0.4s,v13.4s,2
	- ushr v2.4s,v13.4s,32-10
	- eor v1.16b,v0.16b,v13.16b
	- sli v2.4s,v13.4s,10
	- eor v1.16b,v2.16b,v1.16b
	- ushr v0.4s,v13.4s,32-18
	- sli v0.4s,v13.4s,18
	- ushr v2.4s,v13.4s,32-24
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,24
	- eor v13.16b,v2.16b,v1.16b
	- ldp w7,w8,[x10],8
	- eor v5.16b,v5.16b,v13.16b
	-
	- dup v12.4s,w7
	- dup v13.4s,w8
	-
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor v14.16b,v4.16b,v5.16b
	- eor v12.16b,v7.16b,v12.16b
	- eor v12.16b,v14.16b,v12.16b
	- movi v0.16b,#64
	- movi v1.16b,#128
	- movi v2.16b,#192
	- sub v0.16b,v12.16b,v0.16b
	- sub v1.16b,v12.16b,v1.16b
	- sub v2.16b,v12.16b,v2.16b
	- tbl v12.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v12.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v0.2d,v0.2d,v1.2d
	- add v2.2d,v2.2d,v12.2d
	- add v12.2d,v0.2d,v2.2d
	-
	- ushr v0.4s,v12.4s,32-2
	- sli v0.4s,v12.4s,2
	- ushr v2.4s,v12.4s,32-10
	- eor v1.16b,v0.16b,v12.16b
	- sli v2.4s,v12.4s,10
	- eor v1.16b,v2.16b,v1.16b
	- ushr v0.4s,v12.4s,32-18
	- sli v0.4s,v12.4s,18
	- ushr v2.4s,v12.4s,32-24
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v12.4s,24
	- eor v12.16b,v2.16b,v1.16b
	- eor v6.16b,v6.16b,v12.16b
	-
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor v14.16b,v14.16b,v6.16b
	- eor v13.16b,v14.16b,v13.16b
	- movi v0.16b,#64
	- movi v1.16b,#128
	- movi v2.16b,#192
	- sub v0.16b,v13.16b,v0.16b
	- sub v1.16b,v13.16b,v1.16b
	- sub v2.16b,v13.16b,v2.16b
	- tbl v13.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v13.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v0.2d,v0.2d,v1.2d
	- add v2.2d,v2.2d,v13.2d
	- add v13.2d,v0.2d,v2.2d
	-
	- ushr v0.4s,v13.4s,32-2
	- sli v0.4s,v13.4s,2
	- ushr v2.4s,v13.4s,32-10
	- eor v1.16b,v0.16b,v13.16b
	- sli v2.4s,v13.4s,10
	- eor v1.16b,v2.16b,v1.16b
	- ushr v0.4s,v13.4s,32-18
	- sli v0.4s,v13.4s,18
	- ushr v2.4s,v13.4s,32-24
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,24
	- eor v13.16b,v2.16b,v1.16b
	- eor v7.16b,v7.16b,v13.16b
	- subs w11,w11,#1
	- b.ne 10b
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v4.16b
	-#else
	- mov v3.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v2.16b,v5.16b
	-#else
	- mov v2.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v1.16b,v6.16b
	-#else
	- mov v1.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v0.16b,v7.16b
	-#else
	- mov v0.16b,v7.16b
	-#endif
	- ret
	-.size _vpsm4_enc_4blks,.-_vpsm4_enc_4blks
	-.type _vpsm4_enc_8blks,%function
	-.align 4
	-_vpsm4_enc_8blks:
	- AARCH64_VALID_CALL_TARGET
	- mov x10,x3
	- mov w11,#8
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- dup v12.4s,w7
	- eor v14.16b,v6.16b,v7.16b
	- eor v15.16b,v10.16b,v11.16b
	- eor v0.16b,v5.16b,v12.16b
	- eor v1.16b,v9.16b,v12.16b
	- eor v12.16b,v14.16b,v0.16b
	- eor v13.16b,v15.16b,v1.16b
	- movi v3.16b,#64
	- sub v0.16b,v12.16b,v3.16b
	- sub v1.16b,v0.16b,v3.16b
	- sub v2.16b,v1.16b,v3.16b
	- tbl v12.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v12.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v1.2d,v0.2d,v1.2d
	- add v12.2d,v2.2d,v12.2d
	- add v12.2d,v1.2d,v12.2d
	-
	- sub v0.16b,v13.16b,v3.16b
	- sub v1.16b,v0.16b,v3.16b
	- sub v2.16b,v1.16b,v3.16b
	- tbl v13.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v13.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v1.2d,v0.2d,v1.2d
	- add v13.2d,v2.2d,v13.2d
	- add v13.2d,v1.2d,v13.2d
	-
	- ushr v0.4s,v12.4s,32-2
	- sli v0.4s,v12.4s,2
	- ushr v2.4s,v13.4s,32-2
	- eor v1.16b,v0.16b,v12.16b
	- sli v2.4s,v13.4s,2
	-
	- ushr v0.4s,v12.4s,32-10
	- eor v3.16b,v2.16b,v13.16b
	- sli v0.4s,v12.4s,10
	- ushr v2.4s,v13.4s,32-10
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,10
	-
	- ushr v0.4s,v12.4s,32-18
	- eor v3.16b,v2.16b,v3.16b
	- sli v0.4s,v12.4s,18
	- ushr v2.4s,v13.4s,32-18
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,18
	-
	- ushr v0.4s,v12.4s,32-24
	- eor v3.16b,v2.16b,v3.16b
	- sli v0.4s,v12.4s,24
	- ushr v2.4s,v13.4s,32-24
	- eor v12.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,24
	- eor v13.16b,v2.16b,v3.16b
	- eor v4.16b,v4.16b,v12.16b
	- eor v8.16b,v8.16b,v13.16b
	-
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- dup v13.4s,w8
	- eor v14.16b,v14.16b,v4.16b
	- eor v15.16b,v15.16b,v8.16b
	- eor v12.16b,v14.16b,v13.16b
	- eor v13.16b,v15.16b,v13.16b
	- movi v3.16b,#64
	- sub v0.16b,v12.16b,v3.16b
	- sub v1.16b,v0.16b,v3.16b
	- sub v2.16b,v1.16b,v3.16b
	- tbl v12.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v12.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v1.2d,v0.2d,v1.2d
	- add v12.2d,v2.2d,v12.2d
	- add v12.2d,v1.2d,v12.2d
	-
	- sub v0.16b,v13.16b,v3.16b
	- sub v1.16b,v0.16b,v3.16b
	- sub v2.16b,v1.16b,v3.16b
	- tbl v13.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v13.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v1.2d,v0.2d,v1.2d
	- add v13.2d,v2.2d,v13.2d
	- add v13.2d,v1.2d,v13.2d
	-
	- ushr v0.4s,v12.4s,32-2
	- sli v0.4s,v12.4s,2
	- ushr v2.4s,v13.4s,32-2
	- eor v1.16b,v0.16b,v12.16b
	- sli v2.4s,v13.4s,2
	-
	- ushr v0.4s,v12.4s,32-10
	- eor v3.16b,v2.16b,v13.16b
	- sli v0.4s,v12.4s,10
	- ushr v2.4s,v13.4s,32-10
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,10
	-
	- ushr v0.4s,v12.4s,32-18
	- eor v3.16b,v2.16b,v3.16b
	- sli v0.4s,v12.4s,18
	- ushr v2.4s,v13.4s,32-18
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,18
	-
	- ushr v0.4s,v12.4s,32-24
	- eor v3.16b,v2.16b,v3.16b
	- sli v0.4s,v12.4s,24
	- ushr v2.4s,v13.4s,32-24
	- eor v12.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,24
	- eor v13.16b,v2.16b,v3.16b
	- ldp w7,w8,[x10],8
	- eor v5.16b,v5.16b,v12.16b
	- eor v9.16b,v9.16b,v13.16b
	-
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- dup v12.4s,w7
	- eor v14.16b,v4.16b,v5.16b
	- eor v15.16b,v8.16b,v9.16b
	- eor v0.16b,v7.16b,v12.16b
	- eor v1.16b,v11.16b,v12.16b
	- eor v12.16b,v14.16b,v0.16b
	- eor v13.16b,v15.16b,v1.16b
	- movi v3.16b,#64
	- sub v0.16b,v12.16b,v3.16b
	- sub v1.16b,v0.16b,v3.16b
	- sub v2.16b,v1.16b,v3.16b
	- tbl v12.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v12.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v1.2d,v0.2d,v1.2d
	- add v12.2d,v2.2d,v12.2d
	- add v12.2d,v1.2d,v12.2d
	-
	- sub v0.16b,v13.16b,v3.16b
	- sub v1.16b,v0.16b,v3.16b
	- sub v2.16b,v1.16b,v3.16b
	- tbl v13.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v13.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v1.2d,v0.2d,v1.2d
	- add v13.2d,v2.2d,v13.2d
	- add v13.2d,v1.2d,v13.2d
	-
	- ushr v0.4s,v12.4s,32-2
	- sli v0.4s,v12.4s,2
	- ushr v2.4s,v13.4s,32-2
	- eor v1.16b,v0.16b,v12.16b
	- sli v2.4s,v13.4s,2
	-
	- ushr v0.4s,v12.4s,32-10
	- eor v3.16b,v2.16b,v13.16b
	- sli v0.4s,v12.4s,10
	- ushr v2.4s,v13.4s,32-10
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,10
	-
	- ushr v0.4s,v12.4s,32-18
	- eor v3.16b,v2.16b,v3.16b
	- sli v0.4s,v12.4s,18
	- ushr v2.4s,v13.4s,32-18
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,18
	-
	- ushr v0.4s,v12.4s,32-24
	- eor v3.16b,v2.16b,v3.16b
	- sli v0.4s,v12.4s,24
	- ushr v2.4s,v13.4s,32-24
	- eor v12.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,24
	- eor v13.16b,v2.16b,v3.16b
	- eor v6.16b,v6.16b,v12.16b
	- eor v10.16b,v10.16b,v13.16b
	-
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- dup v13.4s,w8
	- eor v14.16b,v14.16b,v6.16b
	- eor v15.16b,v15.16b,v10.16b
	- eor v12.16b,v14.16b,v13.16b
	- eor v13.16b,v15.16b,v13.16b
	- movi v3.16b,#64
	- sub v0.16b,v12.16b,v3.16b
	- sub v1.16b,v0.16b,v3.16b
	- sub v2.16b,v1.16b,v3.16b
	- tbl v12.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v12.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v1.2d,v0.2d,v1.2d
	- add v12.2d,v2.2d,v12.2d
	- add v12.2d,v1.2d,v12.2d
	-
	- sub v0.16b,v13.16b,v3.16b
	- sub v1.16b,v0.16b,v3.16b
	- sub v2.16b,v1.16b,v3.16b
	- tbl v13.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v13.16b
	- tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
	- tbl v1.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v1.16b
	- tbl v2.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v2.16b
	- add v1.2d,v0.2d,v1.2d
	- add v13.2d,v2.2d,v13.2d
	- add v13.2d,v1.2d,v13.2d
	-
	- ushr v0.4s,v12.4s,32-2
	- sli v0.4s,v12.4s,2
	- ushr v2.4s,v13.4s,32-2
	- eor v1.16b,v0.16b,v12.16b
	- sli v2.4s,v13.4s,2
	-
	- ushr v0.4s,v12.4s,32-10
	- eor v3.16b,v2.16b,v13.16b
	- sli v0.4s,v12.4s,10
	- ushr v2.4s,v13.4s,32-10
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,10
	-
	- ushr v0.4s,v12.4s,32-18
	- eor v3.16b,v2.16b,v3.16b
	- sli v0.4s,v12.4s,18
	- ushr v2.4s,v13.4s,32-18
	- eor v1.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,18
	-
	- ushr v0.4s,v12.4s,32-24
	- eor v3.16b,v2.16b,v3.16b
	- sli v0.4s,v12.4s,24
	- ushr v2.4s,v13.4s,32-24
	- eor v12.16b,v0.16b,v1.16b
	- sli v2.4s,v13.4s,24
	- eor v13.16b,v2.16b,v3.16b
	- eor v7.16b,v7.16b,v12.16b
	- eor v11.16b,v11.16b,v13.16b
	- subs w11,w11,#1
	- b.ne 10b
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v4.16b
	-#else
	- mov v3.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v2.16b,v5.16b
	-#else
	- mov v2.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v1.16b,v6.16b
	-#else
	- mov v1.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v0.16b,v7.16b
	-#else
	- mov v0.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v8.16b
	-#else
	- mov v7.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v9.16b
	-#else
	- mov v6.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v10.16b
	-#else
	- mov v5.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v11.16b
	-#else
	- mov v4.16b,v11.16b
	-#endif
	- ret
	-.size _vpsm4_enc_8blks,.-_vpsm4_enc_8blks
	-.globl vpsm4_set_encrypt_key
	-.type vpsm4_set_encrypt_key,%function
	-.align 5
	-vpsm4_set_encrypt_key:
	- AARCH64_SIGN_LINK_REGISTER
	- stp x29,x30,[sp,#-16]!
	- mov w2,1
	- bl _vpsm4_set_key
	- ldp x29,x30,[sp],#16
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_set_encrypt_key,.-vpsm4_set_encrypt_key
	-.globl vpsm4_set_decrypt_key
	-.type vpsm4_set_decrypt_key,%function
	-.align 5
	-vpsm4_set_decrypt_key:
	- AARCH64_SIGN_LINK_REGISTER
	- stp x29,x30,[sp,#-16]!
	- mov w2,0
	- bl _vpsm4_set_key
	- ldp x29,x30,[sp],#16
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_set_decrypt_key,.-vpsm4_set_decrypt_key
	-.globl vpsm4_encrypt
	-.type vpsm4_encrypt,%function
	-.align 5
	-vpsm4_encrypt:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v4.4s},[x0]
	- adrp x10,.Lsbox
	- add x10,x10,#:lo12:.Lsbox
	- ld1 {v16.16b,v17.16b,v18.16b,v19.16b},[x10],#64
	- ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
	- ld1 {v24.16b,v25.16b,v26.16b,v27.16b},[x10],#64
	- ld1 {v28.16b,v29.16b,v30.16b,v31.16b},[x10]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x3,x2
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- st1 {v4.4s},[x1]
	- ret
	-.size vpsm4_encrypt,.-vpsm4_encrypt
	-.globl vpsm4_decrypt
	-.type vpsm4_decrypt,%function
	-.align 5
	-vpsm4_decrypt:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v4.4s},[x0]
	- adrp x10,.Lsbox
	- add x10,x10,#:lo12:.Lsbox
	- ld1 {v16.16b,v17.16b,v18.16b,v19.16b},[x10],#64
	- ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
	- ld1 {v24.16b,v25.16b,v26.16b,v27.16b},[x10],#64
	- ld1 {v28.16b,v29.16b,v30.16b,v31.16b},[x10]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x3,x2
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- st1 {v4.4s},[x1]
	- ret
	-.size vpsm4_decrypt,.-vpsm4_decrypt
	-.globl vpsm4_ecb_encrypt
	-.type vpsm4_ecb_encrypt,%function
	-.align 5
	-vpsm4_ecb_encrypt:
	- AARCH64_SIGN_LINK_REGISTER
	- // convert length into blocks
	- lsr x2,x2,4
	- stp d8,d9,[sp,#-80]!
	- stp d10,d11,[sp,#16]
	- stp d12,d13,[sp,#32]
	- stp d14,d15,[sp,#48]
	- stp x29,x30,[sp,#64]
	- adrp x10,.Lsbox
	- add x10,x10,#:lo12:.Lsbox
	- ld1 {v16.16b,v17.16b,v18.16b,v19.16b},[x10],#64
	- ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
	- ld1 {v24.16b,v25.16b,v26.16b,v27.16b},[x10],#64
	- ld1 {v28.16b,v29.16b,v30.16b,v31.16b},[x10]
	-.Lecb_8_blocks_process:
	- cmp w2,#8
	- b.lt .Lecb_4_blocks_process
	- ld4 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- ld4 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- bl _vpsm4_enc_8blks
	- st4 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st4 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs w2,w2,#8
	- b.gt .Lecb_8_blocks_process
	- b 100f
	-.Lecb_4_blocks_process:
	- cmp w2,#4
	- b.lt 1f
	- ld4 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_enc_4blks
	- st4 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- sub w2,w2,#4
	-1:
	- // process last block
	- cmp w2,#1
	- b.lt 100f
	- b.gt 1f
	- ld1 {v4.4s},[x0]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- st1 {v4.4s},[x1]
	- b 100f
	-1: // process last 2 blocks
	- ld4 {v4.s,v5.s,v6.s,v7.s}[0],[x0],#16
	- ld4 {v4.s,v5.s,v6.s,v7.s}[1],[x0],#16
	- cmp w2,#2
	- b.gt 1f
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_enc_4blks
	- st4 {v0.s,v1.s,v2.s,v3.s}[0],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[1],[x1]
	- b 100f
	-1: // process last 3 blocks
	- ld4 {v4.s,v5.s,v6.s,v7.s}[2],[x0],#16
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_enc_4blks
	- st4 {v0.s,v1.s,v2.s,v3.s}[0],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[1],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[2],[x1]
	-100:
	- ldp d10,d11,[sp,#16]
	- ldp d12,d13,[sp,#32]
	- ldp d14,d15,[sp,#48]
	- ldp x29,x30,[sp,#64]
	- ldp d8,d9,[sp],#80
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_ecb_encrypt,.-vpsm4_ecb_encrypt
	-.globl vpsm4_cbc_encrypt
	-.type vpsm4_cbc_encrypt,%function
	-.align 5
	-vpsm4_cbc_encrypt:
	- AARCH64_VALID_CALL_TARGET
	- lsr x2,x2,4
	- adrp x10,.Lsbox
	- add x10,x10,#:lo12:.Lsbox
	- ld1 {v16.16b,v17.16b,v18.16b,v19.16b},[x10],#64
	- ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
	- ld1 {v24.16b,v25.16b,v26.16b,v27.16b},[x10],#64
	- ld1 {v28.16b,v29.16b,v30.16b,v31.16b},[x10]
	- cbz w5,.Ldec
	- ld1 {v3.4s},[x4]
	-.Lcbc_4_blocks_enc:
	- cmp w2,#4
	- b.lt 1f
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- eor v4.16b,v4.16b,v3.16b
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	- eor v5.16b,v5.16b,v4.16b
	- mov x10,x3
	- mov w11,#8
	- mov w12,v5.s[0]
	- mov w13,v5.s[1]
	- mov w14,v5.s[2]
	- mov w15,v5.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v5.s[0],w15
	- mov v5.s[1],w14
	- mov v5.s[2],w13
	- mov v5.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v6.16b,v6.16b,v5.16b
	- mov x10,x3
	- mov w11,#8
	- mov w12,v6.s[0]
	- mov w13,v6.s[1]
	- mov w14,v6.s[2]
	- mov w15,v6.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v6.s[0],w15
	- mov v6.s[1],w14
	- mov v6.s[2],w13
	- mov v6.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	- eor v7.16b,v7.16b,v6.16b
	- mov x10,x3
	- mov w11,#8
	- mov w12,v7.s[0]
	- mov w13,v7.s[1]
	- mov w14,v7.s[2]
	- mov w15,v7.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v7.s[0],w15
	- mov v7.s[1],w14
	- mov v7.s[2],w13
	- mov v7.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- orr v3.16b,v7.16b,v7.16b
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs w2,w2,#4
	- b.ne .Lcbc_4_blocks_enc
	- b 2f
	-1:
	- subs w2,w2,#1
	- b.lt 2f
	- ld1 {v4.4s},[x0],#16
	- eor v3.16b,v3.16b,v4.16b
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v3.s[0]
	- mov w13,v3.s[1]
	- mov w14,v3.s[2]
	- mov w15,v3.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v3.s[0],w15
	- mov v3.s[1],w14
	- mov v3.s[2],w13
	- mov v3.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- st1 {v3.4s},[x1],#16
	- b 1b
	-2:
	- // save back IV
	- st1 {v3.4s},[x4]
	- ret
	-
	-.Ldec:
	- // decryption mode starts
	- AARCH64_SIGN_LINK_REGISTER
	- stp d8,d9,[sp,#-80]!
	- stp d10,d11,[sp,#16]
	- stp d12,d13,[sp,#32]
	- stp d14,d15,[sp,#48]
	- stp x29,x30,[sp,#64]
	-.Lcbc_8_blocks_dec:
	- cmp w2,#8
	- b.lt 1f
	- ld4 {v4.4s,v5.4s,v6.4s,v7.4s},[x0]
	- add x10,x0,#64
	- ld4 {v8.4s,v9.4s,v10.4s,v11.4s},[x10]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- bl _vpsm4_enc_8blks
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- zip1 v8.4s,v4.4s,v5.4s
	- zip2 v9.4s,v4.4s,v5.4s
	- zip1 v10.4s,v6.4s,v7.4s
	- zip2 v11.4s,v6.4s,v7.4s
	- zip1 v4.2d,v8.2d,v10.2d
	- zip2 v5.2d,v8.2d,v10.2d
	- zip1 v6.2d,v9.2d,v11.2d
	- zip2 v7.2d,v9.2d,v11.2d
	- ld1 {v15.4s},[x4]
	- ld1 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	- // note ivec1 and vtmpx[3] are reusing the same register
	- // care needs to be taken to avoid conflict
	- eor v0.16b,v0.16b,v15.16b
	- ld1 {v12.4s,v13.4s,v14.4s,v15.4s},[x0],#64
	- eor v1.16b,v1.16b,v8.16b
	- eor v2.16b,v2.16b,v9.16b
	- eor v3.16b,v3.16b,v10.16b
	- // save back IV
	- st1 {v15.4s}, [x4]
	- eor v4.16b,v4.16b,v11.16b
	- eor v5.16b,v5.16b,v12.16b
	- eor v6.16b,v6.16b,v13.16b
	- eor v7.16b,v7.16b,v14.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs w2,w2,#8
	- b.gt .Lcbc_8_blocks_dec
	- b.eq 100f
	-1:
	- ld1 {v15.4s},[x4]
	-.Lcbc_4_blocks_dec:
	- cmp w2,#4
	- b.lt 1f
	- ld4 {v4.4s,v5.4s,v6.4s,v7.4s},[x0]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_enc_4blks
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- eor v0.16b,v0.16b,v15.16b
	- eor v1.16b,v1.16b,v4.16b
	- orr v15.16b,v7.16b,v7.16b
	- eor v2.16b,v2.16b,v5.16b
	- eor v3.16b,v3.16b,v6.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- subs w2,w2,#4
	- b.gt .Lcbc_4_blocks_dec
	- // save back IV
	- st1 {v7.4s}, [x4]
	- b 100f
	-1: // last block
	- subs w2,w2,#1
	- b.lt 100f
	- b.gt 1f
	- ld1 {v4.4s},[x0],#16
	- // save back IV
	- st1 {v4.4s}, [x4]
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v4.16b
	-#else
	- mov v8.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v8.s[0]
	- mov w13,v8.s[1]
	- mov w14,v8.s[2]
	- mov w15,v8.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v8.s[0],w15
	- mov v8.s[1],w14
	- mov v8.s[2],w13
	- mov v8.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- eor v8.16b,v8.16b,v15.16b
	- st1 {v8.4s},[x1],#16
	- b 100f
	-1: // last two blocks
	- ld4 {v4.s,v5.s,v6.s,v7.s}[0],[x0]
	- add x10,x0,#16
	- ld4 {v4.s,v5.s,v6.s,v7.s}[1],[x10],#16
	- subs w2,w2,1
	- b.gt 1f
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_enc_4blks
	- ld1 {v4.4s,v5.4s},[x0],#32
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- eor v0.16b,v0.16b,v15.16b
	- eor v1.16b,v1.16b,v4.16b
	- st1 {v0.4s,v1.4s},[x1],#32
	- // save back IV
	- st1 {v5.4s}, [x4]
	- b 100f
	-1: // last 3 blocks
	- ld4 {v4.s,v5.s,v6.s,v7.s}[2],[x10]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_enc_4blks
	- ld1 {v4.4s,v5.4s,v6.4s},[x0],#48
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- eor v0.16b,v0.16b,v15.16b
	- eor v1.16b,v1.16b,v4.16b
	- eor v2.16b,v2.16b,v5.16b
	- st1 {v0.4s,v1.4s,v2.4s},[x1],#48
	- // save back IV
	- st1 {v6.4s}, [x4]
	-100:
	- ldp d10,d11,[sp,#16]
	- ldp d12,d13,[sp,#32]
	- ldp d14,d15,[sp,#48]
	- ldp x29,x30,[sp,#64]
	- ldp d8,d9,[sp],#80
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_cbc_encrypt,.-vpsm4_cbc_encrypt
	-.globl vpsm4_ctr32_encrypt_blocks
	-.type vpsm4_ctr32_encrypt_blocks,%function
	-.align 5
	-vpsm4_ctr32_encrypt_blocks:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v3.4s},[x4]
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- adrp x10,.Lsbox
	- add x10,x10,#:lo12:.Lsbox
	- ld1 {v16.16b,v17.16b,v18.16b,v19.16b},[x10],#64
	- ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
	- ld1 {v24.16b,v25.16b,v26.16b,v27.16b},[x10],#64
	- ld1 {v28.16b,v29.16b,v30.16b,v31.16b},[x10]
	- cmp w2,#1
	- b.ne 1f
	- // fast processing for one single block without
	- // context saving overhead
	- mov x10,x3
	- mov w11,#8
	- mov w12,v3.s[0]
	- mov w13,v3.s[1]
	- mov w14,v3.s[2]
	- mov w15,v3.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v3.s[0],w15
	- mov v3.s[1],w14
	- mov v3.s[2],w13
	- mov v3.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- ld1 {v4.4s},[x0]
	- eor v4.16b,v4.16b,v3.16b
	- st1 {v4.4s},[x1]
	- ret
	-1:
	- AARCH64_SIGN_LINK_REGISTER
	- stp d8,d9,[sp,#-80]!
	- stp d10,d11,[sp,#16]
	- stp d12,d13,[sp,#32]
	- stp d14,d15,[sp,#48]
	- stp x29,x30,[sp,#64]
	- mov w12,v3.s[0]
	- mov w13,v3.s[1]
	- mov w14,v3.s[2]
	- mov w5,v3.s[3]
	-.Lctr32_4_blocks_process:
	- cmp w2,#4
	- b.lt 1f
	- dup v4.4s,w12
	- dup v5.4s,w13
	- dup v6.4s,w14
	- mov v7.s[0],w5
	- add w5,w5,#1
	- mov v7.s[1],w5
	- add w5,w5,#1
	- mov v7.s[2],w5
	- add w5,w5,#1
	- mov v7.s[3],w5
	- add w5,w5,#1
	- cmp w2,#8
	- b.ge .Lctr32_8_blocks_process
	- bl _vpsm4_enc_4blks
	- ld4 {v12.4s,v13.4s,v14.4s,v15.4s},[x0],#64
	- eor v0.16b,v0.16b,v12.16b
	- eor v1.16b,v1.16b,v13.16b
	- eor v2.16b,v2.16b,v14.16b
	- eor v3.16b,v3.16b,v15.16b
	- st4 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- subs w2,w2,#4
	- b.ne .Lctr32_4_blocks_process
	- b 100f
	-.Lctr32_8_blocks_process:
	- dup v8.4s,w12
	- dup v9.4s,w13
	- dup v10.4s,w14
	- mov v11.s[0],w5
	- add w5,w5,#1
	- mov v11.s[1],w5
	- add w5,w5,#1
	- mov v11.s[2],w5
	- add w5,w5,#1
	- mov v11.s[3],w5
	- add w5,w5,#1
	- bl _vpsm4_enc_8blks
	- ld4 {v12.4s,v13.4s,v14.4s,v15.4s},[x0],#64
	- ld4 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	- eor v0.16b,v0.16b,v12.16b
	- eor v1.16b,v1.16b,v13.16b
	- eor v2.16b,v2.16b,v14.16b
	- eor v3.16b,v3.16b,v15.16b
	- eor v4.16b,v4.16b,v8.16b
	- eor v5.16b,v5.16b,v9.16b
	- eor v6.16b,v6.16b,v10.16b
	- eor v7.16b,v7.16b,v11.16b
	- st4 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st4 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs w2,w2,#8
	- b.ne .Lctr32_4_blocks_process
	- b 100f
	-1: // last block processing
	- subs w2,w2,#1
	- b.lt 100f
	- b.gt 1f
	- mov v3.s[0],w12
	- mov v3.s[1],w13
	- mov v3.s[2],w14
	- mov v3.s[3],w5
	- mov x10,x3
	- mov w11,#8
	- mov w12,v3.s[0]
	- mov w13,v3.s[1]
	- mov w14,v3.s[2]
	- mov w15,v3.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v3.s[0],w15
	- mov v3.s[1],w14
	- mov v3.s[2],w13
	- mov v3.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- ld1 {v4.4s},[x0]
	- eor v4.16b,v4.16b,v3.16b
	- st1 {v4.4s},[x1]
	- b 100f
	-1: // last 2 blocks processing
	- dup v4.4s,w12
	- dup v5.4s,w13
	- dup v6.4s,w14
	- mov v7.s[0],w5
	- add w5,w5,#1
	- mov v7.s[1],w5
	- subs w2,w2,#1
	- b.ne 1f
	- bl _vpsm4_enc_4blks
	- ld4 {v12.s,v13.s,v14.s,v15.s}[0],[x0],#16
	- ld4 {v12.s,v13.s,v14.s,v15.s}[1],[x0],#16
	- eor v0.16b,v0.16b,v12.16b
	- eor v1.16b,v1.16b,v13.16b
	- eor v2.16b,v2.16b,v14.16b
	- eor v3.16b,v3.16b,v15.16b
	- st4 {v0.s,v1.s,v2.s,v3.s}[0],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[1],[x1],#16
	- b 100f
	-1: // last 3 blocks processing
	- add w5,w5,#1
	- mov v7.s[2],w5
	- bl _vpsm4_enc_4blks
	- ld4 {v12.s,v13.s,v14.s,v15.s}[0],[x0],#16
	- ld4 {v12.s,v13.s,v14.s,v15.s}[1],[x0],#16
	- ld4 {v12.s,v13.s,v14.s,v15.s}[2],[x0],#16
	- eor v0.16b,v0.16b,v12.16b
	- eor v1.16b,v1.16b,v13.16b
	- eor v2.16b,v2.16b,v14.16b
	- eor v3.16b,v3.16b,v15.16b
	- st4 {v0.s,v1.s,v2.s,v3.s}[0],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[1],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[2],[x1],#16
	-100:
	- ldp d10,d11,[sp,#16]
	- ldp d12,d13,[sp,#32]
	- ldp d14,d15,[sp,#48]
	- ldp x29,x30,[sp,#64]
	- ldp d8,d9,[sp],#80
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_ctr32_encrypt_blocks,.-vpsm4_ctr32_encrypt_blocks
	-.globl vpsm4_xts_encrypt_gb
	-.type vpsm4_xts_encrypt_gb,%function
	-.align 5
	-vpsm4_xts_encrypt_gb:
	- AARCH64_SIGN_LINK_REGISTER
	- stp x15, x16, [sp, #-0x10]!
	- stp x17, x18, [sp, #-0x10]!
	- stp x19, x20, [sp, #-0x10]!
	- stp x21, x22, [sp, #-0x10]!
	- stp x23, x24, [sp, #-0x10]!
	- stp x25, x26, [sp, #-0x10]!
	- stp x27, x28, [sp, #-0x10]!
	- stp x29, x30, [sp, #-0x10]!
	- stp d8, d9, [sp, #-0x10]!
	- stp d10, d11, [sp, #-0x10]!
	- stp d12, d13, [sp, #-0x10]!
	- stp d14, d15, [sp, #-0x10]!
	- mov x26,x3
	- mov x27,x4
	- mov w28,w6
	- ld1 {v8.4s}, [x5]
	- mov x3,x27
	- adrp x10,.Lsbox
	- add x10,x10,#:lo12:.Lsbox
	- ld1 {v16.16b,v17.16b,v18.16b,v19.16b},[x10],#64
	- ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
	- ld1 {v24.16b,v25.16b,v26.16b,v27.16b},[x10],#64
	- ld1 {v28.16b,v29.16b,v30.16b,v31.16b},[x10]
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v8.s[0]
	- mov w13,v8.s[1]
	- mov w14,v8.s[2]
	- mov w15,v8.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v8.s[0],w15
	- mov v8.s[1],w14
	- mov v8.s[2],w13
	- mov v8.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov x3,x26
	- and x29,x2,#0x0F
	- // convert length into blocks
	- lsr x2,x2,4
	- cmp x2,#1
	- b.lt .return_gb
	-
	- cmp x29,0
	- // If the encryption/decryption Length is N times of 16,
	- // the all blocks are encrypted/decrypted in .xts_encrypt_blocks_gb
	- b.eq .xts_encrypt_blocks_gb
	-
	- // If the encryption/decryption length is not N times of 16,
	- // the last two blocks are encrypted/decrypted in .last_2blks_tweak_gb or .only_2blks_tweak_gb
	- // the other blocks are encrypted/decrypted in .xts_encrypt_blocks_gb
	- subs x2,x2,#1
	- b.eq .only_2blks_tweak_gb
	-.xts_encrypt_blocks_gb:
	- rbit v8.16b,v8.16b
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov x12,v8.d[0]
	- mov x13,v8.d[1]
	- mov w7,0x87
	- extr x9,x13,x13,#32
	- extr x15,x13,x12,#63
	- and w8,w7,w9,asr#31
	- eor x14,x8,x12,lsl#1
	- mov w7,0x87
	- extr x9,x15,x15,#32
	- extr x17,x15,x14,#63
	- and w8,w7,w9,asr#31
	- eor x16,x8,x14,lsl#1
	- mov w7,0x87
	- extr x9,x17,x17,#32
	- extr x19,x17,x16,#63
	- and w8,w7,w9,asr#31
	- eor x18,x8,x16,lsl#1
	- mov w7,0x87
	- extr x9,x19,x19,#32
	- extr x21,x19,x18,#63
	- and w8,w7,w9,asr#31
	- eor x20,x8,x18,lsl#1
	- mov w7,0x87
	- extr x9,x21,x21,#32
	- extr x23,x21,x20,#63
	- and w8,w7,w9,asr#31
	- eor x22,x8,x20,lsl#1
	- mov w7,0x87
	- extr x9,x23,x23,#32
	- extr x25,x23,x22,#63
	- and w8,w7,w9,asr#31
	- eor x24,x8,x22,lsl#1
	- mov w7,0x87
	- extr x9,x25,x25,#32
	- extr x27,x25,x24,#63
	- and w8,w7,w9,asr#31
	- eor x26,x8,x24,lsl#1
	-.Lxts_8_blocks_process_gb:
	- cmp x2,#8
	- b.lt .Lxts_4_blocks_process_gb
	- mov v0.d[0],x12
	- mov v0.d[1],x13
	-#ifdef __AARCH64EB__
	- rev32 v0.16b,v0.16b
	-#endif
	- mov v1.d[0],x14
	- mov v1.d[1],x15
	-#ifdef __AARCH64EB__
	- rev32 v1.16b,v1.16b
	-#endif
	- mov v2.d[0],x16
	- mov v2.d[1],x17
	-#ifdef __AARCH64EB__
	- rev32 v2.16b,v2.16b
	-#endif
	- mov v3.d[0],x18
	- mov v3.d[1],x19
	-#ifdef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- mov v12.d[0],x20
	- mov v12.d[1],x21
	-#ifdef __AARCH64EB__
	- rev32 v12.16b,v12.16b
	-#endif
	- mov v13.d[0],x22
	- mov v13.d[1],x23
	-#ifdef __AARCH64EB__
	- rev32 v13.16b,v13.16b
	-#endif
	- mov v14.d[0],x24
	- mov v14.d[1],x25
	-#ifdef __AARCH64EB__
	- rev32 v14.16b,v14.16b
	-#endif
	- mov v15.d[0],x26
	- mov v15.d[1],x27
	-#ifdef __AARCH64EB__
	- rev32 v15.16b,v15.16b
	-#endif
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- rbit v0.16b,v0.16b
	- rbit v1.16b,v1.16b
	- rbit v2.16b,v2.16b
	- rbit v3.16b,v3.16b
	- eor v4.16b, v4.16b, v0.16b
	- eor v5.16b, v5.16b, v1.16b
	- eor v6.16b, v6.16b, v2.16b
	- eor v7.16b, v7.16b, v3.16b
	- ld1 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	- rbit v12.16b,v12.16b
	- rbit v13.16b,v13.16b
	- rbit v14.16b,v14.16b
	- rbit v15.16b,v15.16b
	- eor v8.16b, v8.16b, v12.16b
	- eor v9.16b, v9.16b, v13.16b
	- eor v10.16b, v10.16b, v14.16b
	- eor v11.16b, v11.16b, v15.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- zip1 v0.4s,v8.4s,v9.4s
	- zip2 v1.4s,v8.4s,v9.4s
	- zip1 v2.4s,v10.4s,v11.4s
	- zip2 v3.4s,v10.4s,v11.4s
	- zip1 v8.2d,v0.2d,v2.2d
	- zip2 v9.2d,v0.2d,v2.2d
	- zip1 v10.2d,v1.2d,v3.2d
	- zip2 v11.2d,v1.2d,v3.2d
	- bl _vpsm4_enc_8blks
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- zip1 v8.4s,v4.4s,v5.4s
	- zip2 v9.4s,v4.4s,v5.4s
	- zip1 v10.4s,v6.4s,v7.4s
	- zip2 v11.4s,v6.4s,v7.4s
	- zip1 v4.2d,v8.2d,v10.2d
	- zip2 v5.2d,v8.2d,v10.2d
	- zip1 v6.2d,v9.2d,v11.2d
	- zip2 v7.2d,v9.2d,v11.2d
	- mov v12.d[0],x12
	- mov v12.d[1],x13
	-#ifdef __AARCH64EB__
	- rev32 v12.16b,v12.16b
	-#endif
	- mov w7,0x87
	- extr x9,x27,x27,#32
	- extr x13,x27,x26,#63
	- and w8,w7,w9,asr#31
	- eor x12,x8,x26,lsl#1
	- mov v13.d[0],x14
	- mov v13.d[1],x15
	-#ifdef __AARCH64EB__
	- rev32 v13.16b,v13.16b
	-#endif
	- mov w7,0x87
	- extr x9,x13,x13,#32
	- extr x15,x13,x12,#63
	- and w8,w7,w9,asr#31
	- eor x14,x8,x12,lsl#1
	- mov v14.d[0],x16
	- mov v14.d[1],x17
	-#ifdef __AARCH64EB__
	- rev32 v14.16b,v14.16b
	-#endif
	- mov w7,0x87
	- extr x9,x15,x15,#32
	- extr x17,x15,x14,#63
	- and w8,w7,w9,asr#31
	- eor x16,x8,x14,lsl#1
	- mov v15.d[0],x18
	- mov v15.d[1],x19
	-#ifdef __AARCH64EB__
	- rev32 v15.16b,v15.16b
	-#endif
	- mov w7,0x87
	- extr x9,x17,x17,#32
	- extr x19,x17,x16,#63
	- and w8,w7,w9,asr#31
	- eor x18,x8,x16,lsl#1
	- mov v8.d[0],x20
	- mov v8.d[1],x21
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov w7,0x87
	- extr x9,x19,x19,#32
	- extr x21,x19,x18,#63
	- and w8,w7,w9,asr#31
	- eor x20,x8,x18,lsl#1
	- mov v9.d[0],x22
	- mov v9.d[1],x23
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	- mov w7,0x87
	- extr x9,x21,x21,#32
	- extr x23,x21,x20,#63
	- and w8,w7,w9,asr#31
	- eor x22,x8,x20,lsl#1
	- mov v10.d[0],x24
	- mov v10.d[1],x25
	-#ifdef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	- mov w7,0x87
	- extr x9,x23,x23,#32
	- extr x25,x23,x22,#63
	- and w8,w7,w9,asr#31
	- eor x24,x8,x22,lsl#1
	- mov v11.d[0],x26
	- mov v11.d[1],x27
	-#ifdef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- mov w7,0x87
	- extr x9,x25,x25,#32
	- extr x27,x25,x24,#63
	- and w8,w7,w9,asr#31
	- eor x26,x8,x24,lsl#1
	- eor v0.16b, v0.16b, v12.16b
	- eor v1.16b, v1.16b, v13.16b
	- eor v2.16b, v2.16b, v14.16b
	- eor v3.16b, v3.16b, v15.16b
	- eor v4.16b, v4.16b, v8.16b
	- eor v5.16b, v5.16b, v9.16b
	- eor v6.16b, v6.16b, v10.16b
	- eor v7.16b, v7.16b, v11.16b
	-
	- // save the last tweak
	- st1 {v11.4s},[x5]
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs x2,x2,#8
	- b.gt .Lxts_8_blocks_process_gb
	- b 100f
	-.Lxts_4_blocks_process_gb:
	- mov v8.d[0],x12
	- mov v8.d[1],x13
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov v9.d[0],x14
	- mov v9.d[1],x15
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	- mov v10.d[0],x16
	- mov v10.d[1],x17
	-#ifdef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	- mov v11.d[0],x18
	- mov v11.d[1],x19
	-#ifdef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- cmp x2,#4
	- b.lt 1f
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- rbit v8.16b,v8.16b
	- rbit v9.16b,v9.16b
	- rbit v10.16b,v10.16b
	- rbit v11.16b,v11.16b
	- eor v4.16b, v4.16b, v8.16b
	- eor v5.16b, v5.16b, v9.16b
	- eor v6.16b, v6.16b, v10.16b
	- eor v7.16b, v7.16b, v11.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v8.16b
	- eor v1.16b, v1.16b, v9.16b
	- eor v2.16b, v2.16b, v10.16b
	- eor v3.16b, v3.16b, v11.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- sub x2,x2,#4
	- mov v8.d[0],x20
	- mov v8.d[1],x21
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov v9.d[0],x22
	- mov v9.d[1],x23
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	- mov v10.d[0],x24
	- mov v10.d[1],x25
	-#ifdef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	- // save the last tweak
	- st1 {v11.4s},[x5]
	-1:
	- // process last block
	- cmp x2,#1
	- b.lt 100f
	- b.gt 1f
	- ld1 {v4.4s},[x0],#16
	- rbit v8.16b,v8.16b
	- eor v4.16b, v4.16b, v8.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v8.16b
	- st1 {v4.4s},[x1],#16
	- // save the last tweak
	- st1 {v8.4s},[x5]
	- b 100f
	-1: // process last 2 blocks
	- cmp x2,#2
	- b.gt 1f
	- ld1 {v4.4s,v5.4s},[x0],#32
	- rbit v8.16b,v8.16b
	- rbit v9.16b,v9.16b
	- eor v4.16b, v4.16b, v8.16b
	- eor v5.16b, v5.16b, v9.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v8.16b
	- eor v1.16b, v1.16b, v9.16b
	- st1 {v0.4s,v1.4s},[x1],#32
	- // save the last tweak
	- st1 {v9.4s},[x5]
	- b 100f
	-1: // process last 3 blocks
	- ld1 {v4.4s,v5.4s,v6.4s},[x0],#48
	- rbit v8.16b,v8.16b
	- rbit v9.16b,v9.16b
	- rbit v10.16b,v10.16b
	- eor v4.16b, v4.16b, v8.16b
	- eor v5.16b, v5.16b, v9.16b
	- eor v6.16b, v6.16b, v10.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v8.16b
	- eor v1.16b, v1.16b, v9.16b
	- eor v2.16b, v2.16b, v10.16b
	- st1 {v0.4s,v1.4s,v2.4s},[x1],#48
	- // save the last tweak
	- st1 {v10.4s},[x5]
	-100:
	- cmp x29,0
	- b.eq .return_gb
	-
	-// This branch calculates the last two tweaks,
	-// while the encryption/decryption length is larger than 32
	-.last_2blks_tweak_gb:
	- ld1 {v8.4s},[x5]
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- rbit v2.16b,v8.16b
	- adrp x10,.Lxts_magic
	- ldr q0, [x10, #:lo12:.Lxts_magic]
	- shl v9.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v9.16b, v9.16b, v1.16b
	- rbit v9.16b,v9.16b
	- rbit v2.16b,v9.16b
	- adrp x10,.Lxts_magic
	- ldr q0, [x10, #:lo12:.Lxts_magic]
	- shl v10.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v10.16b, v10.16b, v1.16b
	- rbit v10.16b,v10.16b
	- b .check_dec_gb
	-
	-
	-// This branch calculates the last two tweaks,
	-// while the encryption/decryption length is equal to 32, who only need two tweaks
	-.only_2blks_tweak_gb:
	- mov v9.16b,v8.16b
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	- rbit v2.16b,v9.16b
	- adrp x10,.Lxts_magic
	- ldr q0, [x10, #:lo12:.Lxts_magic]
	- shl v10.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v10.16b, v10.16b, v1.16b
	- rbit v10.16b,v10.16b
	- b .check_dec_gb
	-
	-
	-// Determine whether encryption or decryption is required.
	-// The last two tweaks need to be swapped for decryption.
	-.check_dec_gb:
	- // encryption:1 decryption:0
	- cmp w28,1
	- b.eq .process_last_2blks_gb
	- mov v0.16B,v9.16b
	- mov v9.16B,v10.16b
	- mov v10.16B,v0.16b
	-
	-.process_last_2blks_gb:
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifdef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	- ld1 {v4.4s},[x0],#16
	- eor v4.16b, v4.16b, v9.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v9.16b
	- st1 {v4.4s},[x1],#16
	-
	- sub x26,x1,16
	-.loop_gb:
	- subs x29,x29,1
	- ldrb w7,[x26,x29]
	- ldrb w8,[x0,x29]
	- strb w8,[x26,x29]
	- strb w7,[x1,x29]
	- b.gt .loop_gb
	- ld1 {v4.4s}, [x26]
	- eor v4.16b, v4.16b, v10.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v10.16b
	- st1 {v4.4s}, [x26]
	-.return_gb:
	- ldp d14, d15, [sp], #0x10
	- ldp d12, d13, [sp], #0x10
	- ldp d10, d11, [sp], #0x10
	- ldp d8, d9, [sp], #0x10
	- ldp x29, x30, [sp], #0x10
	- ldp x27, x28, [sp], #0x10
	- ldp x25, x26, [sp], #0x10
	- ldp x23, x24, [sp], #0x10
	- ldp x21, x22, [sp], #0x10
	- ldp x19, x20, [sp], #0x10
	- ldp x17, x18, [sp], #0x10
	- ldp x15, x16, [sp], #0x10
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_xts_encrypt_gb,.-vpsm4_xts_encrypt_gb
	-.globl vpsm4_xts_encrypt
	-.type vpsm4_xts_encrypt,%function
	-.align 5
	-vpsm4_xts_encrypt:
	- AARCH64_SIGN_LINK_REGISTER
	- stp x15, x16, [sp, #-0x10]!
	- stp x17, x18, [sp, #-0x10]!
	- stp x19, x20, [sp, #-0x10]!
	- stp x21, x22, [sp, #-0x10]!
	- stp x23, x24, [sp, #-0x10]!
	- stp x25, x26, [sp, #-0x10]!
	- stp x27, x28, [sp, #-0x10]!
	- stp x29, x30, [sp, #-0x10]!
	- stp d8, d9, [sp, #-0x10]!
	- stp d10, d11, [sp, #-0x10]!
	- stp d12, d13, [sp, #-0x10]!
	- stp d14, d15, [sp, #-0x10]!
	- mov x26,x3
	- mov x27,x4
	- mov w28,w6
	- ld1 {v8.4s}, [x5]
	- mov x3,x27
	- adrp x10,.Lsbox
	- add x10,x10,#:lo12:.Lsbox
	- ld1 {v16.16b,v17.16b,v18.16b,v19.16b},[x10],#64
	- ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
	- ld1 {v24.16b,v25.16b,v26.16b,v27.16b},[x10],#64
	- ld1 {v28.16b,v29.16b,v30.16b,v31.16b},[x10]
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v8.s[0]
	- mov w13,v8.s[1]
	- mov w14,v8.s[2]
	- mov w15,v8.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v8.s[0],w15
	- mov v8.s[1],w14
	- mov v8.s[2],w13
	- mov v8.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov x3,x26
	- and x29,x2,#0x0F
	- // convert length into blocks
	- lsr x2,x2,4
	- cmp x2,#1
	- b.lt .return
	-
	- cmp x29,0
	- // If the encryption/decryption Length is N times of 16,
	- // the all blocks are encrypted/decrypted in .xts_encrypt_blocks
	- b.eq .xts_encrypt_blocks
	-
	- // If the encryption/decryption length is not N times of 16,
	- // the last two blocks are encrypted/decrypted in .last_2blks_tweak or .only_2blks_tweak
	- // the other blocks are encrypted/decrypted in .xts_encrypt_blocks
	- subs x2,x2,#1
	- b.eq .only_2blks_tweak
	-.xts_encrypt_blocks:
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov x12,v8.d[0]
	- mov x13,v8.d[1]
	- mov w7,0x87
	- extr x9,x13,x13,#32
	- extr x15,x13,x12,#63
	- and w8,w7,w9,asr#31
	- eor x14,x8,x12,lsl#1
	- mov w7,0x87
	- extr x9,x15,x15,#32
	- extr x17,x15,x14,#63
	- and w8,w7,w9,asr#31
	- eor x16,x8,x14,lsl#1
	- mov w7,0x87
	- extr x9,x17,x17,#32
	- extr x19,x17,x16,#63
	- and w8,w7,w9,asr#31
	- eor x18,x8,x16,lsl#1
	- mov w7,0x87
	- extr x9,x19,x19,#32
	- extr x21,x19,x18,#63
	- and w8,w7,w9,asr#31
	- eor x20,x8,x18,lsl#1
	- mov w7,0x87
	- extr x9,x21,x21,#32
	- extr x23,x21,x20,#63
	- and w8,w7,w9,asr#31
	- eor x22,x8,x20,lsl#1
	- mov w7,0x87
	- extr x9,x23,x23,#32
	- extr x25,x23,x22,#63
	- and w8,w7,w9,asr#31
	- eor x24,x8,x22,lsl#1
	- mov w7,0x87
	- extr x9,x25,x25,#32
	- extr x27,x25,x24,#63
	- and w8,w7,w9,asr#31
	- eor x26,x8,x24,lsl#1
	-.Lxts_8_blocks_process:
	- cmp x2,#8
	- b.lt .Lxts_4_blocks_process
	- mov v0.d[0],x12
	- mov v0.d[1],x13
	-#ifdef __AARCH64EB__
	- rev32 v0.16b,v0.16b
	-#endif
	- mov v1.d[0],x14
	- mov v1.d[1],x15
	-#ifdef __AARCH64EB__
	- rev32 v1.16b,v1.16b
	-#endif
	- mov v2.d[0],x16
	- mov v2.d[1],x17
	-#ifdef __AARCH64EB__
	- rev32 v2.16b,v2.16b
	-#endif
	- mov v3.d[0],x18
	- mov v3.d[1],x19
	-#ifdef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- mov v12.d[0],x20
	- mov v12.d[1],x21
	-#ifdef __AARCH64EB__
	- rev32 v12.16b,v12.16b
	-#endif
	- mov v13.d[0],x22
	- mov v13.d[1],x23
	-#ifdef __AARCH64EB__
	- rev32 v13.16b,v13.16b
	-#endif
	- mov v14.d[0],x24
	- mov v14.d[1],x25
	-#ifdef __AARCH64EB__
	- rev32 v14.16b,v14.16b
	-#endif
	- mov v15.d[0],x26
	- mov v15.d[1],x27
	-#ifdef __AARCH64EB__
	- rev32 v15.16b,v15.16b
	-#endif
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- eor v4.16b, v4.16b, v0.16b
	- eor v5.16b, v5.16b, v1.16b
	- eor v6.16b, v6.16b, v2.16b
	- eor v7.16b, v7.16b, v3.16b
	- ld1 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	- eor v8.16b, v8.16b, v12.16b
	- eor v9.16b, v9.16b, v13.16b
	- eor v10.16b, v10.16b, v14.16b
	- eor v11.16b, v11.16b, v15.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- zip1 v0.4s,v8.4s,v9.4s
	- zip2 v1.4s,v8.4s,v9.4s
	- zip1 v2.4s,v10.4s,v11.4s
	- zip2 v3.4s,v10.4s,v11.4s
	- zip1 v8.2d,v0.2d,v2.2d
	- zip2 v9.2d,v0.2d,v2.2d
	- zip1 v10.2d,v1.2d,v3.2d
	- zip2 v11.2d,v1.2d,v3.2d
	- bl _vpsm4_enc_8blks
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- zip1 v8.4s,v4.4s,v5.4s
	- zip2 v9.4s,v4.4s,v5.4s
	- zip1 v10.4s,v6.4s,v7.4s
	- zip2 v11.4s,v6.4s,v7.4s
	- zip1 v4.2d,v8.2d,v10.2d
	- zip2 v5.2d,v8.2d,v10.2d
	- zip1 v6.2d,v9.2d,v11.2d
	- zip2 v7.2d,v9.2d,v11.2d
	- mov v12.d[0],x12
	- mov v12.d[1],x13
	-#ifdef __AARCH64EB__
	- rev32 v12.16b,v12.16b
	-#endif
	- mov w7,0x87
	- extr x9,x27,x27,#32
	- extr x13,x27,x26,#63
	- and w8,w7,w9,asr#31
	- eor x12,x8,x26,lsl#1
	- mov v13.d[0],x14
	- mov v13.d[1],x15
	-#ifdef __AARCH64EB__
	- rev32 v13.16b,v13.16b
	-#endif
	- mov w7,0x87
	- extr x9,x13,x13,#32
	- extr x15,x13,x12,#63
	- and w8,w7,w9,asr#31
	- eor x14,x8,x12,lsl#1
	- mov v14.d[0],x16
	- mov v14.d[1],x17
	-#ifdef __AARCH64EB__
	- rev32 v14.16b,v14.16b
	-#endif
	- mov w7,0x87
	- extr x9,x15,x15,#32
	- extr x17,x15,x14,#63
	- and w8,w7,w9,asr#31
	- eor x16,x8,x14,lsl#1
	- mov v15.d[0],x18
	- mov v15.d[1],x19
	-#ifdef __AARCH64EB__
	- rev32 v15.16b,v15.16b
	-#endif
	- mov w7,0x87
	- extr x9,x17,x17,#32
	- extr x19,x17,x16,#63
	- and w8,w7,w9,asr#31
	- eor x18,x8,x16,lsl#1
	- mov v8.d[0],x20
	- mov v8.d[1],x21
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov w7,0x87
	- extr x9,x19,x19,#32
	- extr x21,x19,x18,#63
	- and w8,w7,w9,asr#31
	- eor x20,x8,x18,lsl#1
	- mov v9.d[0],x22
	- mov v9.d[1],x23
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	- mov w7,0x87
	- extr x9,x21,x21,#32
	- extr x23,x21,x20,#63
	- and w8,w7,w9,asr#31
	- eor x22,x8,x20,lsl#1
	- mov v10.d[0],x24
	- mov v10.d[1],x25
	-#ifdef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	- mov w7,0x87
	- extr x9,x23,x23,#32
	- extr x25,x23,x22,#63
	- and w8,w7,w9,asr#31
	- eor x24,x8,x22,lsl#1
	- mov v11.d[0],x26
	- mov v11.d[1],x27
	-#ifdef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- mov w7,0x87
	- extr x9,x25,x25,#32
	- extr x27,x25,x24,#63
	- and w8,w7,w9,asr#31
	- eor x26,x8,x24,lsl#1
	- eor v0.16b, v0.16b, v12.16b
	- eor v1.16b, v1.16b, v13.16b
	- eor v2.16b, v2.16b, v14.16b
	- eor v3.16b, v3.16b, v15.16b
	- eor v4.16b, v4.16b, v8.16b
	- eor v5.16b, v5.16b, v9.16b
	- eor v6.16b, v6.16b, v10.16b
	- eor v7.16b, v7.16b, v11.16b
	-
	- // save the last tweak
	- st1 {v11.4s},[x5]
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs x2,x2,#8
	- b.gt .Lxts_8_blocks_process
	- b 100f
	-.Lxts_4_blocks_process:
	- mov v8.d[0],x12
	- mov v8.d[1],x13
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov v9.d[0],x14
	- mov v9.d[1],x15
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	- mov v10.d[0],x16
	- mov v10.d[1],x17
	-#ifdef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	- mov v11.d[0],x18
	- mov v11.d[1],x19
	-#ifdef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- cmp x2,#4
	- b.lt 1f
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- eor v4.16b, v4.16b, v8.16b
	- eor v5.16b, v5.16b, v9.16b
	- eor v6.16b, v6.16b, v10.16b
	- eor v7.16b, v7.16b, v11.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v8.16b
	- eor v1.16b, v1.16b, v9.16b
	- eor v2.16b, v2.16b, v10.16b
	- eor v3.16b, v3.16b, v11.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- sub x2,x2,#4
	- mov v8.d[0],x20
	- mov v8.d[1],x21
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov v9.d[0],x22
	- mov v9.d[1],x23
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	- mov v10.d[0],x24
	- mov v10.d[1],x25
	-#ifdef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	- // save the last tweak
	- st1 {v11.4s},[x5]
	-1:
	- // process last block
	- cmp x2,#1
	- b.lt 100f
	- b.gt 1f
	- ld1 {v4.4s},[x0],#16
	- eor v4.16b, v4.16b, v8.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v8.16b
	- st1 {v4.4s},[x1],#16
	- // save the last tweak
	- st1 {v8.4s},[x5]
	- b 100f
	-1: // process last 2 blocks
	- cmp x2,#2
	- b.gt 1f
	- ld1 {v4.4s,v5.4s},[x0],#32
	- eor v4.16b, v4.16b, v8.16b
	- eor v5.16b, v5.16b, v9.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v8.16b
	- eor v1.16b, v1.16b, v9.16b
	- st1 {v0.4s,v1.4s},[x1],#32
	- // save the last tweak
	- st1 {v9.4s},[x5]
	- b 100f
	-1: // process last 3 blocks
	- ld1 {v4.4s,v5.4s,v6.4s},[x0],#48
	- eor v4.16b, v4.16b, v8.16b
	- eor v5.16b, v5.16b, v9.16b
	- eor v6.16b, v6.16b, v10.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v8.16b
	- eor v1.16b, v1.16b, v9.16b
	- eor v2.16b, v2.16b, v10.16b
	- st1 {v0.4s,v1.4s,v2.4s},[x1],#48
	- // save the last tweak
	- st1 {v10.4s},[x5]
	-100:
	- cmp x29,0
	- b.eq .return
	-
	-// This branch calculates the last two tweaks,
	-// while the encryption/decryption length is larger than 32
	-.last_2blks_tweak:
	- ld1 {v8.4s},[x5]
	-#ifdef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- mov v2.16b,v8.16b
	- adrp x10,.Lxts_magic
	- ldr q0, [x10, #:lo12:.Lxts_magic]
	- shl v9.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v9.16b, v9.16b, v1.16b
	- mov v2.16b,v9.16b
	- adrp x10,.Lxts_magic
	- ldr q0, [x10, #:lo12:.Lxts_magic]
	- shl v10.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v10.16b, v10.16b, v1.16b
	- b .check_dec
	-
	-
	-// This branch calculates the last two tweaks,
	-// while the encryption/decryption length is equal to 32, who only need two tweaks
	-.only_2blks_tweak:
	- mov v9.16b,v8.16b
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	- mov v2.16b,v9.16b
	- adrp x10,.Lxts_magic
	- ldr q0, [x10, #:lo12:.Lxts_magic]
	- shl v10.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v10.16b, v10.16b, v1.16b
	- b .check_dec
	-
	-
	-// Determine whether encryption or decryption is required.
	-// The last two tweaks need to be swapped for decryption.
	-.check_dec:
	- // encryption:1 decryption:0
	- cmp w28,1
	- b.eq .process_last_2blks
	- mov v0.16B,v9.16b
	- mov v9.16B,v10.16b
	- mov v10.16B,v0.16b
	-
	-.process_last_2blks:
	-#ifdef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifdef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	- ld1 {v4.4s},[x0],#16
	- eor v4.16b, v4.16b, v9.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v9.16b
	- st1 {v4.4s},[x1],#16
	-
	- sub x26,x1,16
	-.loop:
	- subs x29,x29,1
	- ldrb w7,[x26,x29]
	- ldrb w8,[x0,x29]
	- strb w8,[x26,x29]
	- strb w7,[x1,x29]
	- b.gt .loop
	- ld1 {v4.4s}, [x26]
	- eor v4.16b, v4.16b, v10.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- movi v1.16b,#64
	- movi v2.16b,#128
	- movi v3.16b,#192
	- mov v0.s[0],w6
	-
	- sub v1.16b,v0.16b,v1.16b
	- sub v2.16b,v0.16b,v2.16b
	- sub v3.16b,v0.16b,v3.16b
	-
	- tbl v0.16b,{v16.16b,v17.16b,v18.16b,v19.16b},v0.16b
	- tbl v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v1.16b
	- tbl v2.16b,{v24.16b,v25.16b,v26.16b,v27.16b},v2.16b
	- tbl v3.16b,{v28.16b,v29.16b,v30.16b,v31.16b},v3.16b
	-
	- mov w6,v0.s[0]
	- mov w7,v1.s[0]
	- mov w9,v2.s[0]
	- add w7,w6,w7
	- mov w6,v3.s[0]
	- add w7,w7,w9
	- add w7,w7,w6
	-
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v10.16b
	- st1 {v4.4s}, [x26]
	-.return:
	- ldp d14, d15, [sp], #0x10
	- ldp d12, d13, [sp], #0x10
	- ldp d10, d11, [sp], #0x10
	- ldp d8, d9, [sp], #0x10
	- ldp x29, x30, [sp], #0x10
	- ldp x27, x28, [sp], #0x10
	- ldp x25, x26, [sp], #0x10
	- ldp x23, x24, [sp], #0x10
	- ldp x21, x22, [sp], #0x10
	- ldp x19, x20, [sp], #0x10
	- ldp x17, x18, [sp], #0x10
	- ldp x15, x16, [sp], #0x10
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_xts_encrypt,.-vpsm4_xts_encrypt
	diff --git a/sys/crypto/openssl/aarch64/vpsm4_ex-armv8.S b/sys/crypto/openssl/aarch64/vpsm4_ex-armv8.S
	deleted file mode 100644
	--- a/sys/crypto/openssl/aarch64/vpsm4_ex-armv8.S
	+++ /dev/null
	@@ -1,4543 +0,0 @@
	-/* Do not modify. This file is auto-generated from vpsm4_ex-armv8.pl. */
	-// Copyright 2022-2026 The OpenSSL Project Authors. All Rights Reserved.
	-//
	-// Licensed under the Apache License 2.0 (the "License"). You may not use
	-// this file except in compliance with the License. You can obtain a copy
	-// in the file LICENSE in the source distribution or at
	-// https://www.openssl.org/source/license.html
	-
	-//
	-// This module implements SM4 with ASIMD and AESE on AARCH64
	-//
	-// Dec 2022
	-//
	-
	-// $output is the last argument if it looks like a file (it has an extension)
	-// $flavour is the first argument if it doesn't look like a file
	-#include "arm_arch.h"
	-.arch armv8-a+crypto
	-.text
	-
	-.type _vpsm4_ex_consts,%object
	-.align 7
	-_vpsm4_ex_consts:
	-.Lck:
	-.long 0x00070E15, 0x1C232A31, 0x383F464D, 0x545B6269
	-.long 0x70777E85, 0x8C939AA1, 0xA8AFB6BD, 0xC4CBD2D9
	-.long 0xE0E7EEF5, 0xFC030A11, 0x181F262D, 0x343B4249
	-.long 0x50575E65, 0x6C737A81, 0x888F969D, 0xA4ABB2B9
	-.long 0xC0C7CED5, 0xDCE3EAF1, 0xF8FF060D, 0x141B2229
	-.long 0x30373E45, 0x4C535A61, 0x686F767D, 0x848B9299
	-.long 0xA0A7AEB5, 0xBCC3CAD1, 0xD8DFE6ED, 0xF4FB0209
	-.long 0x10171E25, 0x2C333A41, 0x484F565D, 0x646B7279
	-.Lfk:
	-.quad 0x56aa3350a3b1bac6,0xb27022dc677d9197
	-.Lshuffles:
	-.quad 0x0B0A090807060504,0x030201000F0E0D0C
	-.Lxts_magic:
	-#ifndef __AARCH64EB__
	-.quad 0x0101010101010187,0x0101010101010101
	-#else
	-.quad 0x0101010101010101,0x0101010101010187
	-#endif
	-.Lsbox_magic:
	-#ifndef __AARCH64EB__
	-.quad 0x0b0e0104070a0d00,0x0306090c0f020508
	-.quad 0x62185a2042387a00,0x22581a6002783a40
	-.quad 0x15df62a89e54e923,0xc10bb67c4a803df7
	-.quad 0xb9aa6b78c1d21300,0x1407c6d56c7fbead
	-.quad 0x6404462679195b3b,0xe383c1a1fe9edcbc
	-#else
	-.quad 0x0306090c0f020508,0x0b0e0104070a0d00
	-.quad 0x22581a6002783a40,0x62185a2042387a00
	-.quad 0xc10bb67c4a803df7,0x15df62a89e54e923
	-.quad 0x1407c6d56c7fbead,0xb9aa6b78c1d21300
	-.quad 0xe383c1a1fe9edcbc,0x6404462679195b3b
	-#endif
	-.quad 0x0f0f0f0f0f0f0f0f,0x0f0f0f0f0f0f0f0f
	-
	-.size _vpsm4_ex_consts,.-_vpsm4_ex_consts
	-.type _vpsm4_ex_set_key,%function
	-.align 4
	-_vpsm4_ex_set_key:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v5.4s},[x0]
	- adrp x9, .Lsbox_magic
	- add x9, x9, #:lo12:.Lsbox_magic
	- ldr q26, [x9]
	- ldr q27, [x9, 16]
	- ldr q28, [x9, 32]
	- ldr q29, [x9, 48]
	- ldr q30, [x9, 64]
	- ldr q31, [x9, 80]
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	- adrp x5,.Lshuffles
	- add x5,x5,#:lo12:.Lshuffles
	- ld1 {v7.2d},[x5]
	- adrp x5,.Lfk
	- add x5,x5,#:lo12:.Lfk
	- ld1 {v6.2d},[x5]
	- eor v5.16b,v5.16b,v6.16b
	- mov x6,#32
	- adrp x5,.Lck
	- add x5,x5,#:lo12:.Lck
	- movi v0.16b,#64
	- cbnz w2,1f
	- add x1,x1,124
	-1:
	- mov w7,v5.s[1]
	- ldr w8,[x5],#4
	- eor w8,w8,w7
	- mov w7,v5.s[2]
	- eor w8,w8,w7
	- mov w7,v5.s[3]
	- eor w8,w8,w7
	- // optimize sbox using AESE instruction
	- mov v4.s[0],w8
	- tbl v0.16b, {v4.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- mov w7,v0.s[0]
	- eor w8,w7,w7,ror #19
	- eor w8,w8,w7,ror #9
	- mov w7,v5.s[0]
	- eor w8,w8,w7
	- mov v5.s[0],w8
	- cbz w2,2f
	- str w8,[x1],#4
	- b 3f
	-2:
	- str w8,[x1],#-4
	-3:
	- tbl v5.16b,{v5.16b},v7.16b
	- subs x6,x6,#1
	- b.ne 1b
	- ret
	-.size _vpsm4_ex_set_key,.-_vpsm4_ex_set_key
	-.type _vpsm4_ex_enc_4blks,%function
	-.align 4
	-_vpsm4_ex_enc_4blks:
	- AARCH64_VALID_CALL_TARGET
	- mov x10,x3
	- mov w11,#8
	-10:
	- ldp w7,w8,[x10],8
	- dup v12.4s,w7
	- dup v13.4s,w8
	-
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor v14.16b,v6.16b,v7.16b
	- eor v12.16b,v5.16b,v12.16b
	- eor v12.16b,v14.16b,v12.16b
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v12.16b}, v26.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- mov v12.16b,v0.16b
	-
	- // linear transformation
	- ushr v0.4s,v12.4s,32-2
	- ushr v1.4s,v12.4s,32-10
	- ushr v2.4s,v12.4s,32-18
	- ushr v3.4s,v12.4s,32-24
	- sli v0.4s,v12.4s,2
	- sli v1.4s,v12.4s,10
	- sli v2.4s,v12.4s,18
	- sli v3.4s,v12.4s,24
	- eor v24.16b,v0.16b,v12.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v12.16b,v2.16b,v3.16b
	- eor v12.16b,v12.16b,v24.16b
	- eor v4.16b,v4.16b,v12.16b
	-
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor v14.16b,v14.16b,v4.16b
	- eor v13.16b,v14.16b,v13.16b
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v13.16b}, v26.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- mov v13.16b,v0.16b
	-
	- // linear transformation
	- ushr v0.4s,v13.4s,32-2
	- ushr v1.4s,v13.4s,32-10
	- ushr v2.4s,v13.4s,32-18
	- ushr v3.4s,v13.4s,32-24
	- sli v0.4s,v13.4s,2
	- sli v1.4s,v13.4s,10
	- sli v2.4s,v13.4s,18
	- sli v3.4s,v13.4s,24
	- eor v24.16b,v0.16b,v13.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v13.16b,v2.16b,v3.16b
	- eor v13.16b,v13.16b,v24.16b
	- ldp w7,w8,[x10],8
	- eor v5.16b,v5.16b,v13.16b
	-
	- dup v12.4s,w7
	- dup v13.4s,w8
	-
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor v14.16b,v4.16b,v5.16b
	- eor v12.16b,v7.16b,v12.16b
	- eor v12.16b,v14.16b,v12.16b
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v12.16b}, v26.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- mov v12.16b,v0.16b
	-
	- // linear transformation
	- ushr v0.4s,v12.4s,32-2
	- ushr v1.4s,v12.4s,32-10
	- ushr v2.4s,v12.4s,32-18
	- ushr v3.4s,v12.4s,32-24
	- sli v0.4s,v12.4s,2
	- sli v1.4s,v12.4s,10
	- sli v2.4s,v12.4s,18
	- sli v3.4s,v12.4s,24
	- eor v24.16b,v0.16b,v12.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v12.16b,v2.16b,v3.16b
	- eor v12.16b,v12.16b,v24.16b
	- eor v6.16b,v6.16b,v12.16b
	-
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor v14.16b,v14.16b,v6.16b
	- eor v13.16b,v14.16b,v13.16b
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v13.16b}, v26.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- mov v13.16b,v0.16b
	-
	- // linear transformation
	- ushr v0.4s,v13.4s,32-2
	- ushr v1.4s,v13.4s,32-10
	- ushr v2.4s,v13.4s,32-18
	- ushr v3.4s,v13.4s,32-24
	- sli v0.4s,v13.4s,2
	- sli v1.4s,v13.4s,10
	- sli v2.4s,v13.4s,18
	- sli v3.4s,v13.4s,24
	- eor v24.16b,v0.16b,v13.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v13.16b,v2.16b,v3.16b
	- eor v13.16b,v13.16b,v24.16b
	- eor v7.16b,v7.16b,v13.16b
	- subs w11,w11,#1
	- b.ne 10b
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v4.16b
	-#else
	- mov v3.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v2.16b,v5.16b
	-#else
	- mov v2.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v1.16b,v6.16b
	-#else
	- mov v1.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v0.16b,v7.16b
	-#else
	- mov v0.16b,v7.16b
	-#endif
	- ret
	-.size _vpsm4_ex_enc_4blks,.-_vpsm4_ex_enc_4blks
	-.type _vpsm4_ex_enc_8blks,%function
	-.align 4
	-_vpsm4_ex_enc_8blks:
	- AARCH64_VALID_CALL_TARGET
	- mov x10,x3
	- mov w11,#8
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- dup v12.4s,w7
	- eor v14.16b,v6.16b,v7.16b
	- eor v15.16b,v10.16b,v11.16b
	- eor v0.16b,v5.16b,v12.16b
	- eor v1.16b,v9.16b,v12.16b
	- eor v12.16b,v14.16b,v0.16b
	- eor v13.16b,v15.16b,v1.16b
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v12.16b}, v26.16b
	- tbl v1.16b, {v13.16b}, v26.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- ushr v24.16b, v1.16b, 4
	- and v1.16b, v1.16b, v31.16b
	- tbl v1.16b, {v28.16b}, v1.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v1.16b, v1.16b, v24.16b
	- eor v25.16b, v25.16b, v25.16b
	- aese v0.16b,v25.16b
	- aese v1.16b,v25.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- ushr v24.16b, v1.16b, 4
	- and v1.16b, v1.16b, v31.16b
	- tbl v1.16b, {v30.16b}, v1.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v1.16b, v1.16b, v24.16b
	- mov v12.16b,v0.16b
	- mov v13.16b,v1.16b
	-
	- // linear transformation
	- ushr v0.4s,v12.4s,32-2
	- ushr v25.4s,v13.4s,32-2
	- ushr v1.4s,v12.4s,32-10
	- ushr v2.4s,v12.4s,32-18
	- ushr v3.4s,v12.4s,32-24
	- sli v0.4s,v12.4s,2
	- sli v25.4s,v13.4s,2
	- sli v1.4s,v12.4s,10
	- sli v2.4s,v12.4s,18
	- sli v3.4s,v12.4s,24
	- eor v24.16b,v0.16b,v12.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v12.16b,v2.16b,v3.16b
	- eor v12.16b,v12.16b,v24.16b
	- ushr v1.4s,v13.4s,32-10
	- ushr v2.4s,v13.4s,32-18
	- ushr v3.4s,v13.4s,32-24
	- sli v1.4s,v13.4s,10
	- sli v2.4s,v13.4s,18
	- sli v3.4s,v13.4s,24
	- eor v24.16b,v25.16b,v13.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v13.16b,v2.16b,v3.16b
	- eor v13.16b,v13.16b,v24.16b
	- eor v4.16b,v4.16b,v12.16b
	- eor v8.16b,v8.16b,v13.16b
	-
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- dup v13.4s,w8
	- eor v14.16b,v14.16b,v4.16b
	- eor v15.16b,v15.16b,v8.16b
	- eor v12.16b,v14.16b,v13.16b
	- eor v13.16b,v15.16b,v13.16b
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v12.16b}, v26.16b
	- tbl v1.16b, {v13.16b}, v26.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- ushr v24.16b, v1.16b, 4
	- and v1.16b, v1.16b, v31.16b
	- tbl v1.16b, {v28.16b}, v1.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v1.16b, v1.16b, v24.16b
	- eor v25.16b, v25.16b, v25.16b
	- aese v0.16b,v25.16b
	- aese v1.16b,v25.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- ushr v24.16b, v1.16b, 4
	- and v1.16b, v1.16b, v31.16b
	- tbl v1.16b, {v30.16b}, v1.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v1.16b, v1.16b, v24.16b
	- mov v12.16b,v0.16b
	- mov v13.16b,v1.16b
	-
	- // linear transformation
	- ushr v0.4s,v12.4s,32-2
	- ushr v25.4s,v13.4s,32-2
	- ushr v1.4s,v12.4s,32-10
	- ushr v2.4s,v12.4s,32-18
	- ushr v3.4s,v12.4s,32-24
	- sli v0.4s,v12.4s,2
	- sli v25.4s,v13.4s,2
	- sli v1.4s,v12.4s,10
	- sli v2.4s,v12.4s,18
	- sli v3.4s,v12.4s,24
	- eor v24.16b,v0.16b,v12.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v12.16b,v2.16b,v3.16b
	- eor v12.16b,v12.16b,v24.16b
	- ushr v1.4s,v13.4s,32-10
	- ushr v2.4s,v13.4s,32-18
	- ushr v3.4s,v13.4s,32-24
	- sli v1.4s,v13.4s,10
	- sli v2.4s,v13.4s,18
	- sli v3.4s,v13.4s,24
	- eor v24.16b,v25.16b,v13.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v13.16b,v2.16b,v3.16b
	- eor v13.16b,v13.16b,v24.16b
	- ldp w7,w8,[x10],8
	- eor v5.16b,v5.16b,v12.16b
	- eor v9.16b,v9.16b,v13.16b
	-
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- dup v12.4s,w7
	- eor v14.16b,v4.16b,v5.16b
	- eor v15.16b,v8.16b,v9.16b
	- eor v0.16b,v7.16b,v12.16b
	- eor v1.16b,v11.16b,v12.16b
	- eor v12.16b,v14.16b,v0.16b
	- eor v13.16b,v15.16b,v1.16b
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v12.16b}, v26.16b
	- tbl v1.16b, {v13.16b}, v26.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- ushr v24.16b, v1.16b, 4
	- and v1.16b, v1.16b, v31.16b
	- tbl v1.16b, {v28.16b}, v1.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v1.16b, v1.16b, v24.16b
	- eor v25.16b, v25.16b, v25.16b
	- aese v0.16b,v25.16b
	- aese v1.16b,v25.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- ushr v24.16b, v1.16b, 4
	- and v1.16b, v1.16b, v31.16b
	- tbl v1.16b, {v30.16b}, v1.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v1.16b, v1.16b, v24.16b
	- mov v12.16b,v0.16b
	- mov v13.16b,v1.16b
	-
	- // linear transformation
	- ushr v0.4s,v12.4s,32-2
	- ushr v25.4s,v13.4s,32-2
	- ushr v1.4s,v12.4s,32-10
	- ushr v2.4s,v12.4s,32-18
	- ushr v3.4s,v12.4s,32-24
	- sli v0.4s,v12.4s,2
	- sli v25.4s,v13.4s,2
	- sli v1.4s,v12.4s,10
	- sli v2.4s,v12.4s,18
	- sli v3.4s,v12.4s,24
	- eor v24.16b,v0.16b,v12.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v12.16b,v2.16b,v3.16b
	- eor v12.16b,v12.16b,v24.16b
	- ushr v1.4s,v13.4s,32-10
	- ushr v2.4s,v13.4s,32-18
	- ushr v3.4s,v13.4s,32-24
	- sli v1.4s,v13.4s,10
	- sli v2.4s,v13.4s,18
	- sli v3.4s,v13.4s,24
	- eor v24.16b,v25.16b,v13.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v13.16b,v2.16b,v3.16b
	- eor v13.16b,v13.16b,v24.16b
	- eor v6.16b,v6.16b,v12.16b
	- eor v10.16b,v10.16b,v13.16b
	-
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- dup v13.4s,w8
	- eor v14.16b,v14.16b,v6.16b
	- eor v15.16b,v15.16b,v10.16b
	- eor v12.16b,v14.16b,v13.16b
	- eor v13.16b,v15.16b,v13.16b
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v12.16b}, v26.16b
	- tbl v1.16b, {v13.16b}, v26.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- ushr v24.16b, v1.16b, 4
	- and v1.16b, v1.16b, v31.16b
	- tbl v1.16b, {v28.16b}, v1.16b
	- tbl v24.16b, {v27.16b}, v24.16b
	- eor v1.16b, v1.16b, v24.16b
	- eor v25.16b, v25.16b, v25.16b
	- aese v0.16b,v25.16b
	- aese v1.16b,v25.16b
	- ushr v24.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v0.16b, v0.16b, v24.16b
	- ushr v24.16b, v1.16b, 4
	- and v1.16b, v1.16b, v31.16b
	- tbl v1.16b, {v30.16b}, v1.16b
	- tbl v24.16b, {v29.16b}, v24.16b
	- eor v1.16b, v1.16b, v24.16b
	- mov v12.16b,v0.16b
	- mov v13.16b,v1.16b
	-
	- // linear transformation
	- ushr v0.4s,v12.4s,32-2
	- ushr v25.4s,v13.4s,32-2
	- ushr v1.4s,v12.4s,32-10
	- ushr v2.4s,v12.4s,32-18
	- ushr v3.4s,v12.4s,32-24
	- sli v0.4s,v12.4s,2
	- sli v25.4s,v13.4s,2
	- sli v1.4s,v12.4s,10
	- sli v2.4s,v12.4s,18
	- sli v3.4s,v12.4s,24
	- eor v24.16b,v0.16b,v12.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v12.16b,v2.16b,v3.16b
	- eor v12.16b,v12.16b,v24.16b
	- ushr v1.4s,v13.4s,32-10
	- ushr v2.4s,v13.4s,32-18
	- ushr v3.4s,v13.4s,32-24
	- sli v1.4s,v13.4s,10
	- sli v2.4s,v13.4s,18
	- sli v3.4s,v13.4s,24
	- eor v24.16b,v25.16b,v13.16b
	- eor v24.16b,v24.16b,v1.16b
	- eor v13.16b,v2.16b,v3.16b
	- eor v13.16b,v13.16b,v24.16b
	- eor v7.16b,v7.16b,v12.16b
	- eor v11.16b,v11.16b,v13.16b
	- subs w11,w11,#1
	- b.ne 10b
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v4.16b
	-#else
	- mov v3.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v2.16b,v5.16b
	-#else
	- mov v2.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v1.16b,v6.16b
	-#else
	- mov v1.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v0.16b,v7.16b
	-#else
	- mov v0.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v8.16b
	-#else
	- mov v7.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v9.16b
	-#else
	- mov v6.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v10.16b
	-#else
	- mov v5.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v11.16b
	-#else
	- mov v4.16b,v11.16b
	-#endif
	- ret
	-.size _vpsm4_ex_enc_8blks,.-_vpsm4_ex_enc_8blks
	-.globl vpsm4_ex_set_encrypt_key
	-.type vpsm4_ex_set_encrypt_key,%function
	-.align 5
	-vpsm4_ex_set_encrypt_key:
	- AARCH64_SIGN_LINK_REGISTER
	- stp x29,x30,[sp,#-16]!
	- mov w2,1
	- bl _vpsm4_ex_set_key
	- ldp x29,x30,[sp],#16
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_ex_set_encrypt_key,.-vpsm4_ex_set_encrypt_key
	-.globl vpsm4_ex_set_decrypt_key
	-.type vpsm4_ex_set_decrypt_key,%function
	-.align 5
	-vpsm4_ex_set_decrypt_key:
	- AARCH64_SIGN_LINK_REGISTER
	- stp x29,x30,[sp,#-16]!
	- mov w2,0
	- bl _vpsm4_ex_set_key
	- ldp x29,x30,[sp],#16
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_ex_set_decrypt_key,.-vpsm4_ex_set_decrypt_key
	-.globl vpsm4_ex_encrypt
	-.type vpsm4_ex_encrypt,%function
	-.align 5
	-vpsm4_ex_encrypt:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v4.4s},[x0]
	- adrp x9, .Lsbox_magic
	- add x9, x9, #:lo12:.Lsbox_magic
	- ldr q26, [x9]
	- ldr q27, [x9, 16]
	- ldr q28, [x9, 32]
	- ldr q29, [x9, 48]
	- ldr q30, [x9, 64]
	- ldr q31, [x9, 80]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x3,x2
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- st1 {v4.4s},[x1]
	- ret
	-.size vpsm4_ex_encrypt,.-vpsm4_ex_encrypt
	-.globl vpsm4_ex_decrypt
	-.type vpsm4_ex_decrypt,%function
	-.align 5
	-vpsm4_ex_decrypt:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v4.4s},[x0]
	- adrp x9, .Lsbox_magic
	- add x9, x9, #:lo12:.Lsbox_magic
	- ldr q26, [x9]
	- ldr q27, [x9, 16]
	- ldr q28, [x9, 32]
	- ldr q29, [x9, 48]
	- ldr q30, [x9, 64]
	- ldr q31, [x9, 80]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x3,x2
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- st1 {v4.4s},[x1]
	- ret
	-.size vpsm4_ex_decrypt,.-vpsm4_ex_decrypt
	-.globl vpsm4_ex_ecb_encrypt
	-.type vpsm4_ex_ecb_encrypt,%function
	-.align 5
	-vpsm4_ex_ecb_encrypt:
	- AARCH64_SIGN_LINK_REGISTER
	- // convert length into blocks
	- lsr x2,x2,4
	- stp d8,d9,[sp,#-80]!
	- stp d10,d11,[sp,#16]
	- stp d12,d13,[sp,#32]
	- stp d14,d15,[sp,#48]
	- stp x29,x30,[sp,#64]
	- adrp x9, .Lsbox_magic
	- add x9, x9, #:lo12:.Lsbox_magic
	- ldr q26, [x9]
	- ldr q27, [x9, 16]
	- ldr q28, [x9, 32]
	- ldr q29, [x9, 48]
	- ldr q30, [x9, 64]
	- ldr q31, [x9, 80]
	-.Lecb_8_blocks_process:
	- cmp w2,#8
	- b.lt .Lecb_4_blocks_process
	- ld4 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- ld4 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- bl _vpsm4_ex_enc_8blks
	- st4 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st4 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs w2,w2,#8
	- b.gt .Lecb_8_blocks_process
	- b 100f
	-.Lecb_4_blocks_process:
	- cmp w2,#4
	- b.lt 1f
	- ld4 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_ex_enc_4blks
	- st4 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- sub w2,w2,#4
	-1:
	- // process last block
	- cmp w2,#1
	- b.lt 100f
	- b.gt 1f
	- ld1 {v4.4s},[x0]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- st1 {v4.4s},[x1]
	- b 100f
	-1: // process last 2 blocks
	- ld4 {v4.s,v5.s,v6.s,v7.s}[0],[x0],#16
	- ld4 {v4.s,v5.s,v6.s,v7.s}[1],[x0],#16
	- cmp w2,#2
	- b.gt 1f
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_ex_enc_4blks
	- st4 {v0.s,v1.s,v2.s,v3.s}[0],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[1],[x1]
	- b 100f
	-1: // process last 3 blocks
	- ld4 {v4.s,v5.s,v6.s,v7.s}[2],[x0],#16
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_ex_enc_4blks
	- st4 {v0.s,v1.s,v2.s,v3.s}[0],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[1],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[2],[x1]
	-100:
	- ldp d10,d11,[sp,#16]
	- ldp d12,d13,[sp,#32]
	- ldp d14,d15,[sp,#48]
	- ldp x29,x30,[sp,#64]
	- ldp d8,d9,[sp],#80
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_ex_ecb_encrypt,.-vpsm4_ex_ecb_encrypt
	-.globl vpsm4_ex_cbc_encrypt
	-.type vpsm4_ex_cbc_encrypt,%function
	-.align 5
	-vpsm4_ex_cbc_encrypt:
	- AARCH64_VALID_CALL_TARGET
	- lsr x2,x2,4
	- adrp x9, .Lsbox_magic
	- add x9, x9, #:lo12:.Lsbox_magic
	- ldr q26, [x9]
	- ldr q27, [x9, 16]
	- ldr q28, [x9, 32]
	- ldr q29, [x9, 48]
	- ldr q30, [x9, 64]
	- ldr q31, [x9, 80]
	- cbz w5,.Ldec
	- ld1 {v3.4s},[x4]
	-.Lcbc_4_blocks_enc:
	- cmp w2,#4
	- b.lt 1f
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- eor v4.16b,v4.16b,v3.16b
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	- eor v5.16b,v5.16b,v4.16b
	- mov x10,x3
	- mov w11,#8
	- mov w12,v5.s[0]
	- mov w13,v5.s[1]
	- mov w14,v5.s[2]
	- mov w15,v5.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v5.s[0],w15
	- mov v5.s[1],w14
	- mov v5.s[2],w13
	- mov v5.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v6.16b,v6.16b,v5.16b
	- mov x10,x3
	- mov w11,#8
	- mov w12,v6.s[0]
	- mov w13,v6.s[1]
	- mov w14,v6.s[2]
	- mov w15,v6.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v6.s[0],w15
	- mov v6.s[1],w14
	- mov v6.s[2],w13
	- mov v6.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	- eor v7.16b,v7.16b,v6.16b
	- mov x10,x3
	- mov w11,#8
	- mov w12,v7.s[0]
	- mov w13,v7.s[1]
	- mov w14,v7.s[2]
	- mov w15,v7.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v7.s[0],w15
	- mov v7.s[1],w14
	- mov v7.s[2],w13
	- mov v7.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- orr v3.16b,v7.16b,v7.16b
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs w2,w2,#4
	- b.ne .Lcbc_4_blocks_enc
	- b 2f
	-1:
	- subs w2,w2,#1
	- b.lt 2f
	- ld1 {v4.4s},[x0],#16
	- eor v3.16b,v3.16b,v4.16b
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v3.s[0]
	- mov w13,v3.s[1]
	- mov w14,v3.s[2]
	- mov w15,v3.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v3.s[0],w15
	- mov v3.s[1],w14
	- mov v3.s[2],w13
	- mov v3.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- st1 {v3.4s},[x1],#16
	- b 1b
	-2:
	- // save back IV
	- st1 {v3.4s},[x4]
	- ret
	-
	-.Ldec:
	- // decryption mode starts
	- AARCH64_SIGN_LINK_REGISTER
	- stp d8,d9,[sp,#-80]!
	- stp d10,d11,[sp,#16]
	- stp d12,d13,[sp,#32]
	- stp d14,d15,[sp,#48]
	- stp x29,x30,[sp,#64]
	-.Lcbc_8_blocks_dec:
	- cmp w2,#8
	- b.lt 1f
	- ld4 {v4.4s,v5.4s,v6.4s,v7.4s},[x0]
	- add x10,x0,#64
	- ld4 {v8.4s,v9.4s,v10.4s,v11.4s},[x10]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- bl _vpsm4_ex_enc_8blks
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- zip1 v8.4s,v4.4s,v5.4s
	- zip2 v9.4s,v4.4s,v5.4s
	- zip1 v10.4s,v6.4s,v7.4s
	- zip2 v11.4s,v6.4s,v7.4s
	- zip1 v4.2d,v8.2d,v10.2d
	- zip2 v5.2d,v8.2d,v10.2d
	- zip1 v6.2d,v9.2d,v11.2d
	- zip2 v7.2d,v9.2d,v11.2d
	- ld1 {v15.4s},[x4]
	- ld1 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	- // note ivec1 and vtmpx[3] are reusing the same register
	- // care needs to be taken to avoid conflict
	- eor v0.16b,v0.16b,v15.16b
	- ld1 {v12.4s,v13.4s,v14.4s,v15.4s},[x0],#64
	- eor v1.16b,v1.16b,v8.16b
	- eor v2.16b,v2.16b,v9.16b
	- eor v3.16b,v3.16b,v10.16b
	- // save back IV
	- st1 {v15.4s}, [x4]
	- eor v4.16b,v4.16b,v11.16b
	- eor v5.16b,v5.16b,v12.16b
	- eor v6.16b,v6.16b,v13.16b
	- eor v7.16b,v7.16b,v14.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs w2,w2,#8
	- b.gt .Lcbc_8_blocks_dec
	- b.eq 100f
	-1:
	- ld1 {v15.4s},[x4]
	-.Lcbc_4_blocks_dec:
	- cmp w2,#4
	- b.lt 1f
	- ld4 {v4.4s,v5.4s,v6.4s,v7.4s},[x0]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_ex_enc_4blks
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- eor v0.16b,v0.16b,v15.16b
	- eor v1.16b,v1.16b,v4.16b
	- orr v15.16b,v7.16b,v7.16b
	- eor v2.16b,v2.16b,v5.16b
	- eor v3.16b,v3.16b,v6.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- subs w2,w2,#4
	- b.gt .Lcbc_4_blocks_dec
	- // save back IV
	- st1 {v7.4s}, [x4]
	- b 100f
	-1: // last block
	- subs w2,w2,#1
	- b.lt 100f
	- b.gt 1f
	- ld1 {v4.4s},[x0],#16
	- // save back IV
	- st1 {v4.4s}, [x4]
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v4.16b
	-#else
	- mov v8.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v8.s[0]
	- mov w13,v8.s[1]
	- mov w14,v8.s[2]
	- mov w15,v8.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v8.s[0],w15
	- mov v8.s[1],w14
	- mov v8.s[2],w13
	- mov v8.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	- eor v8.16b,v8.16b,v15.16b
	- st1 {v8.4s},[x1],#16
	- b 100f
	-1: // last two blocks
	- ld4 {v4.s,v5.s,v6.s,v7.s}[0],[x0]
	- add x10,x0,#16
	- ld4 {v4.s,v5.s,v6.s,v7.s}[1],[x10],#16
	- subs w2,w2,1
	- b.gt 1f
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_ex_enc_4blks
	- ld1 {v4.4s,v5.4s},[x0],#32
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- eor v0.16b,v0.16b,v15.16b
	- eor v1.16b,v1.16b,v4.16b
	- st1 {v0.4s,v1.4s},[x1],#32
	- // save back IV
	- st1 {v5.4s}, [x4]
	- b 100f
	-1: // last 3 blocks
	- ld4 {v4.s,v5.s,v6.s,v7.s}[2],[x10]
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- bl _vpsm4_ex_enc_4blks
	- ld1 {v4.4s,v5.4s,v6.4s},[x0],#48
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- eor v0.16b,v0.16b,v15.16b
	- eor v1.16b,v1.16b,v4.16b
	- eor v2.16b,v2.16b,v5.16b
	- st1 {v0.4s,v1.4s,v2.4s},[x1],#48
	- // save back IV
	- st1 {v6.4s}, [x4]
	-100:
	- ldp d10,d11,[sp,#16]
	- ldp d12,d13,[sp,#32]
	- ldp d14,d15,[sp,#48]
	- ldp x29,x30,[sp,#64]
	- ldp d8,d9,[sp],#80
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_ex_cbc_encrypt,.-vpsm4_ex_cbc_encrypt
	-.globl vpsm4_ex_ctr32_encrypt_blocks
	-.type vpsm4_ex_ctr32_encrypt_blocks,%function
	-.align 5
	-vpsm4_ex_ctr32_encrypt_blocks:
	- AARCH64_VALID_CALL_TARGET
	- ld1 {v3.4s},[x4]
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- adrp x9, .Lsbox_magic
	- add x9, x9, #:lo12:.Lsbox_magic
	- ldr q26, [x9]
	- ldr q27, [x9, 16]
	- ldr q28, [x9, 32]
	- ldr q29, [x9, 48]
	- ldr q30, [x9, 64]
	- ldr q31, [x9, 80]
	- cmp w2,#1
	- b.ne 1f
	- // fast processing for one single block without
	- // context saving overhead
	- mov x10,x3
	- mov w11,#8
	- mov w12,v3.s[0]
	- mov w13,v3.s[1]
	- mov w14,v3.s[2]
	- mov w15,v3.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v3.s[0],w15
	- mov v3.s[1],w14
	- mov v3.s[2],w13
	- mov v3.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- ld1 {v4.4s},[x0]
	- eor v4.16b,v4.16b,v3.16b
	- st1 {v4.4s},[x1]
	- ret
	-1:
	- AARCH64_SIGN_LINK_REGISTER
	- stp d8,d9,[sp,#-80]!
	- stp d10,d11,[sp,#16]
	- stp d12,d13,[sp,#32]
	- stp d14,d15,[sp,#48]
	- stp x29,x30,[sp,#64]
	- mov w12,v3.s[0]
	- mov w13,v3.s[1]
	- mov w14,v3.s[2]
	- mov w5,v3.s[3]
	-.Lctr32_4_blocks_process:
	- cmp w2,#4
	- b.lt 1f
	- dup v4.4s,w12
	- dup v5.4s,w13
	- dup v6.4s,w14
	- mov v7.s[0],w5
	- add w5,w5,#1
	- mov v7.s[1],w5
	- add w5,w5,#1
	- mov v7.s[2],w5
	- add w5,w5,#1
	- mov v7.s[3],w5
	- add w5,w5,#1
	- cmp w2,#8
	- b.ge .Lctr32_8_blocks_process
	- bl _vpsm4_ex_enc_4blks
	- ld4 {v12.4s,v13.4s,v14.4s,v15.4s},[x0],#64
	- eor v0.16b,v0.16b,v12.16b
	- eor v1.16b,v1.16b,v13.16b
	- eor v2.16b,v2.16b,v14.16b
	- eor v3.16b,v3.16b,v15.16b
	- st4 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- subs w2,w2,#4
	- b.ne .Lctr32_4_blocks_process
	- b 100f
	-.Lctr32_8_blocks_process:
	- dup v8.4s,w12
	- dup v9.4s,w13
	- dup v10.4s,w14
	- mov v11.s[0],w5
	- add w5,w5,#1
	- mov v11.s[1],w5
	- add w5,w5,#1
	- mov v11.s[2],w5
	- add w5,w5,#1
	- mov v11.s[3],w5
	- add w5,w5,#1
	- bl _vpsm4_ex_enc_8blks
	- ld4 {v12.4s,v13.4s,v14.4s,v15.4s},[x0],#64
	- ld4 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	- eor v0.16b,v0.16b,v12.16b
	- eor v1.16b,v1.16b,v13.16b
	- eor v2.16b,v2.16b,v14.16b
	- eor v3.16b,v3.16b,v15.16b
	- eor v4.16b,v4.16b,v8.16b
	- eor v5.16b,v5.16b,v9.16b
	- eor v6.16b,v6.16b,v10.16b
	- eor v7.16b,v7.16b,v11.16b
	- st4 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st4 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs w2,w2,#8
	- b.ne .Lctr32_4_blocks_process
	- b 100f
	-1: // last block processing
	- subs w2,w2,#1
	- b.lt 100f
	- b.gt 1f
	- mov v3.s[0],w12
	- mov v3.s[1],w13
	- mov v3.s[2],w14
	- mov v3.s[3],w5
	- mov x10,x3
	- mov w11,#8
	- mov w12,v3.s[0]
	- mov w13,v3.s[1]
	- mov w14,v3.s[2]
	- mov w15,v3.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v3.s[0],w15
	- mov v3.s[1],w14
	- mov v3.s[2],w13
	- mov v3.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v3.16b,v3.16b
	-#endif
	- ld1 {v4.4s},[x0]
	- eor v4.16b,v4.16b,v3.16b
	- st1 {v4.4s},[x1]
	- b 100f
	-1: // last 2 blocks processing
	- dup v4.4s,w12
	- dup v5.4s,w13
	- dup v6.4s,w14
	- mov v7.s[0],w5
	- add w5,w5,#1
	- mov v7.s[1],w5
	- subs w2,w2,#1
	- b.ne 1f
	- bl _vpsm4_ex_enc_4blks
	- ld4 {v12.s,v13.s,v14.s,v15.s}[0],[x0],#16
	- ld4 {v12.s,v13.s,v14.s,v15.s}[1],[x0],#16
	- eor v0.16b,v0.16b,v12.16b
	- eor v1.16b,v1.16b,v13.16b
	- eor v2.16b,v2.16b,v14.16b
	- eor v3.16b,v3.16b,v15.16b
	- st4 {v0.s,v1.s,v2.s,v3.s}[0],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[1],[x1],#16
	- b 100f
	-1: // last 3 blocks processing
	- add w5,w5,#1
	- mov v7.s[2],w5
	- bl _vpsm4_ex_enc_4blks
	- ld4 {v12.s,v13.s,v14.s,v15.s}[0],[x0],#16
	- ld4 {v12.s,v13.s,v14.s,v15.s}[1],[x0],#16
	- ld4 {v12.s,v13.s,v14.s,v15.s}[2],[x0],#16
	- eor v0.16b,v0.16b,v12.16b
	- eor v1.16b,v1.16b,v13.16b
	- eor v2.16b,v2.16b,v14.16b
	- eor v3.16b,v3.16b,v15.16b
	- st4 {v0.s,v1.s,v2.s,v3.s}[0],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[1],[x1],#16
	- st4 {v0.s,v1.s,v2.s,v3.s}[2],[x1],#16
	-100:
	- ldp d10,d11,[sp,#16]
	- ldp d12,d13,[sp,#32]
	- ldp d14,d15,[sp,#48]
	- ldp x29,x30,[sp,#64]
	- ldp d8,d9,[sp],#80
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_ex_ctr32_encrypt_blocks,.-vpsm4_ex_ctr32_encrypt_blocks
	-.globl vpsm4_ex_xts_encrypt_gb
	-.type vpsm4_ex_xts_encrypt_gb,%function
	-.align 5
	-vpsm4_ex_xts_encrypt_gb:
	- AARCH64_SIGN_LINK_REGISTER
	- stp x15, x16, [sp, #-0x10]!
	- stp x17, x18, [sp, #-0x10]!
	- stp x19, x20, [sp, #-0x10]!
	- stp x21, x22, [sp, #-0x10]!
	- stp x23, x24, [sp, #-0x10]!
	- stp x25, x26, [sp, #-0x10]!
	- stp x27, x28, [sp, #-0x10]!
	- stp x29, x30, [sp, #-0x10]!
	- stp d8, d9, [sp, #-0x10]!
	- stp d10, d11, [sp, #-0x10]!
	- stp d12, d13, [sp, #-0x10]!
	- stp d14, d15, [sp, #-0x10]!
	- mov x26,x3
	- mov x27,x4
	- mov w28,w6
	- ld1 {v16.4s}, [x5]
	- mov x3,x27
	- adrp x9, .Lsbox_magic
	- add x9, x9, #:lo12:.Lsbox_magic
	- ldr q26, [x9]
	- ldr q27, [x9, 16]
	- ldr q28, [x9, 32]
	- ldr q29, [x9, 48]
	- ldr q30, [x9, 64]
	- ldr q31, [x9, 80]
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v16.s[0]
	- mov w13,v16.s[1]
	- mov w14,v16.s[2]
	- mov w15,v16.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v16.s[0],w15
	- mov v16.s[1],w14
	- mov v16.s[2],w13
	- mov v16.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- mov x3,x26
	- and x29,x2,#0x0F
	- // convert length into blocks
	- lsr x2,x2,4
	- cmp x2,#1
	- b.lt .return_gb
	-
	- cmp x29,0
	- // If the encryption/decryption Length is N times of 16,
	- // the all blocks are encrypted/decrypted in .xts_encrypt_blocks_gb
	- b.eq .xts_encrypt_blocks_gb
	-
	- // If the encryption/decryption length is not N times of 16,
	- // the last two blocks are encrypted/decrypted in .last_2blks_tweak_gb or .only_2blks_tweak_gb
	- // the other blocks are encrypted/decrypted in .xts_encrypt_blocks_gb
	- subs x2,x2,#1
	- b.eq .only_2blks_tweak_gb
	-.xts_encrypt_blocks_gb:
	- rbit v16.16b,v16.16b
	-#ifdef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- mov x12,v16.d[0]
	- mov x13,v16.d[1]
	- mov w7,0x87
	- extr x9,x13,x13,#32
	- extr x15,x13,x12,#63
	- and w8,w7,w9,asr#31
	- eor x14,x8,x12,lsl#1
	- mov w7,0x87
	- extr x9,x15,x15,#32
	- extr x17,x15,x14,#63
	- and w8,w7,w9,asr#31
	- eor x16,x8,x14,lsl#1
	- mov w7,0x87
	- extr x9,x17,x17,#32
	- extr x19,x17,x16,#63
	- and w8,w7,w9,asr#31
	- eor x18,x8,x16,lsl#1
	- mov w7,0x87
	- extr x9,x19,x19,#32
	- extr x21,x19,x18,#63
	- and w8,w7,w9,asr#31
	- eor x20,x8,x18,lsl#1
	- mov w7,0x87
	- extr x9,x21,x21,#32
	- extr x23,x21,x20,#63
	- and w8,w7,w9,asr#31
	- eor x22,x8,x20,lsl#1
	- mov w7,0x87
	- extr x9,x23,x23,#32
	- extr x25,x23,x22,#63
	- and w8,w7,w9,asr#31
	- eor x24,x8,x22,lsl#1
	- mov w7,0x87
	- extr x9,x25,x25,#32
	- extr x27,x25,x24,#63
	- and w8,w7,w9,asr#31
	- eor x26,x8,x24,lsl#1
	-.Lxts_8_blocks_process_gb:
	- cmp x2,#8
	- mov v16.d[0],x12
	- mov v16.d[1],x13
	-#ifdef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- mov w7,0x87
	- extr x9,x27,x27,#32
	- extr x13,x27,x26,#63
	- and w8,w7,w9,asr#31
	- eor x12,x8,x26,lsl#1
	- mov v17.d[0],x14
	- mov v17.d[1],x15
	-#ifdef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	- mov w7,0x87
	- extr x9,x13,x13,#32
	- extr x15,x13,x12,#63
	- and w8,w7,w9,asr#31
	- eor x14,x8,x12,lsl#1
	- mov v18.d[0],x16
	- mov v18.d[1],x17
	-#ifdef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	- mov w7,0x87
	- extr x9,x15,x15,#32
	- extr x17,x15,x14,#63
	- and w8,w7,w9,asr#31
	- eor x16,x8,x14,lsl#1
	- mov v19.d[0],x18
	- mov v19.d[1],x19
	-#ifdef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	- mov w7,0x87
	- extr x9,x17,x17,#32
	- extr x19,x17,x16,#63
	- and w8,w7,w9,asr#31
	- eor x18,x8,x16,lsl#1
	- mov v20.d[0],x20
	- mov v20.d[1],x21
	-#ifdef __AARCH64EB__
	- rev32 v20.16b,v20.16b
	-#endif
	- mov w7,0x87
	- extr x9,x19,x19,#32
	- extr x21,x19,x18,#63
	- and w8,w7,w9,asr#31
	- eor x20,x8,x18,lsl#1
	- mov v21.d[0],x22
	- mov v21.d[1],x23
	-#ifdef __AARCH64EB__
	- rev32 v21.16b,v21.16b
	-#endif
	- mov w7,0x87
	- extr x9,x21,x21,#32
	- extr x23,x21,x20,#63
	- and w8,w7,w9,asr#31
	- eor x22,x8,x20,lsl#1
	- mov v22.d[0],x24
	- mov v22.d[1],x25
	-#ifdef __AARCH64EB__
	- rev32 v22.16b,v22.16b
	-#endif
	- mov w7,0x87
	- extr x9,x23,x23,#32
	- extr x25,x23,x22,#63
	- and w8,w7,w9,asr#31
	- eor x24,x8,x22,lsl#1
	- mov v23.d[0],x26
	- mov v23.d[1],x27
	-#ifdef __AARCH64EB__
	- rev32 v23.16b,v23.16b
	-#endif
	- mov w7,0x87
	- extr x9,x25,x25,#32
	- extr x27,x25,x24,#63
	- and w8,w7,w9,asr#31
	- eor x26,x8,x24,lsl#1
	- b.lt .Lxts_4_blocks_process_gb
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- rbit v16.16b,v16.16b
	- rbit v17.16b,v17.16b
	- rbit v18.16b,v18.16b
	- rbit v19.16b,v19.16b
	- eor v4.16b, v4.16b, v16.16b
	- eor v5.16b, v5.16b, v17.16b
	- eor v6.16b, v6.16b, v18.16b
	- eor v7.16b, v7.16b, v19.16b
	- ld1 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	- rbit v20.16b,v20.16b
	- rbit v21.16b,v21.16b
	- rbit v22.16b,v22.16b
	- rbit v23.16b,v23.16b
	- eor v8.16b, v8.16b, v20.16b
	- eor v9.16b, v9.16b, v21.16b
	- eor v10.16b, v10.16b, v22.16b
	- eor v11.16b, v11.16b, v23.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- zip1 v0.4s,v8.4s,v9.4s
	- zip2 v1.4s,v8.4s,v9.4s
	- zip1 v2.4s,v10.4s,v11.4s
	- zip2 v3.4s,v10.4s,v11.4s
	- zip1 v8.2d,v0.2d,v2.2d
	- zip2 v9.2d,v0.2d,v2.2d
	- zip1 v10.2d,v1.2d,v3.2d
	- zip2 v11.2d,v1.2d,v3.2d
	- bl _vpsm4_ex_enc_8blks
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- zip1 v8.4s,v4.4s,v5.4s
	- zip2 v9.4s,v4.4s,v5.4s
	- zip1 v10.4s,v6.4s,v7.4s
	- zip2 v11.4s,v6.4s,v7.4s
	- zip1 v4.2d,v8.2d,v10.2d
	- zip2 v5.2d,v8.2d,v10.2d
	- zip1 v6.2d,v9.2d,v11.2d
	- zip2 v7.2d,v9.2d,v11.2d
	- eor v0.16b, v0.16b, v16.16b
	- eor v1.16b, v1.16b, v17.16b
	- eor v2.16b, v2.16b, v18.16b
	- eor v3.16b, v3.16b, v19.16b
	- eor v4.16b, v4.16b, v20.16b
	- eor v5.16b, v5.16b, v21.16b
	- eor v6.16b, v6.16b, v22.16b
	- eor v7.16b, v7.16b, v23.16b
	-
	- // save the last tweak
	- mov v25.16b,v23.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs x2,x2,#8
	- b.gt .Lxts_8_blocks_process_gb
	- b 100f
	-.Lxts_4_blocks_process_gb:
	- cmp x2,#4
	- b.lt 1f
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- rbit v16.16b,v16.16b
	- rbit v17.16b,v17.16b
	- rbit v18.16b,v18.16b
	- rbit v19.16b,v19.16b
	- eor v4.16b, v4.16b, v16.16b
	- eor v5.16b, v5.16b, v17.16b
	- eor v6.16b, v6.16b, v18.16b
	- eor v7.16b, v7.16b, v19.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_ex_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v16.16b
	- eor v1.16b, v1.16b, v17.16b
	- eor v2.16b, v2.16b, v18.16b
	- eor v3.16b, v3.16b, v19.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- sub x2,x2,#4
	- mov v16.16b,v20.16b
	- mov v17.16b,v21.16b
	- mov v18.16b,v22.16b
	- // save the last tweak
	- mov v25.16b,v19.16b
	-1:
	- // process last block
	- cmp x2,#1
	- b.lt 100f
	- b.gt 1f
	- ld1 {v4.4s},[x0],#16
	- rbit v16.16b,v16.16b
	- eor v4.16b, v4.16b, v16.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v16.16b
	- st1 {v4.4s},[x1],#16
	- // save the last tweak
	- mov v25.16b,v16.16b
	- b 100f
	-1: // process last 2 blocks
	- cmp x2,#2
	- b.gt 1f
	- ld1 {v4.4s,v5.4s},[x0],#32
	- rbit v16.16b,v16.16b
	- rbit v17.16b,v17.16b
	- eor v4.16b, v4.16b, v16.16b
	- eor v5.16b, v5.16b, v17.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_ex_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v16.16b
	- eor v1.16b, v1.16b, v17.16b
	- st1 {v0.4s,v1.4s},[x1],#32
	- // save the last tweak
	- mov v25.16b,v17.16b
	- b 100f
	-1: // process last 3 blocks
	- ld1 {v4.4s,v5.4s,v6.4s},[x0],#48
	- rbit v16.16b,v16.16b
	- rbit v17.16b,v17.16b
	- rbit v18.16b,v18.16b
	- eor v4.16b, v4.16b, v16.16b
	- eor v5.16b, v5.16b, v17.16b
	- eor v6.16b, v6.16b, v18.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_ex_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v16.16b
	- eor v1.16b, v1.16b, v17.16b
	- eor v2.16b, v2.16b, v18.16b
	- st1 {v0.4s,v1.4s,v2.4s},[x1],#48
	- // save the last tweak
	- mov v25.16b,v18.16b
	-100:
	- cmp x29,0
	- b.eq .return_gb
	-
	-// This branch calculates the last two tweaks,
	-// while the encryption/decryption length is larger than 32
	-.last_2blks_tweak_gb:
	-#ifdef __AARCH64EB__
	- rev32 v25.16b,v25.16b
	-#endif
	- rbit v2.16b,v25.16b
	- adrp x9, .Lxts_magic
	- ldr q0, [x9, #:lo12:.Lxts_magic]
	- shl v17.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v17.16b, v17.16b, v1.16b
	- rbit v17.16b,v17.16b
	- rbit v2.16b,v17.16b
	- adrp x9, .Lxts_magic
	- ldr q0, [x9, #:lo12:.Lxts_magic]
	- shl v18.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v18.16b, v18.16b, v1.16b
	- rbit v18.16b,v18.16b
	- b .check_dec_gb
	-
	-
	-// This branch calculates the last two tweaks,
	-// while the encryption/decryption length is equal to 32, who only need two tweaks
	-.only_2blks_tweak_gb:
	- mov v17.16b,v16.16b
	-#ifdef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	- rbit v2.16b,v17.16b
	- adrp x9, .Lxts_magic
	- ldr q0, [x9, #:lo12:.Lxts_magic]
	- shl v18.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v18.16b, v18.16b, v1.16b
	- rbit v18.16b,v18.16b
	- b .check_dec_gb
	-
	-
	-// Determine whether encryption or decryption is required.
	-// The last two tweaks need to be swapped for decryption.
	-.check_dec_gb:
	- // encryption:1 decryption:0
	- cmp w28,1
	- b.eq .process_last_2blks_gb
	- mov v0.16B,v17.16b
	- mov v17.16B,v18.16b
	- mov v18.16B,v0.16b
	-
	-.process_last_2blks_gb:
	-#ifdef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifdef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	- ld1 {v4.4s},[x0],#16
	- eor v4.16b, v4.16b, v17.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v17.16b
	- st1 {v4.4s},[x1],#16
	-
	- sub x26,x1,16
	-.loop_gb:
	- subs x29,x29,1
	- ldrb w7,[x26,x29]
	- ldrb w8,[x0,x29]
	- strb w8,[x26,x29]
	- strb w7,[x1,x29]
	- b.gt .loop_gb
	- ld1 {v4.4s}, [x26]
	- eor v4.16b, v4.16b, v18.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v18.16b
	- st1 {v4.4s}, [x26]
	-.return_gb:
	- ldp d14, d15, [sp], #0x10
	- ldp d12, d13, [sp], #0x10
	- ldp d10, d11, [sp], #0x10
	- ldp d8, d9, [sp], #0x10
	- ldp x29, x30, [sp], #0x10
	- ldp x27, x28, [sp], #0x10
	- ldp x25, x26, [sp], #0x10
	- ldp x23, x24, [sp], #0x10
	- ldp x21, x22, [sp], #0x10
	- ldp x19, x20, [sp], #0x10
	- ldp x17, x18, [sp], #0x10
	- ldp x15, x16, [sp], #0x10
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_ex_xts_encrypt_gb,.-vpsm4_ex_xts_encrypt_gb
	-.globl vpsm4_ex_xts_encrypt
	-.type vpsm4_ex_xts_encrypt,%function
	-.align 5
	-vpsm4_ex_xts_encrypt:
	- AARCH64_SIGN_LINK_REGISTER
	- stp x15, x16, [sp, #-0x10]!
	- stp x17, x18, [sp, #-0x10]!
	- stp x19, x20, [sp, #-0x10]!
	- stp x21, x22, [sp, #-0x10]!
	- stp x23, x24, [sp, #-0x10]!
	- stp x25, x26, [sp, #-0x10]!
	- stp x27, x28, [sp, #-0x10]!
	- stp x29, x30, [sp, #-0x10]!
	- stp d8, d9, [sp, #-0x10]!
	- stp d10, d11, [sp, #-0x10]!
	- stp d12, d13, [sp, #-0x10]!
	- stp d14, d15, [sp, #-0x10]!
	- mov x26,x3
	- mov x27,x4
	- mov w28,w6
	- ld1 {v16.4s}, [x5]
	- mov x3,x27
	- adrp x9, .Lsbox_magic
	- add x9, x9, #:lo12:.Lsbox_magic
	- ldr q26, [x9]
	- ldr q27, [x9, 16]
	- ldr q28, [x9, 32]
	- ldr q29, [x9, 48]
	- ldr q30, [x9, 64]
	- ldr q31, [x9, 80]
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v16.s[0]
	- mov w13,v16.s[1]
	- mov w14,v16.s[2]
	- mov w15,v16.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v16.s[0],w15
	- mov v16.s[1],w14
	- mov v16.s[2],w13
	- mov v16.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- mov x3,x26
	- and x29,x2,#0x0F
	- // convert length into blocks
	- lsr x2,x2,4
	- cmp x2,#1
	- b.lt .return
	-
	- cmp x29,0
	- // If the encryption/decryption Length is N times of 16,
	- // the all blocks are encrypted/decrypted in .xts_encrypt_blocks
	- b.eq .xts_encrypt_blocks
	-
	- // If the encryption/decryption length is not N times of 16,
	- // the last two blocks are encrypted/decrypted in .last_2blks_tweak or .only_2blks_tweak
	- // the other blocks are encrypted/decrypted in .xts_encrypt_blocks
	- subs x2,x2,#1
	- b.eq .only_2blks_tweak
	-.xts_encrypt_blocks:
	-#ifdef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- mov x12,v16.d[0]
	- mov x13,v16.d[1]
	- mov w7,0x87
	- extr x9,x13,x13,#32
	- extr x15,x13,x12,#63
	- and w8,w7,w9,asr#31
	- eor x14,x8,x12,lsl#1
	- mov w7,0x87
	- extr x9,x15,x15,#32
	- extr x17,x15,x14,#63
	- and w8,w7,w9,asr#31
	- eor x16,x8,x14,lsl#1
	- mov w7,0x87
	- extr x9,x17,x17,#32
	- extr x19,x17,x16,#63
	- and w8,w7,w9,asr#31
	- eor x18,x8,x16,lsl#1
	- mov w7,0x87
	- extr x9,x19,x19,#32
	- extr x21,x19,x18,#63
	- and w8,w7,w9,asr#31
	- eor x20,x8,x18,lsl#1
	- mov w7,0x87
	- extr x9,x21,x21,#32
	- extr x23,x21,x20,#63
	- and w8,w7,w9,asr#31
	- eor x22,x8,x20,lsl#1
	- mov w7,0x87
	- extr x9,x23,x23,#32
	- extr x25,x23,x22,#63
	- and w8,w7,w9,asr#31
	- eor x24,x8,x22,lsl#1
	- mov w7,0x87
	- extr x9,x25,x25,#32
	- extr x27,x25,x24,#63
	- and w8,w7,w9,asr#31
	- eor x26,x8,x24,lsl#1
	-.Lxts_8_blocks_process:
	- cmp x2,#8
	- mov v16.d[0],x12
	- mov v16.d[1],x13
	-#ifdef __AARCH64EB__
	- rev32 v16.16b,v16.16b
	-#endif
	- mov w7,0x87
	- extr x9,x27,x27,#32
	- extr x13,x27,x26,#63
	- and w8,w7,w9,asr#31
	- eor x12,x8,x26,lsl#1
	- mov v17.d[0],x14
	- mov v17.d[1],x15
	-#ifdef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	- mov w7,0x87
	- extr x9,x13,x13,#32
	- extr x15,x13,x12,#63
	- and w8,w7,w9,asr#31
	- eor x14,x8,x12,lsl#1
	- mov v18.d[0],x16
	- mov v18.d[1],x17
	-#ifdef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	- mov w7,0x87
	- extr x9,x15,x15,#32
	- extr x17,x15,x14,#63
	- and w8,w7,w9,asr#31
	- eor x16,x8,x14,lsl#1
	- mov v19.d[0],x18
	- mov v19.d[1],x19
	-#ifdef __AARCH64EB__
	- rev32 v19.16b,v19.16b
	-#endif
	- mov w7,0x87
	- extr x9,x17,x17,#32
	- extr x19,x17,x16,#63
	- and w8,w7,w9,asr#31
	- eor x18,x8,x16,lsl#1
	- mov v20.d[0],x20
	- mov v20.d[1],x21
	-#ifdef __AARCH64EB__
	- rev32 v20.16b,v20.16b
	-#endif
	- mov w7,0x87
	- extr x9,x19,x19,#32
	- extr x21,x19,x18,#63
	- and w8,w7,w9,asr#31
	- eor x20,x8,x18,lsl#1
	- mov v21.d[0],x22
	- mov v21.d[1],x23
	-#ifdef __AARCH64EB__
	- rev32 v21.16b,v21.16b
	-#endif
	- mov w7,0x87
	- extr x9,x21,x21,#32
	- extr x23,x21,x20,#63
	- and w8,w7,w9,asr#31
	- eor x22,x8,x20,lsl#1
	- mov v22.d[0],x24
	- mov v22.d[1],x25
	-#ifdef __AARCH64EB__
	- rev32 v22.16b,v22.16b
	-#endif
	- mov w7,0x87
	- extr x9,x23,x23,#32
	- extr x25,x23,x22,#63
	- and w8,w7,w9,asr#31
	- eor x24,x8,x22,lsl#1
	- mov v23.d[0],x26
	- mov v23.d[1],x27
	-#ifdef __AARCH64EB__
	- rev32 v23.16b,v23.16b
	-#endif
	- mov w7,0x87
	- extr x9,x25,x25,#32
	- extr x27,x25,x24,#63
	- and w8,w7,w9,asr#31
	- eor x26,x8,x24,lsl#1
	- b.lt .Lxts_4_blocks_process
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- eor v4.16b, v4.16b, v16.16b
	- eor v5.16b, v5.16b, v17.16b
	- eor v6.16b, v6.16b, v18.16b
	- eor v7.16b, v7.16b, v19.16b
	- ld1 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
	- eor v8.16b, v8.16b, v20.16b
	- eor v9.16b, v9.16b, v21.16b
	- eor v10.16b, v10.16b, v22.16b
	- eor v11.16b, v11.16b, v23.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v8.16b,v8.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v9.16b,v9.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v10.16b,v10.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v11.16b,v11.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- zip1 v0.4s,v8.4s,v9.4s
	- zip2 v1.4s,v8.4s,v9.4s
	- zip1 v2.4s,v10.4s,v11.4s
	- zip2 v3.4s,v10.4s,v11.4s
	- zip1 v8.2d,v0.2d,v2.2d
	- zip2 v9.2d,v0.2d,v2.2d
	- zip1 v10.2d,v1.2d,v3.2d
	- zip2 v11.2d,v1.2d,v3.2d
	- bl _vpsm4_ex_enc_8blks
	- zip1 v8.4s,v0.4s,v1.4s
	- zip2 v9.4s,v0.4s,v1.4s
	- zip1 v10.4s,v2.4s,v3.4s
	- zip2 v11.4s,v2.4s,v3.4s
	- zip1 v0.2d,v8.2d,v10.2d
	- zip2 v1.2d,v8.2d,v10.2d
	- zip1 v2.2d,v9.2d,v11.2d
	- zip2 v3.2d,v9.2d,v11.2d
	- zip1 v8.4s,v4.4s,v5.4s
	- zip2 v9.4s,v4.4s,v5.4s
	- zip1 v10.4s,v6.4s,v7.4s
	- zip2 v11.4s,v6.4s,v7.4s
	- zip1 v4.2d,v8.2d,v10.2d
	- zip2 v5.2d,v8.2d,v10.2d
	- zip1 v6.2d,v9.2d,v11.2d
	- zip2 v7.2d,v9.2d,v11.2d
	- eor v0.16b, v0.16b, v16.16b
	- eor v1.16b, v1.16b, v17.16b
	- eor v2.16b, v2.16b, v18.16b
	- eor v3.16b, v3.16b, v19.16b
	- eor v4.16b, v4.16b, v20.16b
	- eor v5.16b, v5.16b, v21.16b
	- eor v6.16b, v6.16b, v22.16b
	- eor v7.16b, v7.16b, v23.16b
	-
	- // save the last tweak
	- mov v25.16b,v23.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- st1 {v4.4s,v5.4s,v6.4s,v7.4s},[x1],#64
	- subs x2,x2,#8
	- b.gt .Lxts_8_blocks_process
	- b 100f
	-.Lxts_4_blocks_process:
	- cmp x2,#4
	- b.lt 1f
	- ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x0],#64
	- eor v4.16b, v4.16b, v16.16b
	- eor v5.16b, v5.16b, v17.16b
	- eor v6.16b, v6.16b, v18.16b
	- eor v7.16b, v7.16b, v19.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v7.16b,v7.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_ex_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v16.16b
	- eor v1.16b, v1.16b, v17.16b
	- eor v2.16b, v2.16b, v18.16b
	- eor v3.16b, v3.16b, v19.16b
	- st1 {v0.4s,v1.4s,v2.4s,v3.4s},[x1],#64
	- sub x2,x2,#4
	- mov v16.16b,v20.16b
	- mov v17.16b,v21.16b
	- mov v18.16b,v22.16b
	- // save the last tweak
	- mov v25.16b,v19.16b
	-1:
	- // process last block
	- cmp x2,#1
	- b.lt 100f
	- b.gt 1f
	- ld1 {v4.4s},[x0],#16
	- eor v4.16b, v4.16b, v16.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v16.16b
	- st1 {v4.4s},[x1],#16
	- // save the last tweak
	- mov v25.16b,v16.16b
	- b 100f
	-1: // process last 2 blocks
	- cmp x2,#2
	- b.gt 1f
	- ld1 {v4.4s,v5.4s},[x0],#32
	- eor v4.16b, v4.16b, v16.16b
	- eor v5.16b, v5.16b, v17.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_ex_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v16.16b
	- eor v1.16b, v1.16b, v17.16b
	- st1 {v0.4s,v1.4s},[x1],#32
	- // save the last tweak
	- mov v25.16b,v17.16b
	- b 100f
	-1: // process last 3 blocks
	- ld1 {v4.4s,v5.4s,v6.4s},[x0],#48
	- eor v4.16b, v4.16b, v16.16b
	- eor v5.16b, v5.16b, v17.16b
	- eor v6.16b, v6.16b, v18.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v5.16b,v5.16b
	-#endif
	-#ifndef __AARCH64EB__
	- rev32 v6.16b,v6.16b
	-#endif
	- zip1 v0.4s,v4.4s,v5.4s
	- zip2 v1.4s,v4.4s,v5.4s
	- zip1 v2.4s,v6.4s,v7.4s
	- zip2 v3.4s,v6.4s,v7.4s
	- zip1 v4.2d,v0.2d,v2.2d
	- zip2 v5.2d,v0.2d,v2.2d
	- zip1 v6.2d,v1.2d,v3.2d
	- zip2 v7.2d,v1.2d,v3.2d
	- bl _vpsm4_ex_enc_4blks
	- zip1 v4.4s,v0.4s,v1.4s
	- zip2 v5.4s,v0.4s,v1.4s
	- zip1 v6.4s,v2.4s,v3.4s
	- zip2 v7.4s,v2.4s,v3.4s
	- zip1 v0.2d,v4.2d,v6.2d
	- zip2 v1.2d,v4.2d,v6.2d
	- zip1 v2.2d,v5.2d,v7.2d
	- zip2 v3.2d,v5.2d,v7.2d
	- eor v0.16b, v0.16b, v16.16b
	- eor v1.16b, v1.16b, v17.16b
	- eor v2.16b, v2.16b, v18.16b
	- st1 {v0.4s,v1.4s,v2.4s},[x1],#48
	- // save the last tweak
	- mov v25.16b,v18.16b
	-100:
	- cmp x29,0
	- b.eq .return
	-
	-// This branch calculates the last two tweaks,
	-// while the encryption/decryption length is larger than 32
	-.last_2blks_tweak:
	-#ifdef __AARCH64EB__
	- rev32 v25.16b,v25.16b
	-#endif
	- mov v2.16b,v25.16b
	- adrp x9, .Lxts_magic
	- ldr q0, [x9, #:lo12:.Lxts_magic]
	- shl v17.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v17.16b, v17.16b, v1.16b
	- mov v2.16b,v17.16b
	- adrp x9, .Lxts_magic
	- ldr q0, [x9, #:lo12:.Lxts_magic]
	- shl v18.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v18.16b, v18.16b, v1.16b
	- b .check_dec
	-
	-
	-// This branch calculates the last two tweaks,
	-// while the encryption/decryption length is equal to 32, who only need two tweaks
	-.only_2blks_tweak:
	- mov v17.16b,v16.16b
	-#ifdef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	- mov v2.16b,v17.16b
	- adrp x9, .Lxts_magic
	- ldr q0, [x9, #:lo12:.Lxts_magic]
	- shl v18.16b, v2.16b, #1
	- ext v1.16b, v2.16b, v2.16b,#15
	- ushr v1.16b, v1.16b, #7
	- mul v1.16b, v1.16b, v0.16b
	- eor v18.16b, v18.16b, v1.16b
	- b .check_dec
	-
	-
	-// Determine whether encryption or decryption is required.
	-// The last two tweaks need to be swapped for decryption.
	-.check_dec:
	- // encryption:1 decryption:0
	- cmp w28,1
	- b.eq .process_last_2blks
	- mov v0.16B,v17.16b
	- mov v17.16B,v18.16b
	- mov v18.16B,v0.16b
	-
	-.process_last_2blks:
	-#ifdef __AARCH64EB__
	- rev32 v17.16b,v17.16b
	-#endif
	-#ifdef __AARCH64EB__
	- rev32 v18.16b,v18.16b
	-#endif
	- ld1 {v4.4s},[x0],#16
	- eor v4.16b, v4.16b, v17.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v17.16b
	- st1 {v4.4s},[x1],#16
	-
	- sub x26,x1,16
	-.loop:
	- subs x29,x29,1
	- ldrb w7,[x26,x29]
	- ldrb w8,[x0,x29]
	- strb w8,[x26,x29]
	- strb w7,[x1,x29]
	- b.gt .loop
	- ld1 {v4.4s}, [x26]
	- eor v4.16b, v4.16b, v18.16b
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- mov x10,x3
	- mov w11,#8
	- mov w12,v4.s[0]
	- mov w13,v4.s[1]
	- mov w14,v4.s[2]
	- mov w15,v4.s[3]
	-10:
	- ldp w7,w8,[x10],8
	- // B0 ^= SBOX(B1 ^ B2 ^ B3 ^ RK0)
	- eor w6,w14,w15
	- eor w9,w7,w13
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w12,w12,w6
	- // B1 ^= SBOX(B0 ^ B2 ^ B3 ^ RK1)
	- eor w6,w14,w15
	- eor w9,w12,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- ldp w7,w8,[x10],8
	- eor w13,w13,w6
	- // B2 ^= SBOX(B0 ^ B1 ^ B3 ^ RK2)
	- eor w6,w12,w13
	- eor w9,w7,w15
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w14,w14,w6
	- // B3 ^= SBOX(B0 ^ B1 ^ B2 ^ RK3)
	- eor w6,w12,w13
	- eor w9,w14,w8
	- eor w6,w6,w9
	- mov v3.s[0],w6
	- // optimize sbox using AESE instruction
	- tbl v0.16b, {v3.16b}, v26.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v28.16b}, v0.16b
	- tbl v2.16b, {v27.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	- eor v1.16b, v1.16b, v1.16b
	- aese v0.16b,v1.16b
	- ushr v2.16b, v0.16b, 4
	- and v0.16b, v0.16b, v31.16b
	- tbl v0.16b, {v30.16b}, v0.16b
	- tbl v2.16b, {v29.16b}, v2.16b
	- eor v0.16b, v0.16b, v2.16b
	-
	- mov w7,v0.s[0]
	- eor w6,w7,w7,ror #32-2
	- eor w6,w6,w7,ror #32-10
	- eor w6,w6,w7,ror #32-18
	- eor w6,w6,w7,ror #32-24
	- eor w15,w15,w6
	- subs w11,w11,#1
	- b.ne 10b
	- mov v4.s[0],w15
	- mov v4.s[1],w14
	- mov v4.s[2],w13
	- mov v4.s[3],w12
	-#ifndef __AARCH64EB__
	- rev32 v4.16b,v4.16b
	-#endif
	- eor v4.16b, v4.16b, v18.16b
	- st1 {v4.4s}, [x26]
	-.return:
	- ldp d14, d15, [sp], #0x10
	- ldp d12, d13, [sp], #0x10
	- ldp d10, d11, [sp], #0x10
	- ldp d8, d9, [sp], #0x10
	- ldp x29, x30, [sp], #0x10
	- ldp x27, x28, [sp], #0x10
	- ldp x25, x26, [sp], #0x10
	- ldp x23, x24, [sp], #0x10
	- ldp x21, x22, [sp], #0x10
	- ldp x19, x20, [sp], #0x10
	- ldp x17, x18, [sp], #0x10
	- ldp x15, x16, [sp], #0x10
	- AARCH64_VALIDATE_LINK_REGISTER
	- ret
	-.size vpsm4_ex_xts_encrypt,.-vpsm4_ex_xts_encrypt
	diff --git a/sys/crypto/openssl/i386/cast-586.S b/sys/crypto/openssl/i386/cast-586.S
	deleted file mode 100644
	--- a/sys/crypto/openssl/i386/cast-586.S
	+++ /dev/null
	@@ -1,2002 +0,0 @@
	-/* Do not modify. This file is auto-generated from cast-586.pl. */
	-#ifdef PIC
	-.text
	-.globl CAST_encrypt
	-.type CAST_encrypt,@function
	-.align 16
	-CAST_encrypt:
	-.L_CAST_encrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %ebx
	- movl 12(%esp),%ebx
	- movl 16(%esp),%ebp
	- pushl %esi
	- pushl %edi
	-
	- movl (%ebx),%edi
	- movl 4(%ebx),%esi
	-
	- movl 128(%ebp),%eax
	- pushl %eax
	- xorl %eax,%eax
	-
	- movl (%ebp),%edx
	- movl 4(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 8(%ebp),%edx
	- movl 12(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 16(%ebp),%edx
	- movl 20(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 24(%ebp),%edx
	- movl 28(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 32(%ebp),%edx
	- movl 36(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 40(%ebp),%edx
	- movl 44(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 48(%ebp),%edx
	- movl 52(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 56(%ebp),%edx
	- movl 60(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 64(%ebp),%edx
	- movl 68(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 72(%ebp),%edx
	- movl 76(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 80(%ebp),%edx
	- movl 84(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 88(%ebp),%edx
	- movl 92(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- popl %edx
	- orl %edx,%edx
	- jnz .L000cast_enc_done
	-
	- movl 96(%ebp),%edx
	- movl 100(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 104(%ebp),%edx
	- movl 108(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 112(%ebp),%edx
	- movl 116(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 120(%ebp),%edx
	- movl 124(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-.L000cast_enc_done:
	- nop
	- movl 20(%esp),%eax
	- movl %edi,4(%eax)
	- movl %esi,(%eax)
	- popl %edi
	- popl %esi
	- popl %ebx
	- popl %ebp
	- ret
	-.size CAST_encrypt,.-.L_CAST_encrypt_begin
	-.globl CAST_decrypt
	-.type CAST_decrypt,@function
	-.align 16
	-CAST_decrypt:
	-.L_CAST_decrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %ebx
	- movl 12(%esp),%ebx
	- movl 16(%esp),%ebp
	- pushl %esi
	- pushl %edi
	-
	- movl (%ebx),%edi
	- movl 4(%ebx),%esi
	-
	- movl 128(%ebp),%eax
	- orl %eax,%eax
	- jnz .L001cast_dec_skip
	- xorl %eax,%eax
	-
	- movl 120(%ebp),%edx
	- movl 124(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 112(%ebp),%edx
	- movl 116(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 104(%ebp),%edx
	- movl 108(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 96(%ebp),%edx
	- movl 100(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-.L001cast_dec_skip:
	-
	- movl 88(%ebp),%edx
	- movl 92(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 80(%ebp),%edx
	- movl 84(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 72(%ebp),%edx
	- movl 76(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 64(%ebp),%edx
	- movl 68(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 56(%ebp),%edx
	- movl 60(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 48(%ebp),%edx
	- movl 52(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 40(%ebp),%edx
	- movl 44(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 32(%ebp),%edx
	- movl 36(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 24(%ebp),%edx
	- movl 28(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 16(%ebp),%edx
	- movl 20(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 8(%ebp),%edx
	- movl 12(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl (%ebp),%edx
	- movl 4(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	- nop
	- movl 20(%esp),%eax
	- movl %edi,4(%eax)
	- movl %esi,(%eax)
	- popl %edi
	- popl %esi
	- popl %ebx
	- popl %ebp
	- ret
	-.size CAST_decrypt,.-.L_CAST_decrypt_begin
	-.globl CAST_cbc_encrypt
	-.type CAST_cbc_encrypt,@function
	-.align 16
	-CAST_cbc_encrypt:
	-.L_CAST_cbc_encrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %ebx
	- pushl %esi
	- pushl %edi
	- movl 28(%esp),%ebp
	-
	- movl 36(%esp),%ebx
	- movl (%ebx),%esi
	- movl 4(%ebx),%edi
	- pushl %edi
	- pushl %esi
	- pushl %edi
	- pushl %esi
	- movl %esp,%ebx
	- movl 36(%esp),%esi
	- movl 40(%esp),%edi
	-
	- movl 56(%esp),%ecx
	-
	- movl 48(%esp),%eax
	- pushl %eax
	- pushl %ebx
	- cmpl $0,%ecx
	- jz .L002decrypt
	- andl $4294967288,%ebp
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- jz .L003encrypt_finish
	-.L004encrypt_loop:
	- movl (%esi),%ecx
	- movl 4(%esi),%edx
	- xorl %ecx,%eax
	- xorl %edx,%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_CAST_encrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,(%edi)
	- movl %ebx,4(%edi)
	- addl $8,%esi
	- addl $8,%edi
	- subl $8,%ebp
	- jnz .L004encrypt_loop
	-.L003encrypt_finish:
	- movl 52(%esp),%ebp
	- andl $7,%ebp
	- jz .L005finish
	- call .L006PIC_point
	-.L006PIC_point:
	- popl %edx
	- leal .L007cbc_enc_jmp_table-.L006PIC_point(%edx),%ecx
	- movl (%ecx,%ebp,4),%ebp
	- addl %edx,%ebp
	- xorl %ecx,%ecx
	- xorl %edx,%edx
	- jmp *%ebp
	-.L008ej7:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 6(%esi),%dh
	- shll $8,%edx
	-.L009ej6:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 5(%esi),%dh
	-.L010ej5:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 4(%esi),%dl
	-.L011ej4:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movl (%esi),%ecx
	- jmp .L012ejend
	-.L013ej3:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 2(%esi),%ch
	- shll $8,%ecx
	-.L014ej2:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 1(%esi),%ch
	-.L015ej1:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb (%esi),%cl
	-.L012ejend:
	- xorl %ecx,%eax
	- xorl %edx,%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_CAST_encrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,(%edi)
	- movl %ebx,4(%edi)
	- jmp .L005finish
	-.L002decrypt:
	- andl $4294967288,%ebp
	- movl 16(%esp),%eax
	- movl 20(%esp),%ebx
	- jz .L016decrypt_finish
	-.L017decrypt_loop:
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_CAST_decrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- bswap %eax
	- bswap %ebx
	- movl 16(%esp),%ecx
	- movl 20(%esp),%edx
	- xorl %eax,%ecx
	- xorl %ebx,%edx
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- movl %ecx,(%edi)
	- movl %edx,4(%edi)
	- movl %eax,16(%esp)
	- movl %ebx,20(%esp)
	- addl $8,%esi
	- addl $8,%edi
	- subl $8,%ebp
	- jnz .L017decrypt_loop
	-.L016decrypt_finish:
	- movl 52(%esp),%ebp
	- andl $7,%ebp
	- jz .L005finish
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_CAST_decrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- bswap %eax
	- bswap %ebx
	- movl 16(%esp),%ecx
	- movl 20(%esp),%edx
	- xorl %eax,%ecx
	- xorl %ebx,%edx
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	-.L018dj7:
	- rorl $16,%edx
	- movb %dl,6(%edi)
	- shrl $16,%edx
	-.L019dj6:
	- movb %dh,5(%edi)
	-.L020dj5:
	- movb %dl,4(%edi)
	-.L021dj4:
	- movl %ecx,(%edi)
	- jmp .L022djend
	-.L023dj3:
	- rorl $16,%ecx
	- movb %cl,2(%edi)
	- shll $16,%ecx
	-.L024dj2:
	- movb %ch,1(%esi)
	-.L025dj1:
	- movb %cl,(%esi)
	-.L022djend:
	- jmp .L005finish
	-.L005finish:
	- movl 60(%esp),%ecx
	- addl $24,%esp
	- movl %eax,(%ecx)
	- movl %ebx,4(%ecx)
	- popl %edi
	- popl %esi
	- popl %ebx
	- popl %ebp
	- ret
	-.align 64
	-.L007cbc_enc_jmp_table:
	-.long 0
	-.long .L015ej1-.L006PIC_point
	-.long .L014ej2-.L006PIC_point
	-.long .L013ej3-.L006PIC_point
	-.long .L011ej4-.L006PIC_point
	-.long .L010ej5-.L006PIC_point
	-.long .L009ej6-.L006PIC_point
	-.long .L008ej7-.L006PIC_point
	-.align 64
	-.size CAST_cbc_encrypt,.-.L_CAST_cbc_encrypt_begin
	-
	- .section ".note.gnu.property", "a"
	- .p2align 2
	- .long 1f - 0f
	- .long 4f - 1f
	- .long 5
	-0:
	- .asciz "GNU"
	-1:
	- .p2align 2
	- .long 0xc0000002
	- .long 3f - 2f
	-2:
	- .long 3
	-3:
	- .p2align 2
	-4:
	-#else
	-.text
	-.globl CAST_encrypt
	-.type CAST_encrypt,@function
	-.align 16
	-CAST_encrypt:
	-.L_CAST_encrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %ebx
	- movl 12(%esp),%ebx
	- movl 16(%esp),%ebp
	- pushl %esi
	- pushl %edi
	-
	- movl (%ebx),%edi
	- movl 4(%ebx),%esi
	-
	- movl 128(%ebp),%eax
	- pushl %eax
	- xorl %eax,%eax
	-
	- movl (%ebp),%edx
	- movl 4(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 8(%ebp),%edx
	- movl 12(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 16(%ebp),%edx
	- movl 20(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 24(%ebp),%edx
	- movl 28(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 32(%ebp),%edx
	- movl 36(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 40(%ebp),%edx
	- movl 44(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 48(%ebp),%edx
	- movl 52(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 56(%ebp),%edx
	- movl 60(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 64(%ebp),%edx
	- movl 68(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 72(%ebp),%edx
	- movl 76(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 80(%ebp),%edx
	- movl 84(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 88(%ebp),%edx
	- movl 92(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- popl %edx
	- orl %edx,%edx
	- jnz .L000cast_enc_done
	-
	- movl 96(%ebp),%edx
	- movl 100(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 104(%ebp),%edx
	- movl 108(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 112(%ebp),%edx
	- movl 116(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 120(%ebp),%edx
	- movl 124(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-.L000cast_enc_done:
	- nop
	- movl 20(%esp),%eax
	- movl %edi,4(%eax)
	- movl %esi,(%eax)
	- popl %edi
	- popl %esi
	- popl %ebx
	- popl %ebp
	- ret
	-.size CAST_encrypt,.-.L_CAST_encrypt_begin
	-.globl CAST_decrypt
	-.type CAST_decrypt,@function
	-.align 16
	-CAST_decrypt:
	-.L_CAST_decrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %ebx
	- movl 12(%esp),%ebx
	- movl 16(%esp),%ebp
	- pushl %esi
	- pushl %edi
	-
	- movl (%ebx),%edi
	- movl 4(%ebx),%esi
	-
	- movl 128(%ebp),%eax
	- orl %eax,%eax
	- jnz .L001cast_dec_skip
	- xorl %eax,%eax
	-
	- movl 120(%ebp),%edx
	- movl 124(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 112(%ebp),%edx
	- movl 116(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 104(%ebp),%edx
	- movl 108(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 96(%ebp),%edx
	- movl 100(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-.L001cast_dec_skip:
	-
	- movl 88(%ebp),%edx
	- movl 92(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 80(%ebp),%edx
	- movl 84(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 72(%ebp),%edx
	- movl 76(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 64(%ebp),%edx
	- movl 68(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 56(%ebp),%edx
	- movl 60(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 48(%ebp),%edx
	- movl 52(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 40(%ebp),%edx
	- movl 44(%ebp),%ecx
	- subl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 32(%ebp),%edx
	- movl 36(%ebp),%ecx
	- xorl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 24(%ebp),%edx
	- movl 28(%ebp),%ecx
	- addl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl 16(%ebp),%edx
	- movl 20(%ebp),%ecx
	- subl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- subl %ebx,%ecx
	- xorl %ecx,%esi
	-
	- movl 8(%ebp),%edx
	- movl 12(%ebp),%ecx
	- xorl %esi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- addl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- xorl %ebx,%ecx
	- xorl %ecx,%edi
	-
	- movl (%ebp),%edx
	- movl 4(%ebp),%ecx
	- addl %edi,%edx
	- roll %cl,%edx
	- xorl %ecx,%ecx
	- movl $255,%ebx
	- movb %dh,%cl
	- andl %edx,%ebx
	- shrl $16,%edx
	- xorl %eax,%eax
	- movb %dh,%al
	- andl $255,%edx
	- movl CAST_S_table0(,%ecx,4),%ecx
	- movl CAST_S_table1(,%ebx,4),%ebx
	- xorl %ebx,%ecx
	- movl CAST_S_table2(,%eax,4),%ebx
	- subl %ebx,%ecx
	- movl CAST_S_table3(,%edx,4),%ebx
	- addl %ebx,%ecx
	- xorl %ecx,%esi
	- nop
	- movl 20(%esp),%eax
	- movl %edi,4(%eax)
	- movl %esi,(%eax)
	- popl %edi
	- popl %esi
	- popl %ebx
	- popl %ebp
	- ret
	-.size CAST_decrypt,.-.L_CAST_decrypt_begin
	-.globl CAST_cbc_encrypt
	-.type CAST_cbc_encrypt,@function
	-.align 16
	-CAST_cbc_encrypt:
	-.L_CAST_cbc_encrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %ebx
	- pushl %esi
	- pushl %edi
	- movl 28(%esp),%ebp
	-
	- movl 36(%esp),%ebx
	- movl (%ebx),%esi
	- movl 4(%ebx),%edi
	- pushl %edi
	- pushl %esi
	- pushl %edi
	- pushl %esi
	- movl %esp,%ebx
	- movl 36(%esp),%esi
	- movl 40(%esp),%edi
	-
	- movl 56(%esp),%ecx
	-
	- movl 48(%esp),%eax
	- pushl %eax
	- pushl %ebx
	- cmpl $0,%ecx
	- jz .L002decrypt
	- andl $4294967288,%ebp
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- jz .L003encrypt_finish
	-.L004encrypt_loop:
	- movl (%esi),%ecx
	- movl 4(%esi),%edx
	- xorl %ecx,%eax
	- xorl %edx,%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_CAST_encrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,(%edi)
	- movl %ebx,4(%edi)
	- addl $8,%esi
	- addl $8,%edi
	- subl $8,%ebp
	- jnz .L004encrypt_loop
	-.L003encrypt_finish:
	- movl 52(%esp),%ebp
	- andl $7,%ebp
	- jz .L005finish
	- call .L006PIC_point
	-.L006PIC_point:
	- popl %edx
	- leal .L007cbc_enc_jmp_table-.L006PIC_point(%edx),%ecx
	- movl (%ecx,%ebp,4),%ebp
	- addl %edx,%ebp
	- xorl %ecx,%ecx
	- xorl %edx,%edx
	- jmp *%ebp
	-.L008ej7:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 6(%esi),%dh
	- shll $8,%edx
	-.L009ej6:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 5(%esi),%dh
	-.L010ej5:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 4(%esi),%dl
	-.L011ej4:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movl (%esi),%ecx
	- jmp .L012ejend
	-.L013ej3:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 2(%esi),%ch
	- shll $8,%ecx
	-.L014ej2:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 1(%esi),%ch
	-.L015ej1:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb (%esi),%cl
	-.L012ejend:
	- xorl %ecx,%eax
	- xorl %edx,%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_CAST_encrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,(%edi)
	- movl %ebx,4(%edi)
	- jmp .L005finish
	-.L002decrypt:
	- andl $4294967288,%ebp
	- movl 16(%esp),%eax
	- movl 20(%esp),%ebx
	- jz .L016decrypt_finish
	-.L017decrypt_loop:
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_CAST_decrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- bswap %eax
	- bswap %ebx
	- movl 16(%esp),%ecx
	- movl 20(%esp),%edx
	- xorl %eax,%ecx
	- xorl %ebx,%edx
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- movl %ecx,(%edi)
	- movl %edx,4(%edi)
	- movl %eax,16(%esp)
	- movl %ebx,20(%esp)
	- addl $8,%esi
	- addl $8,%edi
	- subl $8,%ebp
	- jnz .L017decrypt_loop
	-.L016decrypt_finish:
	- movl 52(%esp),%ebp
	- andl $7,%ebp
	- jz .L005finish
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- bswap %eax
	- bswap %ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_CAST_decrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- bswap %eax
	- bswap %ebx
	- movl 16(%esp),%ecx
	- movl 20(%esp),%edx
	- xorl %eax,%ecx
	- xorl %ebx,%edx
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	-.L018dj7:
	- rorl $16,%edx
	- movb %dl,6(%edi)
	- shrl $16,%edx
	-.L019dj6:
	- movb %dh,5(%edi)
	-.L020dj5:
	- movb %dl,4(%edi)
	-.L021dj4:
	- movl %ecx,(%edi)
	- jmp .L022djend
	-.L023dj3:
	- rorl $16,%ecx
	- movb %cl,2(%edi)
	- shll $16,%ecx
	-.L024dj2:
	- movb %ch,1(%esi)
	-.L025dj1:
	- movb %cl,(%esi)
	-.L022djend:
	- jmp .L005finish
	-.L005finish:
	- movl 60(%esp),%ecx
	- addl $24,%esp
	- movl %eax,(%ecx)
	- movl %ebx,4(%ecx)
	- popl %edi
	- popl %esi
	- popl %ebx
	- popl %ebp
	- ret
	-.align 64
	-.L007cbc_enc_jmp_table:
	-.long 0
	-.long .L015ej1-.L006PIC_point
	-.long .L014ej2-.L006PIC_point
	-.long .L013ej3-.L006PIC_point
	-.long .L011ej4-.L006PIC_point
	-.long .L010ej5-.L006PIC_point
	-.long .L009ej6-.L006PIC_point
	-.long .L008ej7-.L006PIC_point
	-.align 64
	-.size CAST_cbc_encrypt,.-.L_CAST_cbc_encrypt_begin
	-
	- .section ".note.gnu.property", "a"
	- .p2align 2
	- .long 1f - 0f
	- .long 4f - 1f
	- .long 5
	-0:
	- .asciz "GNU"
	-1:
	- .p2align 2
	- .long 0xc0000002
	- .long 3f - 2f
	-2:
	- .long 3
	-3:
	- .p2align 2
	-4:
	-#endif
	diff --git a/sys/crypto/openssl/i386/rc5-586.S b/sys/crypto/openssl/i386/rc5-586.S
	deleted file mode 100644
	--- a/sys/crypto/openssl/i386/rc5-586.S
	+++ /dev/null
	@@ -1,1264 +0,0 @@
	-/* Do not modify. This file is auto-generated from rc5-586.pl. */
	-#ifdef PIC
	-.text
	-.globl RC5_32_encrypt
	-.type RC5_32_encrypt,@function
	-.align 16
	-RC5_32_encrypt:
	-.L_RC5_32_encrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %esi
	- pushl %edi
	- movl 16(%esp),%edx
	- movl 20(%esp),%ebp
	-
	- movl (%edx),%edi
	- movl 4(%edx),%esi
	- pushl %ebx
	- movl (%ebp),%ebx
	- addl 4(%ebp),%edi
	- addl 8(%ebp),%esi
	- xorl %esi,%edi
	- movl 12(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 16(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 20(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 24(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 28(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 32(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 36(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 40(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 44(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 48(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 52(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 56(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 60(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 64(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 68(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 72(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- cmpl $8,%ebx
	- je .L000rc5_exit
	- xorl %esi,%edi
	- movl 76(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 80(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 84(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 88(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 92(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 96(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 100(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 104(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- cmpl $12,%ebx
	- je .L000rc5_exit
	- xorl %esi,%edi
	- movl 108(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 112(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 116(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 120(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 124(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 128(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 132(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 136(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	-.L000rc5_exit:
	- movl %edi,(%edx)
	- movl %esi,4(%edx)
	- popl %ebx
	- popl %edi
	- popl %esi
	- popl %ebp
	- ret
	-.size RC5_32_encrypt,.-.L_RC5_32_encrypt_begin
	-.globl RC5_32_decrypt
	-.type RC5_32_decrypt,@function
	-.align 16
	-RC5_32_decrypt:
	-.L_RC5_32_decrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %esi
	- pushl %edi
	- movl 16(%esp),%edx
	- movl 20(%esp),%ebp
	-
	- movl (%edx),%edi
	- movl 4(%edx),%esi
	- pushl %ebx
	- movl (%ebp),%ebx
	- cmpl $12,%ebx
	- je .L001rc5_dec_12
	- cmpl $8,%ebx
	- je .L002rc5_dec_8
	- movl 136(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 132(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 128(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 124(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 120(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 116(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 112(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 108(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	-.L001rc5_dec_12:
	- movl 104(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 100(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 96(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 92(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 88(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 84(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 80(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 76(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	-.L002rc5_dec_8:
	- movl 72(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 68(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 64(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 60(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 56(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 52(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 48(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 44(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 40(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 36(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 32(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 28(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 24(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 20(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 16(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 12(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- subl 8(%ebp),%esi
	- subl 4(%ebp),%edi
	-.L003rc5_exit:
	- movl %edi,(%edx)
	- movl %esi,4(%edx)
	- popl %ebx
	- popl %edi
	- popl %esi
	- popl %ebp
	- ret
	-.size RC5_32_decrypt,.-.L_RC5_32_decrypt_begin
	-.globl RC5_32_cbc_encrypt
	-.type RC5_32_cbc_encrypt,@function
	-.align 16
	-RC5_32_cbc_encrypt:
	-.L_RC5_32_cbc_encrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %ebx
	- pushl %esi
	- pushl %edi
	- movl 28(%esp),%ebp
	-
	- movl 36(%esp),%ebx
	- movl (%ebx),%esi
	- movl 4(%ebx),%edi
	- pushl %edi
	- pushl %esi
	- pushl %edi
	- pushl %esi
	- movl %esp,%ebx
	- movl 36(%esp),%esi
	- movl 40(%esp),%edi
	-
	- movl 56(%esp),%ecx
	-
	- movl 48(%esp),%eax
	- pushl %eax
	- pushl %ebx
	- cmpl $0,%ecx
	- jz .L004decrypt
	- andl $4294967288,%ebp
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- jz .L005encrypt_finish
	-.L006encrypt_loop:
	- movl (%esi),%ecx
	- movl 4(%esi),%edx
	- xorl %ecx,%eax
	- xorl %edx,%ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_RC5_32_encrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- movl %eax,(%edi)
	- movl %ebx,4(%edi)
	- addl $8,%esi
	- addl $8,%edi
	- subl $8,%ebp
	- jnz .L006encrypt_loop
	-.L005encrypt_finish:
	- movl 52(%esp),%ebp
	- andl $7,%ebp
	- jz .L007finish
	- call .L008PIC_point
	-.L008PIC_point:
	- popl %edx
	- leal .L009cbc_enc_jmp_table-.L008PIC_point(%edx),%ecx
	- movl (%ecx,%ebp,4),%ebp
	- addl %edx,%ebp
	- xorl %ecx,%ecx
	- xorl %edx,%edx
	- jmp *%ebp
	-.L010ej7:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 6(%esi),%dh
	- shll $8,%edx
	-.L011ej6:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 5(%esi),%dh
	-.L012ej5:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 4(%esi),%dl
	-.L013ej4:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movl (%esi),%ecx
	- jmp .L014ejend
	-.L015ej3:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 2(%esi),%ch
	- shll $8,%ecx
	-.L016ej2:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 1(%esi),%ch
	-.L017ej1:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb (%esi),%cl
	-.L014ejend:
	- xorl %ecx,%eax
	- xorl %edx,%ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_RC5_32_encrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- movl %eax,(%edi)
	- movl %ebx,4(%edi)
	- jmp .L007finish
	-.L004decrypt:
	- andl $4294967288,%ebp
	- movl 16(%esp),%eax
	- movl 20(%esp),%ebx
	- jz .L018decrypt_finish
	-.L019decrypt_loop:
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_RC5_32_decrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- movl 16(%esp),%ecx
	- movl 20(%esp),%edx
	- xorl %eax,%ecx
	- xorl %ebx,%edx
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- movl %ecx,(%edi)
	- movl %edx,4(%edi)
	- movl %eax,16(%esp)
	- movl %ebx,20(%esp)
	- addl $8,%esi
	- addl $8,%edi
	- subl $8,%ebp
	- jnz .L019decrypt_loop
	-.L018decrypt_finish:
	- movl 52(%esp),%ebp
	- andl $7,%ebp
	- jz .L007finish
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_RC5_32_decrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- movl 16(%esp),%ecx
	- movl 20(%esp),%edx
	- xorl %eax,%ecx
	- xorl %ebx,%edx
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	-.L020dj7:
	- rorl $16,%edx
	- movb %dl,6(%edi)
	- shrl $16,%edx
	-.L021dj6:
	- movb %dh,5(%edi)
	-.L022dj5:
	- movb %dl,4(%edi)
	-.L023dj4:
	- movl %ecx,(%edi)
	- jmp .L024djend
	-.L025dj3:
	- rorl $16,%ecx
	- movb %cl,2(%edi)
	- shll $16,%ecx
	-.L026dj2:
	- movb %ch,1(%esi)
	-.L027dj1:
	- movb %cl,(%esi)
	-.L024djend:
	- jmp .L007finish
	-.L007finish:
	- movl 60(%esp),%ecx
	- addl $24,%esp
	- movl %eax,(%ecx)
	- movl %ebx,4(%ecx)
	- popl %edi
	- popl %esi
	- popl %ebx
	- popl %ebp
	- ret
	-.align 64
	-.L009cbc_enc_jmp_table:
	-.long 0
	-.long .L017ej1-.L008PIC_point
	-.long .L016ej2-.L008PIC_point
	-.long .L015ej3-.L008PIC_point
	-.long .L013ej4-.L008PIC_point
	-.long .L012ej5-.L008PIC_point
	-.long .L011ej6-.L008PIC_point
	-.long .L010ej7-.L008PIC_point
	-.align 64
	-.size RC5_32_cbc_encrypt,.-.L_RC5_32_cbc_encrypt_begin
	-
	- .section ".note.gnu.property", "a"
	- .p2align 2
	- .long 1f - 0f
	- .long 4f - 1f
	- .long 5
	-0:
	- .asciz "GNU"
	-1:
	- .p2align 2
	- .long 0xc0000002
	- .long 3f - 2f
	-2:
	- .long 3
	-3:
	- .p2align 2
	-4:
	-#else
	-.text
	-.globl RC5_32_encrypt
	-.type RC5_32_encrypt,@function
	-.align 16
	-RC5_32_encrypt:
	-.L_RC5_32_encrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %esi
	- pushl %edi
	- movl 16(%esp),%edx
	- movl 20(%esp),%ebp
	-
	- movl (%edx),%edi
	- movl 4(%edx),%esi
	- pushl %ebx
	- movl (%ebp),%ebx
	- addl 4(%ebp),%edi
	- addl 8(%ebp),%esi
	- xorl %esi,%edi
	- movl 12(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 16(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 20(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 24(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 28(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 32(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 36(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 40(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 44(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 48(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 52(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 56(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 60(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 64(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 68(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 72(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- cmpl $8,%ebx
	- je .L000rc5_exit
	- xorl %esi,%edi
	- movl 76(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 80(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 84(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 88(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 92(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 96(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 100(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 104(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- cmpl $12,%ebx
	- je .L000rc5_exit
	- xorl %esi,%edi
	- movl 108(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 112(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 116(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 120(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 124(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 128(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	- xorl %esi,%edi
	- movl 132(%ebp),%eax
	- movl %esi,%ecx
	- roll %cl,%edi
	- addl %eax,%edi
	- xorl %edi,%esi
	- movl 136(%ebp),%eax
	- movl %edi,%ecx
	- roll %cl,%esi
	- addl %eax,%esi
	-.L000rc5_exit:
	- movl %edi,(%edx)
	- movl %esi,4(%edx)
	- popl %ebx
	- popl %edi
	- popl %esi
	- popl %ebp
	- ret
	-.size RC5_32_encrypt,.-.L_RC5_32_encrypt_begin
	-.globl RC5_32_decrypt
	-.type RC5_32_decrypt,@function
	-.align 16
	-RC5_32_decrypt:
	-.L_RC5_32_decrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %esi
	- pushl %edi
	- movl 16(%esp),%edx
	- movl 20(%esp),%ebp
	-
	- movl (%edx),%edi
	- movl 4(%edx),%esi
	- pushl %ebx
	- movl (%ebp),%ebx
	- cmpl $12,%ebx
	- je .L001rc5_dec_12
	- cmpl $8,%ebx
	- je .L002rc5_dec_8
	- movl 136(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 132(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 128(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 124(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 120(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 116(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 112(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 108(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	-.L001rc5_dec_12:
	- movl 104(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 100(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 96(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 92(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 88(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 84(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 80(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 76(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	-.L002rc5_dec_8:
	- movl 72(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 68(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 64(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 60(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 56(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 52(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 48(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 44(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 40(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 36(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 32(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 28(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 24(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 20(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- movl 16(%ebp),%eax
	- subl %eax,%esi
	- movl %edi,%ecx
	- rorl %cl,%esi
	- xorl %edi,%esi
	- movl 12(%ebp),%eax
	- subl %eax,%edi
	- movl %esi,%ecx
	- rorl %cl,%edi
	- xorl %esi,%edi
	- subl 8(%ebp),%esi
	- subl 4(%ebp),%edi
	-.L003rc5_exit:
	- movl %edi,(%edx)
	- movl %esi,4(%edx)
	- popl %ebx
	- popl %edi
	- popl %esi
	- popl %ebp
	- ret
	-.size RC5_32_decrypt,.-.L_RC5_32_decrypt_begin
	-.globl RC5_32_cbc_encrypt
	-.type RC5_32_cbc_encrypt,@function
	-.align 16
	-RC5_32_cbc_encrypt:
	-.L_RC5_32_cbc_encrypt_begin:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	-
	- pushl %ebp
	- pushl %ebx
	- pushl %esi
	- pushl %edi
	- movl 28(%esp),%ebp
	-
	- movl 36(%esp),%ebx
	- movl (%ebx),%esi
	- movl 4(%ebx),%edi
	- pushl %edi
	- pushl %esi
	- pushl %edi
	- pushl %esi
	- movl %esp,%ebx
	- movl 36(%esp),%esi
	- movl 40(%esp),%edi
	-
	- movl 56(%esp),%ecx
	-
	- movl 48(%esp),%eax
	- pushl %eax
	- pushl %ebx
	- cmpl $0,%ecx
	- jz .L004decrypt
	- andl $4294967288,%ebp
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- jz .L005encrypt_finish
	-.L006encrypt_loop:
	- movl (%esi),%ecx
	- movl 4(%esi),%edx
	- xorl %ecx,%eax
	- xorl %edx,%ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_RC5_32_encrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- movl %eax,(%edi)
	- movl %ebx,4(%edi)
	- addl $8,%esi
	- addl $8,%edi
	- subl $8,%ebp
	- jnz .L006encrypt_loop
	-.L005encrypt_finish:
	- movl 52(%esp),%ebp
	- andl $7,%ebp
	- jz .L007finish
	- call .L008PIC_point
	-.L008PIC_point:
	- popl %edx
	- leal .L009cbc_enc_jmp_table-.L008PIC_point(%edx),%ecx
	- movl (%ecx,%ebp,4),%ebp
	- addl %edx,%ebp
	- xorl %ecx,%ecx
	- xorl %edx,%edx
	- jmp *%ebp
	-.L010ej7:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 6(%esi),%dh
	- shll $8,%edx
	-.L011ej6:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 5(%esi),%dh
	-.L012ej5:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 4(%esi),%dl
	-.L013ej4:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movl (%esi),%ecx
	- jmp .L014ejend
	-.L015ej3:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 2(%esi),%ch
	- shll $8,%ecx
	-.L016ej2:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb 1(%esi),%ch
	-.L017ej1:
	- #ifdef __CET__
	-
	-.byte 243,15,30,251
	- #endif
	-
	- movb (%esi),%cl
	-.L014ejend:
	- xorl %ecx,%eax
	- xorl %edx,%ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_RC5_32_encrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- movl %eax,(%edi)
	- movl %ebx,4(%edi)
	- jmp .L007finish
	-.L004decrypt:
	- andl $4294967288,%ebp
	- movl 16(%esp),%eax
	- movl 20(%esp),%ebx
	- jz .L018decrypt_finish
	-.L019decrypt_loop:
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_RC5_32_decrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- movl 16(%esp),%ecx
	- movl 20(%esp),%edx
	- xorl %eax,%ecx
	- xorl %ebx,%edx
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- movl %ecx,(%edi)
	- movl %edx,4(%edi)
	- movl %eax,16(%esp)
	- movl %ebx,20(%esp)
	- addl $8,%esi
	- addl $8,%edi
	- subl $8,%ebp
	- jnz .L019decrypt_loop
	-.L018decrypt_finish:
	- movl 52(%esp),%ebp
	- andl $7,%ebp
	- jz .L007finish
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	- movl %eax,8(%esp)
	- movl %ebx,12(%esp)
	- call .L_RC5_32_decrypt_begin
	- movl 8(%esp),%eax
	- movl 12(%esp),%ebx
	- movl 16(%esp),%ecx
	- movl 20(%esp),%edx
	- xorl %eax,%ecx
	- xorl %ebx,%edx
	- movl (%esi),%eax
	- movl 4(%esi),%ebx
	-.L020dj7:
	- rorl $16,%edx
	- movb %dl,6(%edi)
	- shrl $16,%edx
	-.L021dj6:
	- movb %dh,5(%edi)
	-.L022dj5:
	- movb %dl,4(%edi)
	-.L023dj4:
	- movl %ecx,(%edi)
	- jmp .L024djend
	-.L025dj3:
	- rorl $16,%ecx
	- movb %cl,2(%edi)
	- shll $16,%ecx
	-.L026dj2:
	- movb %ch,1(%esi)
	-.L027dj1:
	- movb %cl,(%esi)
	-.L024djend:
	- jmp .L007finish
	-.L007finish:
	- movl 60(%esp),%ecx
	- addl $24,%esp
	- movl %eax,(%ecx)
	- movl %ebx,4(%ecx)
	- popl %edi
	- popl %esi
	- popl %ebx
	- popl %ebp
	- ret
	-.align 64
	-.L009cbc_enc_jmp_table:
	-.long 0
	-.long .L017ej1-.L008PIC_point
	-.long .L016ej2-.L008PIC_point
	-.long .L015ej3-.L008PIC_point
	-.long .L013ej4-.L008PIC_point
	-.long .L012ej5-.L008PIC_point
	-.long .L011ej6-.L008PIC_point
	-.long .L010ej7-.L008PIC_point
	-.align 64
	-.size RC5_32_cbc_encrypt,.-.L_RC5_32_cbc_encrypt_begin
	-
	- .section ".note.gnu.property", "a"
	- .p2align 2
	- .long 1f - 0f
	- .long 4f - 1f
	- .long 5
	-0:
	- .asciz "GNU"
	-1:
	- .p2align 2
	- .long 0xc0000002
	- .long 3f - 2f
	-2:
	- .long 3
	-3:
	- .p2align 2
	-4:
	-#endif
	diff --git a/sys/crypto/openssl/powerpc/aes-gcm-ppc.S b/sys/crypto/openssl/powerpc/aes-gcm-ppc.S
	deleted file mode 100644
	--- a/sys/crypto/openssl/powerpc/aes-gcm-ppc.S
	+++ /dev/null
	@@ -1,988 +0,0 @@
	-/* Do not modify. This file is auto-generated from aes-gcm-ppc.pl. */
	-.machine "any"
	-.text
	-
	-.macro SAVE_REGS
	- mflr 0
	- std 0, 16(1)
	- stdu 1,-512(1)
	-
	- std 14, 112(1)
	- std 15, 120(1)
	- std 16, 128(1)
	- std 17, 136(1)
	- std 18, 144(1)
	- std 19, 152(1)
	- std 20, 160(1)
	- std 21, 168(1)
	- std 22, 176(1)
	- std 23, 184(1)
	- std 24, 192(1)
	-
	- stxv 32+20, 256(1)
	- stxv 32+21, 256+16(1)
	- stxv 32+22, 256+32(1)
	- stxv 32+23, 256+48(1)
	- stxv 32+24, 256+64(1)
	- stxv 32+25, 256+80(1)
	- stxv 32+26, 256+96(1)
	- stxv 32+27, 256+112(1)
	- stxv 32+28, 256+128(1)
	- stxv 32+29, 256+144(1)
	- stxv 32+30, 256+160(1)
	- stxv 32+31, 256+176(1)
	-.endm # SAVE_REGS
	-
	-.macro RESTORE_REGS
	- lxv 32+20, 256(1)
	- lxv 32+21, 256+16(1)
	- lxv 32+22, 256+32(1)
	- lxv 32+23, 256+48(1)
	- lxv 32+24, 256+64(1)
	- lxv 32+25, 256+80(1)
	- lxv 32+26, 256+96(1)
	- lxv 32+27, 256+112(1)
	- lxv 32+28, 256+128(1)
	- lxv 32+29, 256+144(1)
	- lxv 32+30, 256+160(1)
	- lxv 32+31, 256+176(1)
	-
	- ld 14, 112(1)
	- ld 15, 120(1)
	- ld 16, 128(1)
	- ld 17, 136(1)
	- ld 18, 144(1)
	- ld 19, 152(1)
	- ld 20, 160(1)
	- ld 21, 168(1)
	- ld 22, 176(1)
	- ld 23, 184(1)
	- ld 24, 192(1)
	-
	- addi 1, 1, 512
	- ld 0, 16(1)
	- mtlr 0
	-.endm # RESTORE_REGS
	-
	-# 4x loops
	-.macro AES_CIPHER_4x r
	- vcipher 15, 15, \r
	- vcipher 16, 16, \r
	- vcipher 17, 17, \r
	- vcipher 18, 18, \r
	-.endm
	-
	-# 8x loops
	-.macro AES_CIPHER_8x r
	- vcipher 15, 15, \r
	- vcipher 16, 16, \r
	- vcipher 17, 17, \r
	- vcipher 18, 18, \r
	- vcipher 19, 19, \r
	- vcipher 20, 20, \r
	- vcipher 21, 21, \r
	- vcipher 22, 22, \r
	-.endm
	-
	-.macro LOOP_8AES_STATE
	- AES_CIPHER_8x 23
	- AES_CIPHER_8x 24
	- AES_CIPHER_8x 25
	- AES_CIPHER_8x 26
	- AES_CIPHER_8x 27
	- AES_CIPHER_8x 28
	- AES_CIPHER_8x 29
	- AES_CIPHER_8x 1
	-.endm
	-
	-#
	-# PPC_GFMUL128_8x: Compute hash values of 8 blocks based on Karatsuba method.
	-#
	-# S1 should xor with the previous digest
	-#
	-# Xi = v0
	-# H Poly = v2
	-# Hash keys = v3 - v14
	-# vs10: vpermxor vector
	-# Scratch: v23 - v29
	-#
	-.macro PPC_GFMUL128_8x
	-
	- vpmsumd 23, 12, 15 # H4.L * X.L
	- vpmsumd 24, 9, 16
	- vpmsumd 25, 6, 17
	- vpmsumd 26, 3, 18
	-
	- vxor 23, 23, 24
	- vxor 23, 23, 25
	- vxor 23, 23, 26 # L
	-
	- vpmsumd 27, 13, 15 # H4.L * X.H + H4.H * X.L
	- vpmsumd 28, 10, 16 # H3.L * X1.H + H3.H * X1.L
	- vpmsumd 25, 7, 17
	- vpmsumd 26, 4, 18
	-
	- vxor 24, 27, 28
	- vxor 24, 24, 25
	- vxor 24, 24, 26 # M
	-
	- vpmsumd 26, 14, 15 # H4.H * X.H
	- vpmsumd 27, 11, 16
	- vpmsumd 28, 8, 17
	- vpmsumd 29, 5, 18
	-
	- vxor 26, 26, 27
	- vxor 26, 26, 28
	- vxor 26, 26, 29
	-
	- # sum hash and reduction with H Poly
	- vpmsumd 28, 23, 2 # reduction
	-
	- vxor 1, 1, 1
	- vsldoi 25, 24, 1, 8 # mL
	- vsldoi 1, 1, 24, 8 # mH
	- vxor 23, 23, 25 # mL + L
	-
	- # This performs swap and xor like,
	- # vsldoi 23, 23, 23, 8 # swap
	- # vxor 23, 23, 28
	- xxlor 32+29, 10, 10
	- vpermxor 23, 23, 28, 29
	-
	- vxor 24, 26, 1 # H
	-
	- # sum hash and reduction with H Poly
	- #
	- # vsldoi 25, 23, 23, 8 # swap
	- # vpmsumd 23, 23, 2
	- # vxor 27, 25, 24
	- #
	- vpermxor 27, 23, 24, 29
	- vpmsumd 23, 23, 2
	- vxor 0, 23, 27 # Digest of 4 blocks
	-
	- vxor 19, 19, 0
	-
	- # Compute digest for the next 4 blocks
	- vpmsumd 24, 9, 20
	- vpmsumd 25, 6, 21
	- vpmsumd 26, 3, 22
	- vpmsumd 23, 12, 19 # H4.L * X.L
	-
	- vxor 23, 23, 24
	- vxor 23, 23, 25
	- vxor 23, 23, 26 # L
	-
	- vpmsumd 27, 13, 19 # H4.L * X.H + H4.H * X.L
	- vpmsumd 28, 10, 20 # H3.L * X1.H + H3.H * X1.L
	- vpmsumd 25, 7, 21
	- vpmsumd 26, 4, 22
	-
	- vxor 24, 27, 28
	- vxor 24, 24, 25
	- vxor 24, 24, 26 # M
	-
	- vpmsumd 26, 14, 19 # H4.H * X.H
	- vpmsumd 27, 11, 20
	- vpmsumd 28, 8, 21
	- vpmsumd 29, 5, 22
	-
	- vxor 26, 26, 27
	- vxor 26, 26, 28
	- vxor 26, 26, 29
	-
	- # sum hash and reduction with H Poly
	- vpmsumd 28, 23, 2 # reduction
	-
	- vxor 1, 1, 1
	- vsldoi 25, 24, 1, 8 # mL
	- vsldoi 1, 1, 24, 8 # mH
	- vxor 23, 23, 25 # mL + L
	-
	- # This performs swap and xor like,
	- # vsldoi 23, 23, 23, 8 # swap
	- # vxor 23, 23, 28
	- xxlor 32+29, 10, 10
	- vpermxor 23, 23, 28, 29
	-
	- vxor 24, 26, 1 # H
	-
	- # sum hash and reduction with H Poly
	- #
	- # vsldoi 25, 23, 23, 8 # swap
	- # vpmsumd 23, 23, 2
	- # vxor 27, 25, 24
	- #
	- vpermxor 27, 23, 24, 29
	- vpmsumd 23, 23, 2
	- vxor 0, 23, 27 # Digest of 8 blocks
	-.endm
	-
	-#
	-# Compute update single ghash
	-# vs10: vpermxor vector
	-# scratch: v1, v22..v27
	-#
	-.macro PPC_GHASH1x H S1
	-
	- vxor 1, 1, 1
	-
	- vpmsumd 22, 3, \S1 # L
	- vpmsumd 23, 4, \S1 # M
	- vpmsumd 24, 5, \S1 # H
	-
	- vpmsumd 27, 22, 2 # reduction
	-
	- vsldoi 25, 23, 1, 8 # mL
	- vsldoi 26, 1, 23, 8 # mH
	- vxor 22, 22, 25 # LL + LL
	- vxor 24, 24, 26 # HH + HH
	-
	- xxlor 32+25, 10, 10
	- vpermxor 22, 22, 27, 25
	-
	- # vsldoi 23, 22, 22, 8 # swap
	- # vpmsumd 22, 22, 2 # reduction
	- # vxor 23, 23, 24
	- vpermxor 23, 22, 24, 25
	- vpmsumd 22, 22, 2 # reduction
	-
	- vxor \H, 22, 23
	-.endm
	-
	-#
	-# LOAD_HASH_TABLE
	-# Xi = v0
	-# H Poly = v2
	-# Hash keys = v3 - v14
	-#
	-.macro LOAD_HASH_TABLE
	- # Load Xi
	- lxvb16x 32, 0, 8 # load Xi
	-
	- vxor 1, 1, 1
	-
	- li 10, 32
	- lxvd2x 2+32, 10, 8 # H Poli
	-
	- # load Hash - h^4, h^3, h^2, h
	- li 10, 64
	- lxvd2x 4+32, 10, 8 # H
	- vsldoi 3, 1, 4, 8 # l
	- vsldoi 5, 4, 1, 8 # h
	- li 10, 112
	- lxvd2x 7+32, 10, 8 # H^2
	- vsldoi 6, 1, 7, 8 # l
	- vsldoi 8, 7, 1, 8 # h
	- li 10, 160
	- lxvd2x 10+32, 10, 8 # H^3
	- vsldoi 9, 1, 10, 8 # l
	- vsldoi 11, 10, 1, 8 # h
	- li 10, 208
	- lxvd2x 13+32, 10, 8 # H^4
	- vsldoi 12, 1, 13, 8 # l
	- vsldoi 14, 13, 1, 8 # h
	-.endm
	-
	-.macro PROCESS_8X_AES_STATES
	- vcipherlast 15, 15, 1
	- vcipherlast 16, 16, 1
	- vcipherlast 17, 17, 1
	- vcipherlast 18, 18, 1
	- vcipherlast 19, 19, 1
	- vcipherlast 20, 20, 1
	- vcipherlast 21, 21, 1
	- vcipherlast 22, 22, 1
	-
	- lxvb16x 32+23, 0, 14 # load block
	- lxvb16x 32+24, 15, 14 # load block
	- lxvb16x 32+25, 16, 14 # load block
	- lxvb16x 32+26, 17, 14 # load block
	- lxvb16x 32+27, 18, 14 # load block
	- lxvb16x 32+28, 19, 14 # load block
	- lxvb16x 32+29, 20, 14 # load block
	- lxvb16x 32+30, 21, 14 # load block
	- addi 14, 14, 128
	-
	- vxor 15, 15, 23
	- vxor 16, 16, 24
	- vxor 17, 17, 25
	- vxor 18, 18, 26
	- vxor 19, 19, 27
	- vxor 20, 20, 28
	- vxor 21, 21, 29
	- vxor 22, 22, 30
	-
	- stxvb16x 47, 0, 9 # store output
	- stxvb16x 48, 15, 9 # store output
	- stxvb16x 49, 16, 9 # store output
	- stxvb16x 50, 17, 9 # store output
	- stxvb16x 51, 18, 9 # store output
	- stxvb16x 52, 19, 9 # store output
	- stxvb16x 53, 20, 9 # store output
	- stxvb16x 54, 21, 9 # store output
	- addi 9, 9, 128
	-.endm
	-
	-.macro COMPUTE_STATES
	- xxlor 32+15, 9, 9 # last state
	- vadduwm 15, 15, 31 # state + counter
	- vadduwm 16, 15, 31
	- vadduwm 17, 16, 31
	- vadduwm 18, 17, 31
	- vadduwm 19, 18, 31
	- vadduwm 20, 19, 31
	- vadduwm 21, 20, 31
	- vadduwm 22, 21, 31
	- xxlor 9, 32+22, 32+22 # save last state
	-
	- xxlxor 32+15, 32+15, 0 # IV + round key - add round key 0
	- xxlxor 32+16, 32+16, 0
	- xxlxor 32+17, 32+17, 0
	- xxlxor 32+18, 32+18, 0
	- xxlxor 32+19, 32+19, 0
	- xxlxor 32+20, 32+20, 0
	- xxlxor 32+21, 32+21, 0
	- xxlxor 32+22, 32+22, 0
	-.endm
	-
	-################################################################################
	-# Compute AES and ghash one block at a time.
	-# r23: AES rounds
	-# v30: current IV
	-# vs0: roundkey 0
	-#
	-################################################################################
	-.align 4
	-aes_gcm_crypt_1x:
	-
	- cmpdi 5, 16
	- bge __More_1x
	- blr
	-__More_1x:
	- li 10, 16
	- divdu 12, 5, 10
	-
	- xxlxor 32+15, 32+30, 0
	-
	- # Pre-load 8 AES rounds to scratch vectors.
	- lxv 32+16, 16(6) # round key 1
	- lxv 32+17, 32(6) # round key 2
	- lxv 32+18, 48(6) # round key 3
	- lxv 32+19, 64(6) # round key 4
	- lxv 32+20, 80(6) # round key 5
	- lxv 32+21, 96(6) # round key 6
	- lxv 32+28, 112(6) # round key 7
	- lxv 32+29, 128(6) # round key 8
	-
	- lwz 23, 240(6) # n rounds
	- addi 22, 23, -9 # remaining AES rounds
	-
	- cmpdi 12, 0
	- bgt __Loop_1x
	- blr
	-
	-__Loop_1x:
	- mtctr 22
	- addi 10, 6, 144
	- vcipher 15, 15, 16
	- vcipher 15, 15, 17
	- vcipher 15, 15, 18
	- vcipher 15, 15, 19
	- vcipher 15, 15, 20
	- vcipher 15, 15, 21
	- vcipher 15, 15, 28
	- vcipher 15, 15, 29
	-
	-__Loop_aes_1state:
	- lxv 32+1, 0(10)
	- vcipher 15, 15, 1
	- addi 10, 10, 16
	- bdnz __Loop_aes_1state
	- lxv 32+1, 0(10) # last round key
	- lxvb16x 11, 0, 14 # load input block
	- vcipherlast 15, 15, 1
	-
	- xxlxor 32+15, 32+15, 11
	- stxvb16x 32+15, 0, 9 # store output
	- addi 14, 14, 16
	- addi 9, 9, 16
	-
	- cmpdi 24, 0 # decrypt?
	- bne __Encrypt_1x
	- xxlor 15+32, 11, 11
	-__Encrypt_1x:
	- vxor 15, 15, 0
	- PPC_GHASH1x 0, 15
	-
	- addi 5, 5, -16
	- addi 11, 11, 16
	-
	- vadduwm 30, 30, 31 # IV + counter
	- xxlxor 32+15, 32+30, 0
	- addi 12, 12, -1
	- cmpdi 12, 0
	- bgt __Loop_1x
	-
	- stxvb16x 32+0, 0, 8 # update Xi
	- blr
	-.size aes_gcm_crypt_1x,.-aes_gcm_crypt_1x
	-
	-################################################################################
	-# Process a normal partial block when we come here.
	-# Compute partial mask, Load and store partial block to stack.
	-# Compute AES state.
	-# Compute ghash.
	-#
	-################################################################################
	-.align 4
	-__Process_partial:
	-
	- # create partial mask
	- vspltisb 16, -1
	- li 12, 16
	- sub 12, 12, 5
	- sldi 12, 12, 3
	- mtvsrdd 32+17, 0, 12
	- vslo 16, 16, 17 # partial block mask
	-
	- lxvb16x 11, 0, 14 # load partial block
	- xxland 11, 11, 32+16
	-
	- # AES crypt partial
	- xxlxor 32+15, 32+30, 0
	- lwz 23, 240(6) # n rounds
	- addi 22, 23, -1 # loop - 1
	- mtctr 22
	- addi 10, 6, 16
	-
	-__Loop_aes_pstate:
	- lxv 32+1, 0(10)
	- vcipher 15, 15, 1
	- addi 10, 10, 16
	- bdnz __Loop_aes_pstate
	- lxv 32+1, 0(10) # last round key
	- vcipherlast 15, 15, 1
	-
	- xxlxor 32+15, 32+15, 11
	- vand 15, 15, 16
	-
	- # AES crypt output v15
	- # Write partial
	- li 10, 224
	- stxvb16x 15+32, 10, 1 # write v15 to stack
	- addi 10, 1, 223
	- addi 12, 9, -1
	- mtctr 5 # partial block len
	-__Write_partial:
	- lbzu 22, 1(10)
	- stbu 22, 1(12)
	- bdnz __Write_partial
	-
	- cmpdi 24, 0 # decrypt?
	- bne __Encrypt_partial
	- xxlor 32+15, 11, 11 # decrypt using the input block
	-__Encrypt_partial:
	- vxor 15, 15, 0 # ^ previous hash
	- PPC_GHASH1x 0, 15
	- li 5, 0 # done last byte
	- stxvb16x 32+0, 0, 8 # Update X1
	- blr
	-.size __Process_partial,.-__Process_partial
	-
	-################################################################################
	-# ppc_aes_gcm_encrypt (const void inp, void out, size_t len,
	-# const char rk, unsigned char iv[16], void Xip);
	-#
	-# r3 - inp
	-# r4 - out
	-# r5 - len
	-# r6 - AES round keys
	-# r7 - iv
	-# r8 - Xi, HPoli, hash keys
	-#
	-# rounds is at offset 240 in rk
	-# Xi is at 0 in gcm_table (Xip).
	-#
	-################################################################################
	-.global ppc_aes_gcm_encrypt
	-.align 5
	-ppc_aes_gcm_encrypt:
	-
	- SAVE_REGS
	- LOAD_HASH_TABLE
	-
	- # initialize ICB: GHASH( IV ), IV - r7
	- lxvb16x 30+32, 0, 7 # load IV - v30
	-
	- mr 14, 3
	- mr 9, 4
	-
	- # counter 1
	- vxor 31, 31, 31
	- vspltisb 22, 1
	- vsldoi 31, 31, 22,1 # counter 1
	-
	- addis 11, 2, permx@toc@ha
	- addi 11, 11, permx@toc@l
	- lxv 10, 0(11) # vs10: vpermxor vector
	- li 11, 0
	-
	- lxv 0, 0(6) # round key 0
	-
	- #
	- # Process different blocks
	- #
	- cmpdi 5, 128
	- blt __Process_more_enc
	-
	- # load 9 round keys
	- lxv 32+23, 16(6) # round key 1
	- lxv 32+24, 32(6) # round key 2
	- lxv 32+25, 48(6) # round key 3
	- lxv 32+26, 64(6) # round key 4
	- lxv 32+27, 80(6) # round key 5
	- lxv 32+28, 96(6) # round key 6
	- lxv 32+29, 112(6) # round key 7
	- lxv 32+1, 128(6) # round key 8
	-
	- # load rounds - 10 (128), 12 (192), 14 (256)
	- lwz 23, 240(6) # n rounds
	-
	-__Process_encrypt:
	-#
	-# Process 8x AES/GCM blocks
	-#
	-__Process_8x_enc:
	- # 8x blocks
	- li 10, 128
	- divdu 12, 5, 10 # n 128 bytes-blocks
	-
	- addi 12, 12, -1 # loop - 1
	-
	- vmr 15, 30 # first state: IV
	- vadduwm 16, 15, 31 # state + counter
	- vadduwm 17, 16, 31
	- vadduwm 18, 17, 31
	- vadduwm 19, 18, 31
	- vadduwm 20, 19, 31
	- vadduwm 21, 20, 31
	- vadduwm 22, 21, 31
	- xxlor 9, 32+22, 32+22 # save last state
	-
	- # vxor state, state, w # addroundkey
	- xxlxor 32+15, 32+15, 0 # IV + round key - add round key 0
	- xxlxor 32+16, 32+16, 0
	- xxlxor 32+17, 32+17, 0
	- xxlxor 32+18, 32+18, 0
	- xxlxor 32+19, 32+19, 0
	- xxlxor 32+20, 32+20, 0
	- xxlxor 32+21, 32+21, 0
	- xxlxor 32+22, 32+22, 0
	-
	- li 15, 16
	- li 16, 32
	- li 17, 48
	- li 18, 64
	- li 19, 80
	- li 20, 96
	- li 21, 112
	-
	- #
	- # Pre-compute first 8 AES state and leave 1/3/5 more rounds
	- # for the loop.
	- #
	- addi 22, 23, -9 # process 8 keys
	- mtctr 22 # AES key loop
	- addi 10, 6, 144
	-
	- LOOP_8AES_STATE # process 8 AES keys
	-
	-__PreLoop_aes_state:
	- lxv 32+1, 0(10) # round key
	- AES_CIPHER_8x 1
	- addi 10, 10, 16
	- bdnz __PreLoop_aes_state
	- lxv 32+1, 0(10) # last round key (v1)
	-
	- cmpdi 12, 0 # Only one loop (8 block)
	- beq __Finish_ghash
	-
	-#
	-# Loop 8x blocks and compute ghash
	-#
	-__Loop_8x_block_enc:
	- PROCESS_8X_AES_STATES
	-
	- # Compute ghash here
	- vxor 15, 15, 0
	- PPC_GFMUL128_8x
	-
	- COMPUTE_STATES
	-
	- addi 5, 5, -128
	- addi 11, 11, 128
	-
	- lxv 32+23, 16(6) # round key 1
	- lxv 32+24, 32(6) # round key 2
	- lxv 32+25, 48(6) # round key 3
	- lxv 32+26, 64(6) # round key 4
	- lxv 32+27, 80(6) # round key 5
	- lxv 32+28, 96(6) # round key 6
	- lxv 32+29, 112(6) # round key 7
	- lxv 32+1, 128(6) # round key 8
	-
	- # Compute first 8 AES state and leave 1/3/5 more rounds
	- # for the loop.
	- LOOP_8AES_STATE # process 8 AES keys
	- mtctr 22 # AES key loop
	- addi 10, 6, 144
	-
	-__LastLoop_aes_state:
	- lxv 32+1, 0(10) # round key
	- AES_CIPHER_8x 1
	- addi 10, 10, 16
	- bdnz __LastLoop_aes_state
	-
	- lxv 32+1, 0(10) # last round key (v1)
	-
	- addi 12, 12, -1
	- cmpdi 12, 0
	- bne __Loop_8x_block_enc
	-
	- #
	- # Remainng blocks
	- #
	-__Finish_ghash:
	- PROCESS_8X_AES_STATES
	-
	- # Compute ghash here
	- vxor 15, 15, 0
	- PPC_GFMUL128_8x
	-
	- # Update IV and Xi
	- xxlor 30+32, 9, 9 # last ctr
	- vadduwm 30, 30, 31 # increase ctr
	- stxvb16x 32+0, 0, 8 # update Xi
	-
	- addi 5, 5, -128
	- addi 11, 11, 128
	-
	- #
	- # Done 8x blocks
	- #
	-
	- cmpdi 5, 0
	- beq aes_gcm_out
	-
	-__Process_more_enc:
	- li 24, 1 # encrypt
	- bl aes_gcm_crypt_1x
	- cmpdi 5, 0
	- beq aes_gcm_out
	-
	- bl __Process_partial
	- b aes_gcm_out
	-
	-.size ppc_aes_gcm_encrypt,.-ppc_aes_gcm_encrypt
	-
	-################################################################################
	-# ppc_aes_gcm_decrypt (const void inp, void out, size_t len,
	-# const char rk, unsigned char iv[16], void Xip);
	-# 8x Decrypt
	-#
	-################################################################################
	-.global ppc_aes_gcm_decrypt
	-.align 5
	-ppc_aes_gcm_decrypt:
	-
	- SAVE_REGS
	- LOAD_HASH_TABLE
	-
	- # initialize ICB: GHASH( IV ), IV - r7
	- lxvb16x 30+32, 0, 7 # load IV - v30
	-
	- mr 14, 3
	- mr 9, 4
	-
	- # counter 1
	- vxor 31, 31, 31
	- vspltisb 22, 1
	- vsldoi 31, 31, 22,1 # counter 1
	-
	- addis 11, 2, permx@toc@ha
	- addi 11, 11, permx@toc@l
	- lxv 10, 0(11) # vs10: vpermxor vector
	- li 11, 0
	-
	- lxv 0, 0(6) # round key 0
	-
	- #
	- # Process different blocks
	- #
	- cmpdi 5, 128
	- blt __Process_more_dec
	-
	- # load 9 round keys
	- lxv 32+23, 16(6) # round key 1
	- lxv 32+24, 32(6) # round key 2
	- lxv 32+25, 48(6) # round key 3
	- lxv 32+26, 64(6) # round key 4
	- lxv 32+27, 80(6) # round key 5
	- lxv 32+28, 96(6) # round key 6
	- lxv 32+29, 112(6) # round key 7
	- lxv 32+1, 128(6) # round key 8
	-
	- # load rounds - 10 (128), 12 (192), 14 (256)
	- lwz 23, 240(6) # n rounds
	-
	-__Process_decrypt:
	-#
	-# Process 8x AES/GCM blocks
	-#
	-__Process_8x_dec:
	- # 8x blocks
	- li 10, 128
	- divdu 12, 5, 10 # n 128 bytes-blocks
	-
	- addi 12, 12, -1 # loop - 1
	-
	- vmr 15, 30 # first state: IV
	- vadduwm 16, 15, 31 # state + counter
	- vadduwm 17, 16, 31
	- vadduwm 18, 17, 31
	- vadduwm 19, 18, 31
	- vadduwm 20, 19, 31
	- vadduwm 21, 20, 31
	- vadduwm 22, 21, 31
	- xxlor 9, 32+22, 32+22 # save last state
	-
	- # vxor state, state, w # addroundkey
	- xxlxor 32+15, 32+15, 0 # IV + round key - add round key 0
	- xxlxor 32+16, 32+16, 0
	- xxlxor 32+17, 32+17, 0
	- xxlxor 32+18, 32+18, 0
	- xxlxor 32+19, 32+19, 0
	- xxlxor 32+20, 32+20, 0
	- xxlxor 32+21, 32+21, 0
	- xxlxor 32+22, 32+22, 0
	-
	- li 15, 16
	- li 16, 32
	- li 17, 48
	- li 18, 64
	- li 19, 80
	- li 20, 96
	- li 21, 112
	-
	- #
	- # Pre-compute first 8 AES state and leave 1/3/5 more rounds
	- # for the loop.
	- #
	- addi 22, 23, -9 # process 8 keys
	- mtctr 22 # AES key loop
	- addi 10, 6, 144
	-
	- LOOP_8AES_STATE # process 8 AES keys
	-
	-__PreLoop_aes_state_dec:
	- lxv 32+1, 0(10) # round key
	- AES_CIPHER_8x 1
	- addi 10, 10, 16
	- bdnz __PreLoop_aes_state_dec
	- lxv 32+1, 0(10) # last round key (v1)
	-
	- cmpdi 12, 0 # Only one loop (8 block)
	- beq __Finish_ghash_dec
	-
	-#
	-# Loop 8x blocks and compute ghash
	-#
	-__Loop_8x_block_dec:
	- vcipherlast 15, 15, 1
	- vcipherlast 16, 16, 1
	- vcipherlast 17, 17, 1
	- vcipherlast 18, 18, 1
	- vcipherlast 19, 19, 1
	- vcipherlast 20, 20, 1
	- vcipherlast 21, 21, 1
	- vcipherlast 22, 22, 1
	-
	- lxvb16x 32+23, 0, 14 # load block
	- lxvb16x 32+24, 15, 14 # load block
	- lxvb16x 32+25, 16, 14 # load block
	- lxvb16x 32+26, 17, 14 # load block
	- lxvb16x 32+27, 18, 14 # load block
	- lxvb16x 32+28, 19, 14 # load block
	- lxvb16x 32+29, 20, 14 # load block
	- lxvb16x 32+30, 21, 14 # load block
	- addi 14, 14, 128
	-
	- vxor 15, 15, 23
	- vxor 16, 16, 24
	- vxor 17, 17, 25
	- vxor 18, 18, 26
	- vxor 19, 19, 27
	- vxor 20, 20, 28
	- vxor 21, 21, 29
	- vxor 22, 22, 30
	-
	- stxvb16x 47, 0, 9 # store output
	- stxvb16x 48, 15, 9 # store output
	- stxvb16x 49, 16, 9 # store output
	- stxvb16x 50, 17, 9 # store output
	- stxvb16x 51, 18, 9 # store output
	- stxvb16x 52, 19, 9 # store output
	- stxvb16x 53, 20, 9 # store output
	- stxvb16x 54, 21, 9 # store output
	-
	- addi 9, 9, 128
	-
	- vmr 15, 23
	- vmr 16, 24
	- vmr 17, 25
	- vmr 18, 26
	- vmr 19, 27
	- vmr 20, 28
	- vmr 21, 29
	- vmr 22, 30
	-
	- # ghash here
	- vxor 15, 15, 0
	- PPC_GFMUL128_8x
	-
	- xxlor 32+15, 9, 9 # last state
	- vadduwm 15, 15, 31 # state + counter
	- vadduwm 16, 15, 31
	- vadduwm 17, 16, 31
	- vadduwm 18, 17, 31
	- vadduwm 19, 18, 31
	- vadduwm 20, 19, 31
	- vadduwm 21, 20, 31
	- vadduwm 22, 21, 31
	- xxlor 9, 32+22, 32+22 # save last state
	-
	- xxlor 32+27, 0, 0 # restore roundkey 0
	- vxor 15, 15, 27 # IV + round key - add round key 0
	- vxor 16, 16, 27
	- vxor 17, 17, 27
	- vxor 18, 18, 27
	- vxor 19, 19, 27
	- vxor 20, 20, 27
	- vxor 21, 21, 27
	- vxor 22, 22, 27
	-
	- addi 5, 5, -128
	- addi 11, 11, 128
	-
	- lxv 32+23, 16(6) # round key 1
	- lxv 32+24, 32(6) # round key 2
	- lxv 32+25, 48(6) # round key 3
	- lxv 32+26, 64(6) # round key 4
	- lxv 32+27, 80(6) # round key 5
	- lxv 32+28, 96(6) # round key 6
	- lxv 32+29, 112(6) # round key 7
	- lxv 32+1, 128(6) # round key 8
	-
	- LOOP_8AES_STATE # process 8 AES keys
	- mtctr 22 # AES key loop
	- addi 10, 6, 144
	-__LastLoop_aes_state_dec:
	- lxv 32+1, 0(10) # round key
	- AES_CIPHER_8x 1
	- addi 10, 10, 16
	- bdnz __LastLoop_aes_state_dec
	- lxv 32+1, 0(10) # last round key (v1)
	-
	- addi 12, 12, -1
	- cmpdi 12, 0
	- bne __Loop_8x_block_dec
	-
	-__Finish_ghash_dec:
	- vcipherlast 15, 15, 1
	- vcipherlast 16, 16, 1
	- vcipherlast 17, 17, 1
	- vcipherlast 18, 18, 1
	- vcipherlast 19, 19, 1
	- vcipherlast 20, 20, 1
	- vcipherlast 21, 21, 1
	- vcipherlast 22, 22, 1
	-
	- lxvb16x 32+23, 0, 14 # load block
	- lxvb16x 32+24, 15, 14 # load block
	- lxvb16x 32+25, 16, 14 # load block
	- lxvb16x 32+26, 17, 14 # load block
	- lxvb16x 32+27, 18, 14 # load block
	- lxvb16x 32+28, 19, 14 # load block
	- lxvb16x 32+29, 20, 14 # load block
	- lxvb16x 32+30, 21, 14 # load block
	- addi 14, 14, 128
	-
	- vxor 15, 15, 23
	- vxor 16, 16, 24
	- vxor 17, 17, 25
	- vxor 18, 18, 26
	- vxor 19, 19, 27
	- vxor 20, 20, 28
	- vxor 21, 21, 29
	- vxor 22, 22, 30
	-
	- stxvb16x 47, 0, 9 # store output
	- stxvb16x 48, 15, 9 # store output
	- stxvb16x 49, 16, 9 # store output
	- stxvb16x 50, 17, 9 # store output
	- stxvb16x 51, 18, 9 # store output
	- stxvb16x 52, 19, 9 # store output
	- stxvb16x 53, 20, 9 # store output
	- stxvb16x 54, 21, 9 # store output
	- addi 9, 9, 128
	-
	- vxor 15, 23, 0
	- vmr 16, 24
	- vmr 17, 25
	- vmr 18, 26
	- vmr 19, 27
	- vmr 20, 28
	- vmr 21, 29
	- vmr 22, 30
	-
	- #vxor 15, 15, 0
	- PPC_GFMUL128_8x
	-
	- xxlor 30+32, 9, 9 # last ctr
	- vadduwm 30, 30, 31 # increase ctr
	- stxvb16x 32+0, 0, 8 # update Xi
	-
	- addi 5, 5, -128
	- addi 11, 11, 128
	-
	- #
	- # Done 8x blocks
	- #
	-
	- cmpdi 5, 0
	- beq aes_gcm_out
	-
	-__Process_more_dec:
	- li 24, 0 # decrypt
	- bl aes_gcm_crypt_1x
	- cmpdi 5, 0
	- beq aes_gcm_out
	-
	- bl __Process_partial
	- b aes_gcm_out
	-.size ppc_aes_gcm_decrypt,.-ppc_aes_gcm_decrypt
	-
	-aes_gcm_out:
	-
	- mr 3, 11 # return count
	-
	- RESTORE_REGS
	- blr
	-.size aes_gcm_out,.-aes_gcm_out
	-
	-.rodata
	-.align 4
	-# for vector permute and xor
	-permx:
	-.long 0x4c5d6e7f, 0x08192a3b, 0xc4d5e6f7, 0x8091a2b3

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