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D23969.1794654046.diff
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Index: head/lib/libc/powerpc64/string/bcopy_resolver.c
===================================================================
--- head/lib/libc/powerpc64/string/bcopy_resolver.c
+++ head/lib/libc/powerpc64/string/bcopy_resolver.c
@@ -66,7 +66,7 @@
* Since POWER ISA 2.07B this is solved transparently
* by the hardware
*/
- if (cpu_features2 & PPC_FEATURE2_ARCH_2_07)
+ if (cpu_features2 & PPC_FEATURE_HAS_VSX)
return (FN_NAME_VSX);
else
return (FN_NAME_NOVSX);
Index: head/lib/libc/powerpc64/string/memcpy.S
===================================================================
--- head/lib/libc/powerpc64/string/memcpy.S
+++ head/lib/libc/powerpc64/string/memcpy.S
@@ -39,6 +39,11 @@
#define BLOCK_BYTES (1 << BLOCK_BITS)
#define BLOCK_MASK (BLOCK_BYTES - 1)
+/* Minimum 8 byte alignment, to avoid cache-inhibited alignment faults. */
+#ifndef ALIGN_MASK
+#define ALIGN_MASK 0x7
+#endif
+
/*
* r3: dst
* r4: src
@@ -48,6 +53,12 @@
cmpdi %r5, 0 /* len == 0? nothing to do */
beqlr-
+ /* If src and dst are relatively misaligned, do byte copies. */
+ andi. %r8, %r3, ALIGN_MASK
+ andi. %r7, %r4, ALIGN_MASK
+ cmpd %r8, %r7
+ mr %r7, %r5
+ bne+ .Lcopy_remaining_fix_index_byte
mr %r8, %r3 /* save dst */
/* align src */
Index: head/lib/libc/powerpc64/string/memcpy_vsx.S
===================================================================
--- head/lib/libc/powerpc64/string/memcpy_vsx.S
+++ head/lib/libc/powerpc64/string/memcpy_vsx.S
@@ -30,6 +30,7 @@
#define FN_NAME __memcpy_vsx
#define BLOCK_BITS 6
+#define ALIGN_MASK 0xf
/*
* r5: bytes to copy (multiple of BLOCK_BYTES)
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D23969: powerpc/powerpc64: Enforce natural alignment in memcpy
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