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D8092.1794220540.diff
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D8092.1794220540.diff
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Index: head/sys/arm/include/cpu-v6.h
===================================================================
--- head/sys/arm/include/cpu-v6.h
+++ head/sys/arm/include/cpu-v6.h
@@ -347,12 +347,21 @@
/* Broadcasting operations. */
#if __ARM_ARCH >= 7 && defined SMP
+#if defined(CPU_CORTEXA8)
+#define ARM_HAVE_MP_EXTENSIONS (cpuinfo.mp_ext != 0)
+#else
+#define ARM_HAVE_MP_EXTENSIONS 1
+#endif
+
static __inline void
tlb_flush_all(void)
{
dsb();
- _CP15_TLBIALLIS();
+ if (ARM_HAVE_MP_EXTENSIONS)
+ _CP15_TLBIALLIS();
+ else
+ _CP15_TLBIALL();
dsb();
}
@@ -361,7 +370,10 @@
{
dsb();
- _CP15_TLBIASIDIS(CPU_ASID_KERNEL);
+ if (ARM_HAVE_MP_EXTENSIONS)
+ _CP15_TLBIASIDIS(CPU_ASID_KERNEL);
+ else
+ _CP15_TLBIASID(CPU_ASID_KERNEL);
dsb();
}
@@ -372,7 +384,10 @@
KASSERT((va & PAGE_MASK) == 0, ("%s: va %#x not aligned", __func__, va));
dsb();
- _CP15_TLBIMVAAIS(va);
+ if (ARM_HAVE_MP_EXTENSIONS)
+ _CP15_TLBIMVAAIS(va);
+ else
+ _CP15_TLBIMVA(va | CPU_ASID_KERNEL);
dsb();
}
@@ -386,8 +401,13 @@
size));
dsb();
- for (; va < eva; va += PAGE_SIZE)
- _CP15_TLBIMVAAIS(va);
+ if (ARM_HAVE_MP_EXTENSIONS) {
+ for (; va < eva; va += PAGE_SIZE)
+ _CP15_TLBIMVAAIS(va);
+ } else {
+ for (; va < eva; va += PAGE_SIZE)
+ _CP15_TLBIMVA(va | CPU_ASID_KERNEL);
+ }
dsb();
}
#else /* SMP */
@@ -411,19 +431,23 @@
dsb();
va &= ~cpuinfo.dcache_line_mask;
- for ( ; va < eva; va += cpuinfo.dcache_line_size) {
#if __ARM_ARCH >= 7 && defined SMP
- _CP15_DCCMVAU(va);
-#else
- _CP15_DCCMVAC(va);
-#endif
+ if (ARM_HAVE_MP_EXTENSIONS) {
+ for ( ; va < eva; va += cpuinfo.dcache_line_size)
+ _CP15_DCCMVAU(va);
+ } else
+#endif
+ {
+ for ( ; va < eva; va += cpuinfo.dcache_line_size)
+ _CP15_DCCMVAC(va);
}
dsb();
#if __ARM_ARCH >= 7 && defined SMP
- _CP15_ICIALLUIS();
-#else
- _CP15_ICIALLU();
+ if (ARM_HAVE_MP_EXTENSIONS)
+ _CP15_ICIALLUIS();
+ else
#endif
+ _CP15_ICIALLU();
dsb();
isb();
}
@@ -433,10 +457,11 @@
icache_inv_all(void)
{
#if __ARM_ARCH >= 7 && defined SMP
- _CP15_ICIALLUIS();
-#else
- _CP15_ICIALLU();
+ if (ARM_HAVE_MP_EXTENSIONS)
+ _CP15_ICIALLUIS();
+ else
#endif
+ _CP15_ICIALLU();
dsb();
isb();
}
@@ -446,10 +471,11 @@
bpb_inv_all(void)
{
#if __ARM_ARCH >= 7 && defined SMP
- _CP15_BPIALLIS();
-#else
- _CP15_BPIALL();
+ if (ARM_HAVE_MP_EXTENSIONS)
+ _CP15_BPIALLIS();
+ else
#endif
+ _CP15_BPIALL();
dsb();
isb();
}
@@ -462,12 +488,15 @@
dsb();
va &= ~cpuinfo.dcache_line_mask;
- for ( ; va < eva; va += cpuinfo.dcache_line_size) {
#if __ARM_ARCH >= 7 && defined SMP
- _CP15_DCCMVAU(va);
-#else
- _CP15_DCCMVAC(va);
-#endif
+ if (ARM_HAVE_MP_EXTENSIONS) {
+ for ( ; va < eva; va += cpuinfo.dcache_line_size)
+ _CP15_DCCMVAU(va);
+ } else
+#endif
+ {
+ for ( ; va < eva; va += cpuinfo.dcache_line_size)
+ _CP15_DCCMVAC(va);
}
dsb();
}

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