D60990.1793712690.diff
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	diff --git a/sys/amd64/vmm/io/ppt.c b/sys/amd64/vmm/io/ppt.c
	--- a/sys/amd64/vmm/io/ppt.c
	+++ b/sys/amd64/vmm/io/ppt.c
	@@ -401,10 +401,31 @@
	return (false);
	}

	+static bool
	+ppt_is_intel_igd(device_t dev)
	+{
	+
	+ return (pci_get_vendor(dev) == 0x8086 &&
	+ pci_get_class(dev) == PCIC_DISPLAY && pci_get_bus(dev) == 0 &&
	+ pci_get_slot(dev) == 2 && pci_get_function(dev) == 0);
	+}
	+
	static void
	ppt_pci_reset(device_t dev)
	{

	+ /*
	+ * An Intel integrated GPU whose display engine is scanning out (the
	+ * firmware's framebuffer, or the host console on efifb) does not go
	+ * idle for an FLR: the transactions-pending bit stays set after the
	+ * reset and the device keeps fetching with its configuration reset
	+ * underneath it, in the host's IOMMU domain, corrupting host memory.
	+ * Nobody can turn the display off first without a host driver, so do
	+ * not reset it; the guest's driver initializes it anyway.
	+ */
	+ if (ppt_is_intel_igd(dev))
	+ return;
	+
	if (pcie_flr(dev,
	max(pcie_get_max_completion_timeout(dev) / 1000, 10), true))
	return;