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diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c
--- a/sys/amd64/vmm/intel/vmx.c
+++ b/sys/amd64/vmm/intel/vmx.c
@@ -3921,6 +3921,26 @@
VMCLEAR(vmcs);
}
+static void
+vmx_reset_tmr(struct vlapic *vlapic)
+{
+ struct vlapic_vtx *vlapic_vtx;
+ struct vmcs *vmcs;
+
+ KASSERT(!vcpu_is_running(vlapic->vcpu, NULL),
+ ("vmx_reset_tmr: vcpu cannot be running"));
+
+ vlapic_vtx = (struct vlapic_vtx *)vlapic;
+ vmcs = vlapic_vtx->vcpu->vmcs;
+
+ VMPTRLD(vmcs);
+ vmcs_write(VMCS_EOI_EXIT0, 0);
+ vmcs_write(VMCS_EOI_EXIT1, 0);
+ vmcs_write(VMCS_EOI_EXIT2, 0);
+ vmcs_write(VMCS_EOI_EXIT3, 0);
+ VMCLEAR(vmcs);
+}
+
static void
vmx_enable_x2apic_mode_ts(struct vlapic *vlapic)
{
@@ -4121,6 +4141,7 @@
vlapic->ops.pending_intr = vmx_pending_intr;
vlapic->ops.intr_accepted = vmx_intr_accepted;
vlapic->ops.set_tmr = vmx_set_tmr;
+ vlapic->ops.reset_tmr = vmx_reset_tmr;
vlapic->ops.enable_x2apic_mode = vmx_enable_x2apic_mode_vid;
}
diff --git a/sys/amd64/vmm/io/vlapic.c b/sys/amd64/vmm/io/vlapic.c
--- a/sys/amd64/vmm/io/vlapic.c
+++ b/sys/amd64/vmm/io/vlapic.c
@@ -1762,10 +1762,20 @@
void
vlapic_reset_tmr(struct vlapic *vlapic)
{
- int vector;
+ uint32_t *tmrptr;
+ int i, vector;
VLAPIC_CTR0(vlapic, "vlapic resetting all vectors to edge-triggered");
+ if (vlapic->ops.reset_tmr != NULL) {
+ tmrptr = &vlapic->apic_page->tmr0;
+ /* APIC register slots are 16 bytes apart. */
+ for (i = 0; i < 8; i++)
+ tmrptr[i * 4] = 0;
+ (*vlapic->ops.reset_tmr)(vlapic);
+ return;
+ }
+
for (vector = 0; vector <= 255; vector++)
vlapic_set_tmr(vlapic, vector, false);
}
diff --git a/sys/amd64/vmm/io/vlapic_priv.h b/sys/amd64/vmm/io/vlapic_priv.h
--- a/sys/amd64/vmm/io/vlapic_priv.h
+++ b/sys/amd64/vmm/io/vlapic_priv.h
@@ -139,6 +139,7 @@
void (*intr_accepted)(struct vlapic *vlapic, int vector);
void (*post_intr)(struct vlapic *vlapic, int hostcpu);
void (*set_tmr)(struct vlapic *vlapic, int vector, bool level);
+ void (*reset_tmr)(struct vlapic *vlapic);
void (*enable_x2apic_mode)(struct vlapic *vlapic);
};

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