Page Menu
Home
FreeBSD
Search
Configure Global Search
Log In
Files
F175701450
D59891.id187790.diff
No One
Temporary
Actions
View File
Edit File
Delete File
View Transforms
Subscribe
Mute Notifications
Flag For Later
Award Token
Size
14 KB
Referenced Files
None
Subscribers
None
D59891.id187790.diff
View Options
diff --git a/Makefile b/Makefile
--- a/Makefile
+++ b/Makefile
@@ -318,7 +318,7 @@
# exceptions.
.if !defined(TARGET_ARCH) && defined(TARGET)
# T->TA mapping is usually TARGET with arm64 the odd man out
-_TARGET_ARCH= ${TARGET:S/arm64/aarch64/:S/riscv/riscv64/:S/arm/armv7/}
+_TARGET_ARCH= ${TARGET:S/arm64/aarch64/:S/loongarch/loongarch64/:S/riscv/riscv64/:S/arm/armv7/}
.elif !defined(TARGET) && defined(TARGET_ARCH) && \
${TARGET_ARCH} != ${MACHINE_ARCH}
# TA->T mapping is accidentally CPUARCH with aarch64 the odd man out
diff --git a/Makefile.inc1 b/Makefile.inc1
--- a/Makefile.inc1
+++ b/Makefile.inc1
@@ -151,6 +151,7 @@
powerpc \
powerpc64/powerpc \
powerpc64le/powerpc \
+ loongarch64/loongarch \
riscv64/riscv
.if ${TARGET} == ${TARGET_ARCH}
diff --git a/share/mk/bsd.cpu.mk b/share/mk/bsd.cpu.mk
--- a/share/mk/bsd.cpu.mk
+++ b/share/mk/bsd.cpu.mk
@@ -19,6 +19,8 @@
MACHINE_CPU = aim altivec
. elif ${MACHINE_ARCH} == "powerpc64le"
MACHINE_CPU = aim altivec vsx vsx2
+. elif ${MACHINE_CPUARCH} == "loongarch"
+MACHINE_CPU = loongarch
. elif ${MACHINE_CPUARCH} == "riscv"
MACHINE_CPU = riscv
. endif
@@ -343,6 +345,11 @@
LDFLAGS.bfd+= -Wl,--secure-plt
.endif
+.if ${MACHINE_CPUARCH} == "loongarch"
+_CPUCFLAGS = -march=loongarch64 -mabi=lp64d
+LDFLAGS+= -mabi=lp64d
+.endif
+
.if ${MACHINE_CPUARCH} == "riscv"
CFLAGS += -march=rv64imafdc -mabi=lp64d
.endif
diff --git a/share/mk/bsd.endian.mk b/share/mk/bsd.endian.mk
--- a/share/mk/bsd.endian.mk
+++ b/share/mk/bsd.endian.mk
@@ -5,7 +5,8 @@
armv7 \
i386 \
powerpc64le \
- riscv*
+ riscv* \
+ loongarch*
MACHINE_ARCH_LIST.big = \
powerpc \
diff --git a/share/mk/src.opts.mk b/share/mk/src.opts.mk
--- a/share/mk/src.opts.mk
+++ b/share/mk/src.opts.mk
@@ -277,9 +277,10 @@
aarch64 \
arm \
powerpc \
+ loongarch \
riscv \
x86
-__LLVM_TARGET_FILT= C/(amd64|i386)/x86/:C/powerpc.*/powerpc/:C/armv[67]/arm/:C/riscv.*/riscv/
+__LLVM_TARGET_FILT= C/(amd64|i386)/x86/:C/powerpc.*/powerpc/:C/armv[67]/arm/:C/loongarch.*/loongarch/:C/riscv.*/riscv/
.for __llt in ${__LLVM_TARGETS}
# Default enable the given TARGET's LLVM_TARGET support
.if ${__T:${__LLVM_TARGET_FILT}} == ${__llt}
diff --git a/share/mk/sys.mk b/share/mk/sys.mk
--- a/share/mk/sys.mk
+++ b/share/mk/sys.mk
@@ -11,7 +11,7 @@
# and/or endian. This is called MACHINE_CPU in NetBSD, but that's used
# for something different in FreeBSD.
#
-__TO_CPUARCH=C/arm(v[67])?/arm/:C/powerpc(64|64le|spe)/powerpc/:C/riscv64/riscv/
+__TO_CPUARCH=C/arm(v[67])?/arm/:C/powerpc(64|64le|spe)/powerpc/:C/loongarch64/loongarch/:C/riscv64/riscv/
MACHINE_CPUARCH=${MACHINE_ARCH:${__TO_CPUARCH}}
.endif
diff --git a/sys/conf/Makefile.loongarch b/sys/conf/Makefile.loongarch
new file mode 100644
--- /dev/null
+++ b/sys/conf/Makefile.loongarch
@@ -0,0 +1,59 @@
+# Makefile.loongarch -- with config changes.
+# Copyright 1990 W. Jolitz
+# from: @(#)Makefile.i386 7.1 5/10/91
+# from FreeBSD: src/sys/conf/Makefile.i386,v 1.255 2002/02/20 23:35:49
+#
+# Makefile for FreeBSD
+#
+# TODO: copy pasted from aarch64, needs to be
+# constructed from a machine description:
+# config machineid
+# Most changes should be made in the machine description
+# /sys/loongarch/conf/``machineid''
+# after which you should do
+# config machineid
+# Generic makefile changes should be made in
+# /sys/conf/Makefile.loongarch
+# after which config should be rerun for all machines.
+#
+
+# Which version of config(8) is required.
+%VERSREQ= 600012
+
+.if !defined(S)
+S= ../../..
+.endif
+.include "$S/conf/kern.pre.mk"
+
+INCLUDES+= -I$S/contrib/libfdt -I$S/contrib/device-tree/include
+
+# Set the ELF LMA to the kernel load address used when booting with QEMU's
+# -kernel flag, so the kernel can be loaded directly rather than wrapped by
+# firmware.
+# We set this value using --defsym rather than hardcoding it in the linker
+# script so that different kernel configs can override the load address.
+KERNEL_LMA?= 0x80200000
+LDFLAGS+= --defsym='kernel_lma=${KERNEL_LMA}'
+
+.if !empty(DDB_ENABLED) || !empty(DTRACE_ENABLED) || !empty(HWPMC_ENABLED)
+CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls
+.endif
+
+# hack because genassym.c includes sys/bus.h which includes these.
+genassym.o: bus_if.h device_if.h
+
+%BEFORE_DEPEND
+
+%OBJS
+
+%FILES.c
+
+%FILES.s
+
+%FILES.m
+
+%CLEAN
+
+%RULES
+
+.include "$S/conf/kern.post.mk"
diff --git a/sys/conf/files.loongarch b/sys/conf/files.loongarch
new file mode 100644
--- /dev/null
+++ b/sys/conf/files.loongarch
@@ -0,0 +1,71 @@
+crypto/des/des_enc.c optional netsmb
+dev/ofw/ofw_cpu.c optional fdt
+dev/ofw/ofw_pcib.c optional pci fdt
+dev/pci/pci_dw.c optional pci fdt
+dev/pci/pci_dw_if.m optional pci fdt
+dev/pci/pci_host_generic_fdt.c optional pci fdt
+dev/uart/uart_cpu_acpi.c optional uart acpi
+dev/uart/uart_cpu_loongarch.c optional uart
+dev/acpica/acpi_bus_if.m optional acpi
+dev/acpica/acpi_if.m optional acpi
+kern/msi_if.m standard
+kern/pic_if.m standard
+kern/link_elf_obj.c standard
+kern/subr_devmap.c standard
+kern/subr_dummy_vdso_tc.c standard
+kern/subr_intr.c standard
+kern/subr_physmem.c standard
+libkern/bcopy.c standard
+libkern/memcmp.c standard
+libkern/memset.c standard
+libkern/strcmp.c standard
+libkern/strlen.c standard
+libkern/strncmp.c standard
+loongarch/loongarch/autoconf.c standard
+loongarch/loongarch/bus_machdep.c standard
+loongarch/loongarch/bus_space_asm.S standard
+loongarch/loongarch/busdma_bounce.c standard
+loongarch/loongarch/busdma_machdep.c standard
+loongarch/loongarch/clock.c standard
+loongarch/loongarch/copyinout.S standard
+loongarch/loongarch/cpufunc_asm.S standard
+loongarch/loongarch/db_disasm.c optional ddb
+loongarch/loongarch/db_interface.c optional ddb
+loongarch/loongarch/db_trace.c optional ddb
+loongarch/loongarch/dump_machdep.c standard
+loongarch/loongarch/elf_machdep.c standard
+loongarch/loongarch/exception.S standard
+loongarch/loongarch/exec_machdep.c standard
+loongarch/loongarch/gdb_machdep.c optional gdb
+loongarch/loongarch/intr_machdep.c standard
+loongarch/loongarch/identcpu.c standard
+loongarch/loongarch/locore.S standard no-obj
+loongarch/loongarch/machdep.c standard
+loongarch/loongarch/minidump_machdep.c standard
+loongarch/loongarch/mp_machdep.c optional smp
+loongarch/loongarch/mem.c standard
+loongarch/loongarch/nexus.c standard
+loongarch/loongarch/ofw_machdep.c optional fdt
+loongarch/loongarch/pmap.c standard
+loongarch/loongarch/ptrace_machdep.c standard
+loongarch/loongarch/loongarch_syscon.c optional syscon loongarch_syscon fdt
+loongarch/loongarch/stack_machdep.c optional ddb | stack
+loongarch/loongarch/support.S standard
+loongarch/loongarch/swtch.S standard
+loongarch/loongarch/sys_machdep.c standard
+loongarch/loongarch/trap.c standard
+loongarch/loongarch/watch.c standard
+loongarch/loongarch/timer.c standard
+loongarch/loongarch/uio_machdep.c standard
+loongarch/loongarch/unwind.c optional ddb | kdtrace_hooks | stack
+loongarch/loongarch/vm_machdep.c standard
+loongarch/loongarch/cpuic.c standard
+loongarch/loongarch/eioic.c standard
+loongarch/loongarch/pch_pic.c standard
+dev/pci/pci_host_generic.c optional pci
+dev/pci/pci_host_generic_acpi.c optional pci acpi
+dev/acpica/acpi_pcib.c optional acpi pci
+dev/acpica/acpi_pci_link.c optional acpi pci
+
+# Zstd
+contrib/zstd/lib/freebsd/zstd_kfreebsd.c optional zstdio compile-with ${ZSTD_C}
diff --git a/sys/conf/kern.mk b/sys/conf/kern.mk
--- a/sys/conf/kern.mk
+++ b/sys/conf/kern.mk
@@ -412,4 +412,5 @@
LD_EMULATION_powerpc64= elf64ppc_fbsd
LD_EMULATION_powerpc64le= elf64lppc_fbsd
LD_EMULATION_riscv64= elf64lriscv
+LD_EMULATION_loongarch64= elf64loongarch
LD_EMULATION=${LD_EMULATION_${MACHINE_ARCH}}
diff --git a/sys/conf/kmod.mk b/sys/conf/kmod.mk
--- a/sys/conf/kmod.mk
+++ b/sys/conf/kmod.mk
@@ -79,11 +79,15 @@
.SUFFIXES: .out .o .c .cc .cxx .C .y .l .s .S .m
-# amd64 uses direct linking for kmod, all others use shared binaries
-.if ${MACHINE_CPUARCH} != amd64
-__KLD_SHARED=yes
-.else
+# amd64 and loongarch use direct linking for kmod, all others use shared
+# binaries. LoongArch needs direct linking because the shared -Bshareable
+# link localizes and folds module-internal VNET/DPCPU symbol references,
+# leaving no dynamic relocation for the kernel module linker to apply when
+# those sections are copied to modspace.
+.if ${MACHINE_CPUARCH} == amd64 || ${MACHINE_CPUARCH} == loongarch
__KLD_SHARED=no
+.else
+__KLD_SHARED=yes
.endif
.if !empty(CFLAGS:M-O[23s]) && empty(CFLAGS:M-fno-strict-aliasing)
@@ -167,7 +171,8 @@
.endif
.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv" || \
- ${MACHINE_CPUARCH} == "powerpc" || ${MACHINE_CPUARCH} == "i386"
+ ${MACHINE_CPUARCH} == "powerpc" || ${MACHINE_CPUARCH} == "i386" || \
+ ${MACHINE_CPUARCH} == "loongarch"
CFLAGS+= -fPIC
.endif
@@ -178,6 +183,20 @@
LDFLAGS+= --no-relax
.endif
+.if ${MACHINE_CPUARCH} == "loongarch"
+# LoongArch normally accesses external/global data through the GOT
+# (pcalau12i + ld.d with R_LARCH_GOT_PC relocations). The kernel module
+# linker has no GOT at runtime, so use -fdirect-access-external-data to
+# emit direct PC-relative accesses (R_LARCH_PCALA_*) instead. These are
+# resolved directly by the kernel module linker and work for both
+# address-taking (_VNET_PTR) and value loads, without any GOT slots.
+CFLAGS+= -fdirect-access-external-data
+# Keep -r link-time relaxation from folding the (now direct) PC-relative
+# references of locally-defined symbols into self-contained sequences that
+# carry no relocation; the kernel module linker must be able to patch them.
+LDFLAGS+= --no-relax
+.endif
+
# Temporary workaround for PR 196407, which contains the fascinating details.
# Don't allow clang to use fpu instructions or registers in kernel modules.
.if ${MACHINE_CPUARCH} == arm
diff --git a/sys/conf/ldscript.loongarch b/sys/conf/ldscript.loongarch
new file mode 100644
--- /dev/null
+++ b/sys/conf/ldscript.loongarch
@@ -0,0 +1,133 @@
+OUTPUT_ARCH(loongarch64)
+ENTRY(_start)
+
+SEARCH_DIR(/usr/lib);
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = kernbase;
+ /* The load address kernel_lma is set using --defsym= on the command line. */
+ .text : AT(kernel_lma)
+ {
+ *(.text)
+ *(.stub)
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.gnu.linkonce.t*)
+ } =0x9090
+ _etext = .;
+ PROVIDE (etext = .);
+ .fini : { *(.fini) } =0x9090
+ .rodata : { *(.rodata) *(.gnu.linkonce.r*) }
+ .rodata1 : { *(.rodata1) }
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .gnu.version : { *(.gnu.version) }
+ .gnu.version_d : { *(.gnu.version_d) }
+ .gnu.version_r : { *(.gnu.version_r) }
+ .note.gnu.build-id : {
+ PROVIDE (__build_id_start = .);
+ *(.note.gnu.build-id)
+ PROVIDE (__build_id_end = .);
+ }
+ .rel.text :
+ { *(.rel.text) *(.rel.gnu.linkonce.t*) }
+ .rela.text :
+ { *(.rela.text) *(.rela.gnu.linkonce.t*) }
+ .rel.data :
+ { *(.rel.data) *(.rel.gnu.linkonce.d*) }
+ .rela.data :
+ { *(.rela.data) *(.rela.gnu.linkonce.d*) }
+ .rel.rodata :
+ { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
+ .rela.rodata :
+ { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.init : { *(.rel.init) }
+ .rela.init : { *(.rela.init) }
+ .rel.fini : { *(.rel.fini) }
+ .rela.fini : { *(.rela.fini) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) } =0x9090
+ .plt : { *(.plt) }
+
+ /* Adjust the address for the data segment. We want to adjust up to
+ the same address within the page on the next page up. */
+ . = ALIGN(0x1000) + (. & (0x1000 - 1)) ;
+ .data :
+ {
+ *(.data)
+ *(.gnu.linkonce.d*)
+ }
+ .data1 : { *(.data1) }
+ . = ALIGN(32 / 8);
+ .init_array :
+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*)))
+ KEEP (*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ }
+ .fini_array :
+ {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*)))
+ KEEP (*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ }
+ _start_ctors = .;
+ PROVIDE (start_ctors = .);
+ .ctors :
+ {
+ *(.ctors)
+ }
+ _stop_ctors = .;
+ PROVIDE (stop_ctors = .);
+ .dtors :
+ {
+ *(.dtors)
+ }
+ .got : { *(.got.plt) *(.got) }
+ .dynamic : { *(.dynamic) }
+ /* We want the small data sections together, so single-instruction offsets
+ can access them all, and initialized data all before uninitialized, so
+ we can shorten the on-disk segment size. */
+ . = ALIGN(8);
+ .sdata :
+ {
+ *(.sdata)
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+ /* Ensure __bss_start is associated with the next section in case orphan
+ sections are placed directly after .sdata, as has been seen to happen with
+ LLD. */
+ . = ALIGN(8);
+ __bss_start = .;
+ .sbss : { *(.sbss) *(.scommon) }
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ . = ALIGN(8);
+ _end = . ;
+ PROVIDE (end = .);
+
+ /* Debug */
+ INCLUDE debuginfo.ldscript
+
+ .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/sys/conf/options.loongarch b/sys/conf/options.loongarch
new file mode 100644
--- /dev/null
+++ b/sys/conf/options.loongarch
@@ -0,0 +1,3 @@
+
+LoongArch opt_global.h # For cpu LoongArch to work
+INTRNG opt_global.h
diff --git a/sys/modules/Makefile b/sys/modules/Makefile
--- a/sys/modules/Makefile
+++ b/sys/modules/Makefile
@@ -668,7 +668,8 @@
.endif
.if ${MK_SOURCELESS_UCODE} != "no" && ${MACHINE_CPUARCH} != "arm" && \
- ${MACHINE_ARCH} != "powerpc" && ${MACHINE_CPUARCH} != "riscv"
+ ${MACHINE_ARCH} != "powerpc" && ${MACHINE_CPUARCH} != "riscv" && \
+ ${MACHINE_CPUARCH} != "loongarch"
_cxgbe= cxgbe
.endif
File Metadata
Details
Attached
Mime Type
text/plain
Expires
Tue, Oct 13, 3:24 PM (9 h, 53 m)
Storage Engine
blob
Storage Format
Raw Data
Storage Handle
40758013
Default Alt Text
D59891.id187790.diff (14 KB)
Attached To
Mode
D59891: build: add LoongArch build infrastructure
Attached
Detach File
Event Timeline
Log In to Comment