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D59297.id185606.diff
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diff --git a/sys/dev/ufshci/ufshci_acpi.c b/sys/dev/ufshci/ufshci_acpi.c
--- a/sys/dev/ufshci/ufshci_acpi.c
+++ b/sys/dev/ufshci/ufshci_acpi.c
@@ -51,8 +51,12 @@
uint32_t ref_clk;
uint32_t quirks;
} ufshci_acpi_devices[] = {
+ /*
+ * The SoC feeds the device 38.4 MHz from its CXO. The firmware
+ * has no property for it. Verified on the Galaxy Book 4 Edge.
+ */
{ "QCOM24A5", "Qualcomm Snapdragon X Elite UFS Host Controller",
- UFSHCI_REF_CLK_19_2MHz,
+ UFSHCI_REF_CLK_38_4MHz,
UFSHCI_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH |
UFSHCI_QUIRK_BROKEN_LSDBS_MCQS_CAP },
{ 0x00000000, NULL, 0, 0 }
diff --git a/sys/dev/ufshci/ufshci_dev.c b/sys/dev/ufshci/ufshci_dev.c
--- a/sys/dev/ufshci/ufshci_dev.c
+++ b/sys/dev/ufshci/ufshci_dev.c
@@ -242,10 +242,27 @@
{
int error;
uint8_t index, selector;
+ uint64_t value;
index = 0; /* bRefClkFreq is device type attribute */
selector = 0; /* bRefClkFreq is device type attribute */
+ /*
+ * bRefClkFreq is a persistent attribute. Skip the write when
+ * the device already holds the wanted value.
+ */
+ error = ufshci_dev_read_attribute(ctrlr, UFSHCI_ATTR_B_REF_CLK_FREQ,
+ index, selector, &value);
+ if (error != 0) {
+ ufshci_printf(ctrlr, "bRefClkFreq read failed, writing %u\n",
+ ctrlr->ref_clk);
+ } else if ((uint32_t)value == ctrlr->ref_clk) {
+ return (0);
+ } else {
+ ufshci_printf(ctrlr, "changing bRefClkFreq from %u to %u\n",
+ (uint32_t)value, ctrlr->ref_clk);
+ }
+
error = ufshci_dev_write_attribute(ctrlr, UFSHCI_ATTR_B_REF_CLK_FREQ,
index, selector, ctrlr->ref_clk);
if (error)
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D59297: ufshci: fix the Snapdragon X Elite reference clock
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