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Index: sys/riscv/riscv/exception.S
===================================================================
--- sys/riscv/riscv/exception.S
+++ sys/riscv/riscv/exception.S
@@ -104,6 +104,11 @@
sd t0, (TF_SEPC)(sp)
csrr t0, sstatus
sd t0, (TF_SSTATUS)(sp)
+.if \mode == 1
+ /* Disable user address access for supervisor mode exceptions. */
+ li t0, SSTATUS_SUM
+ csrc sstatus, t0
+.endif
csrr t0, stval
sd t0, (TF_STVAL)(sp)
csrr t0, scause

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