D57054.id.diff
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D57054.id.diff
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	diff --git a/sys/x86/x86/ucode.c b/sys/x86/x86/ucode.c
	--- a/sys/x86/x86/ucode.c
	+++ b/sys/x86/x86/ucode.c
	@@ -133,14 +133,13 @@
	wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uint64_t)(uintptr_t)data);
	break;
	case EARLY:
	-#ifdef __amd64__
	- wrmsr_early_safe_start();
	- if (wrmsr_early_safe(MSR_BIOS_UPDT_TRIG,
	- (uint64_t)(uintptr_t)data) != 0)
	- ucode_error = LOAD_FAILED;
	- wrmsr_early_safe_end();
	- break;
	-#endif
	+ /*
	+ * Intel's MSR_BIOS_UPDT_TRIG does not issue #GP, so the
	+ * wrmsr_early_safe() fault-handling machinery is unnecessary
	+ * and could introduce risks. Fall through to the bare wrmsr
	+ * path.
	+ */
	+ /* FALLTHROUGH */
	case UNSAFE:
	wrmsr(MSR_BIOS_UPDT_TRIG, (uint64_t)(uintptr_t)data);
	break;