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diff --git a/sys/dev/hwpmc/hwpmc_ibs.h b/sys/dev/hwpmc/hwpmc_ibs.h
--- a/sys/dev/hwpmc/hwpmc_ibs.h
+++ b/sys/dev/hwpmc/hwpmc_ibs.h
@@ -204,6 +204,7 @@
#define IBS_OP_DATA3_L2MISS (1ULL << 20)
#define IBS_OP_DATA3_DCPHYADDRVALID (1ULL << 18) /* DC Physical Address */
#define IBS_OP_DATA3_DCLINADDRVALID (1ULL << 17) /* DC Linear Address */
+#define IBS_OP_DATA3_DCMISSNOMABALLOC (1ULL << 16) /* DC Miss No MAB Alloc */
#define IBS_OP_DATA3_LOCKEDOP (1ULL << 15) /* DC Locked Op */
#define IBS_OP_DATA3_UCMEMACCESS (1ULL << 14) /* DC UC Memory Access */
#define IBS_OP_DATA3_WCMEMACCESS (1ULL << 13) /* DC WC Memory Access */
@@ -219,6 +220,7 @@
#define IBS_OP_DATA3_PGSZ(_d) (((_d) >> 4) & 0x3)
#define IBS_OP_DATA3_TO_TLBREFILLLAT(_c) (((_c) >> 48) & 0x0000ffff)
#define IBS_OP_DATA3_TO_OPENMEMREQS(_c) (((_c) >> 26) & 0x003f)
+#define IBS_OP_DATA3_OPENMEMREQS_MASK (0x003fULL << 26) /* Open Mem Reqs field */
#define IBSOPDATA2_VALIDMASK (IBS_OP_DATA3_LOAD | IBS_OP_DATA3_DCMISS | IBS_OP_DATA3_L2MISS)
diff --git a/usr.sbin/pmc/cmd_pmc_frontend.cc b/usr.sbin/pmc/cmd_pmc_frontend.cc
--- a/usr.sbin/pmc/cmd_pmc_frontend.cc
+++ b/usr.sbin/pmc/cmd_pmc_frontend.cc
@@ -80,15 +80,30 @@
#include "display.hh"
#include "view.hh"
+/*
+ * L1TLB page-size labels. Erratum #1347 (Zen3-B0) shifts the encoding:
+ * architectural {4K,2M,1G,rsvd} becomes {4K,16K,2M,1G}.
+ */
+static const char *
+frontend_pgsz_label(uint8_t code, bool err1347)
+{
+ static const char *arch[4] = { "4K", "2M", "1G", "rsvd" };
+ static const char *remap[4] = { "4K", "16K", "2M", "1G" };
+ return (err1347 ? remap : arch)[code & 0x3];
+}
+
struct frontend {
syminfo func;
int64_t ocmiss;
+ int64_t icmiss;
int64_t l2miss;
int64_t l3miss;
int64_t l1tlbmiss;
int64_t l2tlbmiss;
int64_t latency;
int64_t samples;
+ int64_t pgsz_counts[4]; /* indexed by 2-bit code */
+ int64_t pgsz_samples; /* samples with valid pgsz */
};
static int sortcol = 2;
@@ -125,6 +140,8 @@
*/
if (f.ctl & IBS_FETCH_CTL_OPCACHEMISS)
inst->second.ocmiss += 1;
+ if (f.ctl & IBS_FETCH_CTL_ICMISS)
+ inst->second.icmiss += 1;
if (f.ctl & IBS_FETCH_CTL_L2MISS)
inst->second.l2miss += 1;
if (f.ctl & IBS_FETCH_CTL_L3MISS)
@@ -137,6 +154,11 @@
inst->second.latency += IBS_FETCH_CTL_TO_LAT(f.ctl);
inst->second.samples += 1;
+
+ if (f.ctl & IBS_FETCH_CTL_PHYSADDRVALID) {
+ inst->second.pgsz_counts[IBS_FETCH_CTL_TO_PGSZ(f.ctl)] += 1;
+ inst->second.pgsz_samples += 1;
+ }
}
virtual void
@@ -151,10 +173,14 @@
t.addcolumn("Latency");
t.addcolumn("Samples");
t.addcolumn("OC Miss");
+ /* Erratum #1238: IcMiss is unreliable, omit the column. */
+ if (!ibs_errata_1238)
+ t.addcolumn("IC Miss");
t.addcolumn("L2 Miss");
t.addcolumn("L3 Miss");
t.addcolumn("L1 TLB Miss");
t.addcolumn("L2 TLB Miss");
+ t.addcolumn("Top PgSz");
for (auto &kv : samples) {
std::vector<field> r;
@@ -164,10 +190,24 @@
r.emplace_back(kv.second.latency);
r.emplace_back(kv.second.samples);
r.emplace_back(kv.second.ocmiss, kv.second.samples, true);
+ if (!ibs_errata_1238)
+ r.emplace_back(kv.second.icmiss,
+ kv.second.samples, true);
r.emplace_back(kv.second.l2miss, kv.second.samples, true);
r.emplace_back(kv.second.l3miss, kv.second.samples, true);
r.emplace_back(kv.second.l1tlbmiss, kv.second.samples, true);
r.emplace_back(kv.second.l2tlbmiss, kv.second.samples, true);
+ {
+ int top = 0;
+ for (int i = 1; i < 4; i++)
+ if (kv.second.pgsz_counts[i] >
+ kv.second.pgsz_counts[top])
+ top = i;
+ const char *lbl = kv.second.pgsz_samples ?
+ frontend_pgsz_label(top, ibs_errata_1347) :
+ "-";
+ r.emplace_back(std::string(lbl));
+ }
t.addrow(r);
}
diff --git a/usr.sbin/pmc/cpuid.hh b/usr.sbin/pmc/cpuid.hh
new file mode 100644
--- /dev/null
+++ b/usr.sbin/pmc/cpuid.hh
@@ -0,0 +1,47 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2026 Advanced Micro Devices, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef __CPUID_HH__
+#define __CPUID_HH__
+
+/*
+ * CPUID leaf 1 eax decode, copied from machine/specialreg.h. The values are
+ * decoded from the log rather than the host CPU, so detection has to work on
+ * any architecture pmc(8) is built for, not just x86.
+ */
+#define IBS_CPUID_VENDOR_AMD "AuthenticAMD"
+#define IBS_CPUID_MODEL 0x000000f0
+#define IBS_CPUID_FAMILY 0x00000f00
+#define IBS_CPUID_EXT_MODEL 0x000f0000
+#define IBS_CPUID_EXT_FAMILY 0x0ff00000
+#define IBS_CPUID_TO_MODEL(id) \
+ ((((id) & IBS_CPUID_MODEL) >> 4) | (((id) & IBS_CPUID_EXT_MODEL) >> 12))
+#define IBS_CPUID_TO_FAMILY(id) \
+ ((((id) & IBS_CPUID_FAMILY) >> 8) + (((id) & IBS_CPUID_EXT_FAMILY) >> 20))
+
+#endif /* __CPUID_HH__ */
diff --git a/usr.sbin/pmc/view.hh b/usr.sbin/pmc/view.hh
--- a/usr.sbin/pmc/view.hh
+++ b/usr.sbin/pmc/view.hh
@@ -401,6 +401,11 @@
std::string buildid;
std::vector<pmcinfox> extpmcinfo;
std::map<uint32_t, cpuidleaf> cpuid; // x86 Only
+ // AMD IBS errata, one flag per erratum
+ bool ibs_errata_1197 = false;
+ bool ibs_errata_1238 = false;
+ bool ibs_errata_1293 = false;
+ bool ibs_errata_1347 = false;
private:
image loadimage(const std::string &path);
void mapimage(pid_t pid, const image &im, uint64_t linkaddr);
diff --git a/usr.sbin/pmc/view.cc b/usr.sbin/pmc/view.cc
--- a/usr.sbin/pmc/view.cc
+++ b/usr.sbin/pmc/view.cc
@@ -39,6 +39,7 @@
#include <inttypes.h>
#include <libelf.h>
#include <pmclog.h>
+#include <string.h>
#include <sysexits.h>
#include <unistd.h>
@@ -52,6 +53,7 @@
#include <unordered_set>
#include <dev/hwpmc/hwpmc_ibs.h>
+#include "cpuid.hh"
#include "util.hh"
#include "view.hh"
@@ -210,6 +212,29 @@
delete[] cpuidinfo;
+ /*
+ * Detect AMD Family 19h (Zen3) Model 00h-0Fh, affected by IBS errata
+ * #1197/#1238/#1293/#1347.
+ */
+ auto vend = cpuid.find(0x0);
+ auto leaf1 = cpuid.find(0x1);
+ if (vend != cpuid.end() && leaf1 != cpuid.end()) {
+ char vstr[13];
+ memcpy(vstr + 0, &vend->second.ebx, 4);
+ memcpy(vstr + 4, &vend->second.edx, 4);
+ memcpy(vstr + 8, &vend->second.ecx, 4);
+ vstr[12] = '\0';
+ uint32_t sig = leaf1->second.eax;
+ if (strncmp(vstr, IBS_CPUID_VENDOR_AMD, 12) == 0 &&
+ IBS_CPUID_TO_FAMILY(sig) == 0x19 &&
+ IBS_CPUID_TO_MODEL(sig) <= 0x0F) {
+ ibs_errata_1197 = true;
+ ibs_errata_1238 = true;
+ ibs_errata_1293 = true;
+ ibs_errata_1347 = true;
+ }
+ }
+
return 0;
}
@@ -842,10 +867,20 @@
// Advanced filters for AMD IBS
if (ibsf.len) {
+ /* Erratum #1197: ignore fetch samples with zero linear addr. */
+ if (ibs_errata_1197 && ibsf.linaddr == 0)
+ return;
if (filter.ibs_ldlat > IBS_FETCH_CTL_TO_LAT(ibsf.ctl))
return;
callchain(p, ibsf, cc, len);
} else if (ibso.len) {
+ /* Erratum #1293: zero fields that are unreliable on Zen3-B0. */
+ if (ibs_errata_1293 && (ibso.data3 & (IBS_OP_DATA3_PREFETCH |
+ IBS_OP_DATA3_DCMISSNOMABALLOC)) != 0) {
+ ibso.data2 = 0;
+ ibso.data3 &= ~(IBS_OP_DATA3_L2MISS |
+ IBS_OP_DATA3_OPENMEMREQS_MASK);
+ }
if (filter.ibs_oplat > IBS_OP_DATA_TO_COMPTORET(ibso.data))
return;
if (filter.ibs_ldlat > IBS_OP_DATA3_TO_DCLAT(ibso.data3))

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