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Index: sys/x86/iommu/busdma_dmar.c
===================================================================
--- sys/x86/iommu/busdma_dmar.c
+++ sys/x86/iommu/busdma_dmar.c
@@ -112,11 +112,11 @@
/*
* Given original device, find the requester ID that will be seen by
- * the DMAR unit and used for page table lookup. PCI bridges may take
+ * the IOMMU unit and used for page table lookup. PCI bridges may take
* ownership of transactions from downstream devices, so it may not be
* the same as the BSF of the target device. In those cases, all
* devices downstream of the bridge must share a single mapping
- * domain, and must collectively be assigned to use either DMAR or
+ * domain, and must collectively be assigned to use either IOMMU or
* bounce mapping.
*/
device_t
@@ -135,7 +135,7 @@
/*
* Walk the bridge hierarchy from the target device to the
- * host port to find the translating bridge nearest the DMAR
+ * host port to find the translating bridge nearest the IOMMU
* unit.
*/
for (;;) {
@@ -173,7 +173,7 @@
} else {
/*
* Device is not PCIe, it cannot be seen as a
- * requester by DMAR unit. Check whether the
+ * requester by IOMMU unit. Check whether the
* bridge is PCIe.
*/
bridge_is_pcie = pci_find_cap(pcib, PCIY_EXPRESS,
@@ -243,8 +243,8 @@
/*
* If the user requested the IOMMU disabled for the device, we
- * cannot disable the DMAR, due to possibility of other
- * devices on the same DMAR still requiring translation.
+ * cannot disable the IOMMU unit, due to possibility of other
+ * devices on the same IOMMU unit still requiring translation.
* Instead provide the identity mapping for the device
* context.
*/
@@ -279,13 +279,16 @@
bus_dma_tag_t res;
unit = iommu_find(child, bootverbose);
- /* Not in scope of any DMAR ? */
+ /* Not in scope of any IOMMU ? */
if (unit == NULL)
return (NULL);
if (!unit->dma_enabled)
return (NULL);
+
+#if defined(__amd64__) || defined(__i386__)
dmar_quirks_pre_use(unit);
dmar_instantiate_rmrr_ctxs(unit);
+#endif
ctx = iommu_instantiate_ctx(unit, child, false);
res = ctx == NULL ? NULL : (bus_dma_tag_t)ctx->tag;
@@ -536,7 +539,7 @@
bus_size_t buflen1;
int error, idx, gas_flags, seg;
- KASSERT(offset < DMAR_PAGE_SIZE, ("offset %d", offset));
+ KASSERT(offset < IOMMU_PAGE_SIZE, ("offset %d", offset));
if (segs == NULL)
segs = tag->segments;
ctx = tag->ctx;
@@ -621,7 +624,7 @@
idx += OFF_TO_IDX(trunc_page(offset + buflen1));
offset += buflen1;
- offset &= DMAR_PAGE_MASK;
+ offset &= IOMMU_PAGE_MASK;
buflen -= buflen1;
}
if (error == 0)
@@ -841,7 +844,7 @@
}
/*
- * The limitations of busdma KPI forces the dmar to perform the actual
+ * The limitations of busdma KPI forces the iommu to perform the actual
* unload, consisting of the unmapping of the map entries page tables,
* from the delayed context on i386, since page table page mapping
* might require a sleep to be successfull. The unfortunate
Index: sys/x86/iommu/intel_reg.h
===================================================================
--- sys/x86/iommu/intel_reg.h
+++ sys/x86/iommu/intel_reg.h
@@ -41,6 +41,9 @@
#define DMAR_NPTEPGSHIFT 9
#define DMAR_PTEMASK (DMAR_NPTEPG - 1)
+#define IOMMU_PAGE_SIZE DMAR_PAGE_SIZE
+#define IOMMU_PAGE_MASK DMAR_PAGE_MASK
+
typedef struct dmar_root_entry {
uint64_t r1;
uint64_t r2;

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