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diff --git a/sys/dev/sdhci/sdhci.h b/sys/dev/sdhci/sdhci.h
--- a/sys/dev/sdhci/sdhci.h
+++ b/sys/dev/sdhci/sdhci.h
@@ -95,6 +95,8 @@
#define SDHCI_QUIRK_MMC_HS400_IF_CAN_SDR104 (1 << 29)
/* SDMA boundary in SDHCI_BLOCK_SIZE broken - use front-end supplied value. */
#define SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY (1 << 30)
+/* Controller doesn't fire Transfer Complete on R1B busy de-assert. */
+#define SDHCI_QUIRK_NO_BUSY_IRQ (1U << 31)
/*
* Controller registers
diff --git a/sys/dev/sdhci/sdhci.c b/sys/dev/sdhci/sdhci.c
--- a/sys/dev/sdhci/sdhci.c
+++ b/sys/dev/sdhci/sdhci.c
@@ -1918,6 +1918,18 @@
slot->curcmd->resp[0], slot->curcmd->resp[1],
slot->curcmd->resp[2], slot->curcmd->resp[3]);
+ /*
+ * NO_BUSY_IRQ quirk: on hardware that doesn't fire Transfer Complete
+ * when the R1B busy signal releases, we can't wait for it. Treat an
+ * R1B-without-data command as complete at response time; the next
+ * command's sdhci_start_command inhibit polling (CIHB/CDIHB) will
+ * naturally wait for the card to release DAT0 busy before issuing.
+ */
+ if ((slot->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) &&
+ (slot->curcmd->flags & MMC_RSP_BUSY) &&
+ slot->curcmd->data == NULL)
+ slot->data_done = 1;
+
/* If data ready - finish. */
if (slot->data_done)
sdhci_start(slot);
diff --git a/sys/dev/sdhci/sdhci_fsl_fdt.c b/sys/dev/sdhci/sdhci_fsl_fdt.c
--- a/sys/dev/sdhci/sdhci_fsl_fdt.c
+++ b/sys/dev/sdhci/sdhci_fsl_fdt.c
@@ -1020,6 +1020,17 @@
sc->vendor_ver = (RD4(sc, SDHCI_FSL_HOST_VERSION) &
SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
+ /*
+ * Pre-V23 eSDHC doesn't assert Transfer Complete when the card
+ * releases DAT0 busy after an R1B response. Enable the core's
+ * NO_BUSY_IRQ short-circuit so R1B-without-data commands don't
+ * hang waiting for a TC that never arrives; the subsequent
+ * command's CIHB/CDIHB inhibit poll waits for busy release
+ * before actually issuing.
+ */
+ if (sc->vendor_ver <= SDHCI_FSL_VENDOR_V22)
+ sc->slot.quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
+
sdhci_fsl_fdt_of_parse(dev);
sc->maxclk_hz = host->f_max ? host->f_max : sc->baseclk_hz;

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