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diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -2441,12 +2441,6 @@
reg &= ~(CTR_DLINE_MASK | CTR_ILINE_MASK);
switch(CTR_L1IP_VAL(reg)) {
- case CTR_L1IP_VPIPT:
- sbuf_printf(sb, "VPIPT");
- break;
- case CTR_L1IP_AIVIVT:
- sbuf_printf(sb, "AIVIVT");
- break;
case CTR_L1IP_VIPT:
sbuf_printf(sb, "VIPT");
break;
@@ -2817,9 +2811,6 @@
switch (CTR_L1IP_VAL(ctr)) {
case CTR_L1IP_PIPT:
break;
- case CTR_L1IP_VPIPT:
- icache_vmid = true;
- break;
default:
case CTR_L1IP_VIPT:
icache_aliasing = true;
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -388,8 +388,6 @@
#define CTR_L1IP_SHIFT 14
#define CTR_L1IP_MASK (0x3 << CTR_L1IP_SHIFT)
#define CTR_L1IP_VAL(reg) ((reg) & CTR_L1IP_MASK)
-#define CTR_L1IP_VPIPT (0 << CTR_L1IP_SHIFT)
-#define CTR_L1IP_AIVIVT (1 << CTR_L1IP_SHIFT)
#define CTR_L1IP_VIPT (2 << CTR_L1IP_SHIFT)
#define CTR_L1IP_PIPT (3 << CTR_L1IP_SHIFT)
#define CTR_ILINE_SHIFT 0

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