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Index: sys/dev/nvme/nvme_qpair.c
===================================================================
--- sys/dev/nvme/nvme_qpair.c
+++ sys/dev/nvme/nvme_qpair.c
@@ -984,8 +984,12 @@
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
#if !defined( __powerpc__) && !defined( __aarch64__) && !defined( __arm__)
/*
- * powerpc's bus_dmamap_sync() already includes a heavyweight sync, but
- * no other archs do.
+ * Ensure proper ordering of writes to the submission queue (where the
+ * tailq write to the device's MMIO area must follow writes to the
+ * submission entries in host memory). On x86, this translates to a
+ * sfence operation to ensure all prior writes are complete. PowerPC
+ * and arm don't need this since their bus_dmamap_sync() functions
+ * already ensure this post condition.
*/
wmb();
#endif

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