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Index: sys/dev/e1000/if_em.h
===================================================================
--- sys/dev/e1000/if_em.h
+++ sys/dev/e1000/if_em.h
@@ -469,6 +469,13 @@
struct if_irq que_irq;
};
+/* Driver-observed link state and its publication barrier. */
+enum em_link_state {
+ EM_LINK_STATE_DOWN = 0,
+ EM_LINK_STATE_UP,
+ EM_LINK_STATE_UP_RESET_PENDING,
+};
+
/* Our softc structure */
struct e1000_softc {
struct e1000_hw hw;
@@ -530,7 +537,7 @@
u32 shadow_vfta[EM_VFTA_SIZE];
/* Info about the interface */
- u16 link_active;
+ enum em_link_state link_state;
u16 fc;
u16 link_speed;
u16 link_duplex;
Index: sys/dev/e1000/if_em.c
===================================================================
--- sys/dev/e1000/if_em.c
+++ sys/dev/e1000/if_em.c
@@ -1562,6 +1562,9 @@
/* Initialize the hardware */
em_reset(ctx);
+ /* Re-arm a link-up transition deferred for this reset. */
+ if (sc->link_state == EM_LINK_STATE_UP_RESET_PENDING)
+ sc->link_state = EM_LINK_STATE_DOWN;
em_if_update_admin_status(ctx);
for (i = 0, tx_que = sc->tx_queues; i < sc->tx_num_queues;
@@ -1999,7 +2002,7 @@
ifmr->ifm_status = IFM_AVALID;
ifmr->ifm_active = IFM_ETHER;
- if (!sc->link_active) {
+ if (sc->link_state == EM_LINK_STATE_DOWN) {
return;
}
@@ -2262,7 +2265,7 @@
}
/* Now check for a transition */
- if (link_check && (sc->link_active == 0)) {
+ if (link_check && sc->link_state == EM_LINK_STATE_DOWN) {
e1000_get_speed_and_duplex(hw, &sc->link_speed,
&sc->link_duplex);
/* Check if we must disable SPEED_MODE bit on PCI-E */
@@ -2279,7 +2282,7 @@
sc->link_speed,
((sc->link_duplex == FULL_DUPLEX) ?
"Full Duplex" : "Half Duplex"));
- sc->link_active = 1;
+ sc->link_state = EM_LINK_STATE_UP;
sc->smartspeed = 0;
if ((ctrl & E1000_CTRL_EXT_LINK_MODE_MASK) ==
E1000_CTRL_EXT_LINK_MODE_GMII &&
@@ -2301,15 +2304,25 @@
if (hw->mac.type < igb_mac_min)
automasked = em_automask_tso(ctx);
- /* Automasking resets the interface so don't mark it up yet */
- if (!automasked)
+ if (!automasked) {
iflib_link_state_change(ctx, LINK_STATE_UP,
IF_Mbps(sc->link_speed));
- } else if (!link_check && (sc->link_active == 1)) {
+ } else {
+ /*
+ * The PHY is up, but publish it only after the TSO
+ * capability-change reset.
+ */
+ sc->link_state = EM_LINK_STATE_UP_RESET_PENDING;
+ }
+ } else if (!link_check && sc->link_state != EM_LINK_STATE_DOWN) {
+ bool link_was_published;
+
+ link_was_published = sc->link_state == EM_LINK_STATE_UP;
sc->link_speed = 0;
sc->link_duplex = 0;
- sc->link_active = 0;
- iflib_link_state_change(ctx, LINK_STATE_DOWN, 0);
+ sc->link_state = EM_LINK_STATE_DOWN;
+ if (link_was_published)
+ iflib_link_state_change(ctx, LINK_STATE_DOWN, 0);
}
em_update_stats_counters(sc);
@@ -2758,7 +2771,8 @@
{
u16 phy_tmp;
- if (sc->link_active || (sc->hw.phy.type != e1000_phy_igp) ||
+ if (sc->link_state != EM_LINK_STATE_DOWN ||
+ (sc->hw.phy.type != e1000_phy_igp) ||
sc->hw.mac.autoneg == 0 ||
(sc->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
return;

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