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diff --git a/sys/x86/cpufreq/hwpstate_amd.c b/sys/x86/cpufreq/hwpstate_amd.c
--- a/sys/x86/cpufreq/hwpstate_amd.c
+++ b/sys/x86/cpufreq/hwpstate_amd.c
@@ -198,6 +198,35 @@
{0, 0}
};
+struct amdhwp_dump_sysctl_handler_request {
+ uint64_t enable;
+ uint64_t caps;
+ uint64_t req;
+ int res;
+};
+
+static void
+amdhwp_dump_sysctl_handler_cb(void *args)
+{
+ struct amdhwp_dump_sysctl_handler_request *req =
+ (struct amdhwp_dump_sysctl_handler_request *)args;
+ int res;
+
+ res = rdmsr_safe(MSR_AMD_CPPC_ENABLE, &req->enable);
+ if (res) {
+ req->res = res;
+ return;
+ }
+ res = rdmsr_safe(MSR_AMD_CPPC_CAPS_1, &req->caps);
+ if (res) {
+ req->res = res;
+ return;
+ }
+ res = rdmsr_safe(MSR_AMD_CPPC_REQUEST, &req->req);
+ req->res = res;
+ return;
+}
+
static int
amdhwp_dump_sysctl_handler(SYSCTL_HANDLER_ARGS)
{
@@ -205,6 +234,8 @@
struct pcpu *pc;
struct sbuf *sb;
struct hwpstate_softc *sc;
+ struct amdhwp_dump_sysctl_handler_request request;
+ cpuset_t cpus;
uint64_t data;
int ret;
@@ -214,23 +245,26 @@
pc = cpu_get_pcpu(dev);
if (pc == NULL)
return (ENXIO);
+ CPU_SETOF(pc->pc_cpuid, &cpus);
sb = sbuf_new(NULL, NULL, 1024, SBUF_FIXEDLEN | SBUF_INCLUDENUL);
sbuf_putc(sb, '\n');
- thread_lock(curthread);
- sched_bind(curthread, pc->pc_cpuid);
- thread_unlock(curthread);
+ smp_rendezvous_cpus(cpus, smp_no_rendezvous_barrier,
+ amdhwp_dump_sysctl_handler_cb, smp_no_rendezvous_barrier, &request);
+ if (request.res) {
+ ret = request.res;
+ goto out;
+ }
- rdmsr_safe(MSR_AMD_CPPC_ENABLE, &data);
+ data = request.enable;
sbuf_printf(sb, "CPU%d: HWP %sabled\n", pc->pc_cpuid,
((data & 1) ? "En" : "Dis"));
-
if (data == 0) {
ret = 0;
goto out;
}
- rdmsr_safe(MSR_AMD_CPPC_CAPS_1, &data);
+ data = request.caps;
sbuf_printf(sb, "\tHighest Performance: %03ju\n",
BITS_VALUE(AMD_CPPC_CAPS_1_HIGH_PERF_BITS, data));
sbuf_printf(sb, "\tGuaranteed Performance: %03ju\n",
@@ -241,8 +275,7 @@
BITS_VALUE(AMD_CPPC_CAPS_1_LOW_PERF_BITS, data));
sbuf_putc(sb, '\n');
- rdmsr_safe(MSR_AMD_CPPC_REQUEST, &data);
-
+ data = request.req;
#define pkg_print(name, offset) \
do { \
sbuf_printf(sb, "\t%s: %03u\n", name, \
@@ -258,10 +291,6 @@
sbuf_putc(sb, '\n');
out:
- thread_lock(curthread);
- sched_unbind(curthread);
- thread_unlock(curthread);
-
ret = sbuf_finish(sb);
if (ret == 0)
ret = SYSCTL_OUT(req, sbuf_data(sb), sbuf_len(sb));
@@ -270,47 +299,44 @@
return (ret);
}
-static bool
-sysctl_epp_select_per_core(const device_t hwp_device, uint32_t val)
+struct hwp_select_core_request {
+ devclass_t dc;
+ uint32_t val;
+};
+
+static void
+sysctl_epp_select_cb(void *arg)
{
+ struct hwp_select_core_request *req = (struct hwp_select_core_request *)
+ arg;
struct hwpstate_softc *sc;
- bool success = true;
- int ret, cpuid;
+ devclass_t dc = req->dc;
+ device_t hwp_device;
+ uint32_t val;
+ int ret;
- cpuid = cpu_get_pcpu(hwp_device)->pc_cpuid;
- thread_lock(curthread);
- sched_bind(curthread, cpuid);
- thread_unlock(curthread);
+ hwp_device = devclass_get_device(dc, curcpu);
sc = device_get_softc(hwp_device);
+ val = req->val;
if (BITS_VALUE(AMD_CPPC_REQUEST_ENERGY_PERF_BITS, sc->req) == val)
- goto end;
+ return;
SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_ENERGY_PERF_BITS, val);
ret = wrmsr_safe(MSR_AMD_CPPC_REQUEST, sc->req);
- if (ret != 0) {
- success = false;
+ if (ret != 0)
device_printf(hwp_device, "Failed to set EPP to %u", val);
- goto end;
- }
-
-end:
- thread_lock(curthread);
- sched_unbind(curthread);
- thread_unlock(curthread);
-
- return (success);
}
static int
sysctl_epp_select(SYSCTL_HANDLER_ARGS)
{
- device_t dev, hwp_dev;
+ device_t dev;
struct hwpstate_softc *sc;
const uint32_t max_energy_perf =
BITS_VALUE(AMD_CPPC_REQUEST_ENERGY_PERF_BITS, (uint64_t)-1);
- devclass_t dc;
+ struct hwp_select_core_request request;
+ cpuset_t cpus;
uint32_t val;
int ret = 0;
- int cpu;
dev = oidp->oid_arg1;
sc = device_get_softc(dev);
@@ -328,17 +354,17 @@
goto end;
}
val = (val * max_energy_perf) / 100;
-
- if (hwpstate_pkg_ctrl_enable) {
- dc = devclass_find(HWP_AMD_CLASSNAME);
- KASSERT(dc != NULL,
- (HWP_AMD_CLASSNAME ": devclass cannot be null"));
- CPU_FOREACH(cpu) {
- hwp_dev = devclass_get_device(dc, cpu);
- sysctl_epp_select_per_core(hwp_dev, val);
- }
- } else
- sysctl_epp_select_per_core(dev, val);
+ request.dc = devclass_find(HWP_AMD_CLASSNAME);
+ request.val = val;
+ KASSERT(dc != NULL, (HWP_AMD_CLASSNAME ": devclass cannot be null"));
+ if (hwpstate_pkg_ctrl_enable)
+ smp_rendezvous(smp_no_rendezvous_barrier, sysctl_epp_select_cb,
+ smp_no_rendezvous_barrier, &request);
+ else {
+ CPU_SETOF(cpu_get_pcpu(dev)->pc_cpuid, &cpus);
+ smp_rendezvous_cpus(cpus, smp_no_rendezvous_barrier,
+ sysctl_epp_select_cb, smp_no_rendezvous_barrier, &request);
+ }
end:
return (ret);
@@ -577,44 +603,45 @@
device_printf(parent, "hwpstate: add child failed\n");
}
-static int
-amd_set_autonomous_hwp(struct hwpstate_softc *sc)
+struct amd_set_autonomous_hwp_request {
+ device_t dev;
+ int res;
+};
+
+static void
+amd_set_autonomous_hwp_cb(void *args)
{
- struct pcpu *pc;
+ struct hwpstate_softc *sc;
+ struct amd_set_autonomous_hwp_request *req =
+ (struct amd_set_autonomous_hwp_request *)args;
device_t dev;
uint64_t caps;
int ret;
- dev = sc->dev;
- pc = cpu_get_pcpu(dev);
- if (pc == NULL)
- return (ENXIO);
-
- thread_lock(curthread);
- sched_bind(curthread, pc->pc_cpuid);
- thread_unlock(curthread);
-
+ dev = req->dev;
+ sc = device_get_softc(dev);
ret = wrmsr_safe(MSR_AMD_CPPC_ENABLE, 1);
if (ret != 0) {
device_printf(dev, "Failed to enable cppc for cpu%d (%d)\n",
- pc->pc_cpuid, ret);
- goto out;
+ curcpu, ret);
+ req->res = ret;
}
ret = rdmsr_safe(MSR_AMD_CPPC_REQUEST, &sc->req);
if (ret != 0) {
device_printf(dev,
- "Failed to read CPPC request MSR for cpu%d (%d)\n",
- pc->pc_cpuid, ret);
- goto out;
+ "Failed to read CPPC request MSR for cpu%d (%d)\n", curcpu,
+ ret);
+ req->res = ret;
}
ret = rdmsr_safe(MSR_AMD_CPPC_CAPS_1, &caps);
if (ret != 0) {
device_printf(dev,
"Failed to read HWP capabilities MSR for cpu%d (%d)\n",
- pc->pc_cpuid, ret);
- goto out;
+ curcpu, ret);
+ req->res = ret;
+ return;
}
/*
@@ -632,17 +659,28 @@
ret = wrmsr_safe(MSR_AMD_CPPC_REQUEST, sc->req);
if (ret) {
- device_printf(dev,
- "Failed to setup autonomous HWP for cpu%d\n",
- pc->pc_cpuid);
- goto out;
+ device_printf(dev, "Failed to setup autonomous HWP for cpu%d\n",
+ curcpu);
+ req->res = ret;
+ return;
}
-out:
- thread_lock(curthread);
- sched_unbind(curthread);
- thread_unlock(curthread);
+ req->res = 0;
+}
- return (ret);
+static int
+amd_set_autonomous_hwp(struct hwpstate_softc *sc)
+{
+ struct amd_set_autonomous_hwp_request req;
+ cpuset_t cpus;
+ device_t dev;
+
+ dev = sc->dev;
+ req.dev = dev;
+ CPU_SETOF(cpu_get_pcpu(dev)->pc_cpuid, &cpus);
+ smp_rendezvous_cpus(cpus, smp_no_rendezvous_barrier,
+ amd_set_autonomous_hwp_cb, smp_no_rendezvous_barrier, &req);
+
+ return (req.res);
}
static int

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