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D20835.id.diff
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Index: sys/arm64/arm64/locore.S
===================================================================
--- sys/arm64/arm64/locore.S
+++ sys/arm64/arm64/locore.S
@@ -738,7 +738,7 @@
MAIR_ATTR(MAIR_NORMAL_WB, VM_MEMATTR_WRITE_BACK) | \
MAIR_ATTR(MAIR_NORMAL_WT, VM_MEMATTR_WRITE_THROUGH)
tcr:
- .quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_TG1_4K | \
+ .quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_TBI0 | TCR_TBI1 | TCR_TG1_4K | \
TCR_CACHE_ATTRS | TCR_SMP_ATTRS)
sctlr_set:
/* Bits to set */
Index: sys/arm64/arm64/trap.c
===================================================================
--- sys/arm64/arm64/trap.c
+++ sys/arm64/arm64/trap.c
@@ -421,7 +421,7 @@
exception = ESR_ELx_EXCEPTION(esr);
switch (exception) {
case EXCP_INSN_ABORT_L:
- far = READ_SPECIALREG(far_el1);
+ far = READ_SPECIALREG(far_el1) & 0xffffffffffff;
/*
* Userspace may be trying to train the branch predictor to
@@ -437,7 +437,7 @@
case EXCP_UNKNOWN:
case EXCP_DATA_ABORT_L:
case EXCP_DATA_ABORT:
- far = READ_SPECIALREG(far_el1);
+ far = READ_SPECIALREG(far_el1) & 0xffffffffffff;
break;
}
intr_enable();
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D20835: aarch64: enable tagged pointers (TBI — Top Byte Ignored)
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