D45474.diff
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	diff --git a/sys/riscv/riscv/locore.S b/sys/riscv/riscv/locore.S
	--- a/sys/riscv/riscv/locore.S
	+++ b/sys/riscv/riscv/locore.S
	@@ -197,7 +197,11 @@

	/* Page tables END */

	- /* Setup supervisor trap vector */
	+ /*
	+ * Set the supervisor trap vector temporarily. Enabling virtual memory
	+ * may generate a page fault. We simply wish to continue onwards, so
	+ * have the trap deliver us to 'va'.
	+ */
	2:
	lla t0, va
	sub t0, t0, s9
	@@ -221,7 +225,7 @@
	lla gp, __global_pointer$
	.option pop

	- /* Setup supervisor trap vector */
	+ /* Set the trap vector to the real handler. */
	la t0, cpu_exception_handler
	csrw stvec, t0

	@@ -342,7 +346,11 @@
	/* Get the kernel's load address */
	jal get_physmem

	- /* Setup supervisor trap vector */
	+ /*
	+ * Set the supervisor trap vector temporarily. Enabling virtual memory
	+ * may generate a page fault. We simply wish to continue onwards, so
	+ * have the trap deliver us to 'mpva'.
	+ */
	lla t0, mpva
	sub t0, t0, s9
	li t1, KERNBASE
	@@ -365,7 +373,7 @@
	lla gp, __global_pointer$
	.option pop

	- /* Setup supervisor trap vector */
	+ /* Set the trap vector to the real handler. */
	la t0, cpu_exception_handler
	csrw stvec, t0