D27138.diff
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	Index: usr.sbin/bhyve/pci_passthru.c
	===================================================================
	--- usr.sbin/bhyve/pci_passthru.c
	+++ usr.sbin/bhyve/pci_passthru.c
	@@ -909,15 +909,26 @@

	if (baridx == pci_msix_table_bar(pi)) {
	msix_table_write(ctx, vcpu, sc, offset, size, value);
	- } else {
	- assert(pi->pi_bar[baridx].type == PCIBAR_IO);
	+ return;
	+ }
	+
	+ switch (pi->pi_bar[baridx].type) {
	+ case PCIBAR_IO:
	bzero(&pio, sizeof(struct iodev_pio_req));
	pio.access = IODEV_PIO_WRITE;
	pio.port = sc->psc_bar[baridx].addr + offset;
	pio.width = size;
	pio.val = value;
	-
	(void)ioctl(iofd, IODEV_PIO, &pio);
	+ break;
	+ case PCIBAR_MEM32:
	+ case PCIBAR_MEM64:
	+ case PCIBAR_MEMHI64:
	+ write_mem(ctx, vcpu, pi->pi_bar[baridx].addr + offset, value,
	+ size);
	+ break;
	+ default:
	+ assert(0);
	}
	}

	@@ -930,20 +941,29 @@
	uint64_t val;

	sc = pi->pi_arg;
	+ val = -1;

	if (baridx == pci_msix_table_bar(pi)) {
	val = msix_table_read(sc, offset, size);
	- } else {
	- assert(pi->pi_bar[baridx].type == PCIBAR_IO);
	+ return (val);
	+ }
	+
	+ switch (pi->pi_bar[baridx].type) {
	+ case PCIBAR_IO:
	bzero(&pio, sizeof(struct iodev_pio_req));
	pio.access = IODEV_PIO_READ;
	pio.port = sc->psc_bar[baridx].addr + offset;
	pio.width = size;
	pio.val = 0;
	-
	(void)ioctl(iofd, IODEV_PIO, &pio);
	-
	val = pio.val;
	+ break;
	+ case PCIBAR_MEM32:
	+ case PCIBAR_MEM64:
	+ case PCIBAR_MEMHI64:
	+ read_mem(ctx, vcpu, pi->pi_bar[baridx].addr + offset, &val,
	+ size);
	+ break;
	}

	return (val);