D58140.id181668.diff
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	diff --git a/sys/dev/aq/aq_dbg.h b/sys/dev/aq/aq_dbg.h
	--- a/sys/dev/aq/aq_dbg.h
	+++ b/sys/dev/aq/aq_dbg.h
	@@ -109,25 +109,24 @@

	#define __FILENAME__ (__builtin_strrchr(__FILE__, '/') ? __builtin_strrchr(__FILE__, '/') + 1 : __FILE__)

	-extern int dbg_level_;
	-extern uint32_t dbg_categories_;
	+extern int aq_dbg_level;
	+extern uint32_t aq_dbg_categories;

	-#define log_base_(_lvl, _fmt, args...) printf( "atlantic: " _fmt "\n", ##args)
	+#define aq_log_base(_lvl, _fmt, args...) do { if (aq_dbg_level >= (_lvl)) printf( "atlantic: " _fmt "\n", ##args); } while (0)

	-#define trace_base_(_lvl, _cat, _fmt, args...) do { if (dbg_level_ >= (_lvl) && ((_cat) & dbg_categories_)) { printf( "atlantic: " _fmt " @%s,%d\n", ##args, __FILENAME__, __LINE__); }} while (0)
	+#define aq_trace_base(_lvl, _cat, _fmt, args...) do { if (aq_dbg_level >= (_lvl) && ((_cat) & aq_dbg_categories)) { printf( "atlantic: " _fmt " @%s,%d\n", ##args, __FILENAME__, __LINE__); }} while (0)

	-#define aq_log_warn(_fmt, args...) log_base_(lvl_warn, "/!\\ " _fmt, ##args)
	-#define aq_log(_fmt, args...) log_base_(lvl_trace, _fmt, ##args)
	-#define aq_log_detail(_fmt, args...) log_base_(lvl_detail, _fmt, ##args)
	+#define aq_log_warn(_fmt, args...) aq_log_base(lvl_warn, "/!\\ " _fmt, ##args)
	+#define aq_log(_fmt, args...) aq_log_base(lvl_trace, _fmt, ##args)
	+#define aq_log_detail(_fmt, args...) aq_log_base(lvl_detail, _fmt, ##args)

	-#define trace_error(_cat,_fmt, args...) trace_base_(lvl_error, _cat, "[!] " _fmt, ##args)
	-#define trace_warn(_cat, _fmt, args...) trace_base_(lvl_warn, _cat, "/!\\ " _fmt, ##args)
	-#define trace(_cat, _fmt, args...) trace_base_(lvl_trace, _cat, _fmt, ##args)
	-#define trace_detail(_cat, _fmt, args...) trace_base_(lvl_detail, _cat, _fmt, ##args)
	+#define trace_error(_cat,_fmt, args...) aq_trace_base(lvl_error, _cat, "[!] " _fmt, ##args)
	+#define trace_warn(_cat, _fmt, args...) aq_trace_base(lvl_warn, _cat, "/!\\ " _fmt, ##args)
	+#define trace(_cat, _fmt, args...) aq_trace_base(lvl_trace, _cat, _fmt, ##args)
	+#define trace_detail(_cat, _fmt, args...) aq_trace_base(lvl_detail, _cat, _fmt, ##args)

	void trace_aq_tx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]);
	void trace_aq_rx_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]);
	void trace_aq_tx_context_descr(int ring_idx, unsigned int pointer, volatile uint64_t descr[2]);
	-void DumpHex(const void* data, size_t size);

	#endif // AQ_DBG_H
	diff --git a/sys/dev/aq/aq_dbg.c b/sys/dev/aq/aq_dbg.c
	--- a/sys/dev/aq/aq_dbg.c
	+++ b/sys/dev/aq/aq_dbg.c
	@@ -45,8 +45,8 @@
	#include "aq_dbg.h"


	-int dbg_level_ = 0;
	-uint32_t dbg_categories_ = dbg_init \| dbg_config \| dbg_tx \| dbg_rx \| dbg_intr \| dbg_fw;
	+int aq_dbg_level = lvl_error;
	+uint32_t aq_dbg_categories = dbg_init \| dbg_config \| dbg_tx \| dbg_rx \| dbg_intr \| dbg_fw;



	@@ -196,49 +196,3 @@
	__entry->des_typ);
	#endif
	}
	-
	-void
	-DumpHex(const void* data, size_t size) {
	-#if AQ_CFG_DEBUG_LVL > 3
	- char ascii[17];
	- size_t i, j;
	- char line[256];
	- char buf[256];
	-
	- ascii[16] = '\0';
	- line[0] = '\0';
	- printf("packet at %p\n", data);
	-
	- for (i = 0; i < size; ++i) {
	- sprintf(buf, "%02X ", ((const unsigned char*)data)[i]);
	- strcat(line, buf);
	- if (((const unsigned char*)data)[i] >= ' ' &&
	- ((const unsigned char*)data)[i] <= '~') {
	- ascii[i % 16] = ((const unsigned char*)data)[i];
	- } else {
	- ascii[i % 16] = '.';
	- }
	- if ((i+1) % 8 == 0 \|\| i+1 == size) {
	- strcat(line, " ");
	- if ((i+1) % 16 == 0) {
	- sprintf(buf, "\| %s \n", ascii);
	- strcat(line, buf);
	- printf("%s", line);
	- line[0] = '\0';
	- } else if (i+1 == size) {
	- ascii[(i+1) % 16] = '\0';
	- if ((i+1) % 16 <= 8) {
	- strcat(line, " ");
	- }
	- for (j = (i+1) % 16; j < 16; ++j) {
	- strcat(line, " ");
	- }
	- sprintf(buf, "\| %s \n", ascii);
	- strcat(line, buf);
	- printf("%s", line);
	- line[0] = '\0';
	- }
	- }
	- }
	-#endif
	-}
	diff --git a/sys/dev/aq/aq_fw.c b/sys/dev/aq/aq_fw.c
	--- a/sys/dev/aq/aq_fw.c
	+++ b/sys/dev/aq/aq_fw.c
	@@ -95,13 +95,13 @@
	aq_fw_reset(struct aq_hw* hw)
	{
	int ver = AQ_READ_REG(hw, 0x18);
	- uint32_t bootExitCode = 0;
	+ uint32_t boot_exit_code = 0;
	int k;

	for (k = 0; k < 1000; ++k) {
	- uint32_t flbStatus = reg_glb_daisy_chain_status1_get(hw);
	- bootExitCode = AQ_READ_REG(hw, 0x388);
	- if (flbStatus != 0x06000000 \|\| bootExitCode != 0)
	+ uint32_t flb_status = reg_glb_daisy_chain_status1_get(hw);
	+ boot_exit_code = AQ_READ_REG(hw, 0x388);
	+ if (flb_status != 0x06000000 \|\| boot_exit_code != 0)
	break;
	}

	@@ -110,7 +110,7 @@
	return (EBUSY);
	}

	- hw->rbl_enabled = bootExitCode != 0;
	+ hw->rbl_enabled = boot_exit_code != 0;

	trace(dbg_init, "RBL enabled = %d", hw->rbl_enabled);

	diff --git a/sys/dev/aq/aq_fw1x.c b/sys/dev/aq/aq_fw1x.c
	--- a/sys/dev/aq/aq_fw1x.c
	+++ b/sys/dev/aq/aq_fw1x.c
	@@ -47,7 +47,7 @@



	-enum fw1x_mode {
	+enum aq_fw1x_mode {
	FW1X_MPI_DEINIT = 0,
	FW1X_MPI_RESERVED = 1,
	FW1X_MPI_INIT = 2,
	@@ -64,7 +64,7 @@
	FW1X_RATE_INVALID = 1 << 6,
	};

	-union fw1x_state_reg {
	+union aq_fw1x_state_reg {
	uint32_t val;
	struct {
	uint8_t mode;
	@@ -77,17 +77,17 @@
	};
	};

	-static int fw1x_reset(struct aq_hw* hw);
	+static int aq_fw1x_reset(struct aq_hw* hw);

	-static int fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,
	+static int aq_fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,
	enum aq_fw_link_speed speed);
	-static int fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,
	+static int aq_fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,
	enum aq_fw_link_speed* speed, enum aq_fw_link_fc* fc);
	-static int fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac_addr);
	-static int fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats);
	+static int aq_fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac_addr);
	+static int aq_fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats);


	-static enum fw1x_mode
	+static enum aq_fw1x_mode
	mpi_mode_to_fw1x(enum aq_hw_fw_mpi_state mode)
	{
	switch (mode) {
	@@ -136,7 +136,7 @@
	}

	static enum aq_fw_link_speed
	-fw1x_rate_to_link_speed(enum aq_fw1x_rate rate)
	+aq_fw1x_rate_to_link_speed(enum aq_fw1x_rate rate)
	{
	switch (rate) {
	case FW1X_RATE_10G:
	@@ -162,7 +162,7 @@
	}

	static int
	-fw1x_reset(struct aq_hw* hw)
	+aq_fw1x_reset(struct aq_hw* hw)
	{
	uint32_t tid0 = ~0u; /< Initial value of MBOX transactionId. /
	struct aq_hw_fw_mbox mbox;
	@@ -199,10 +199,10 @@
	}

	static int
	-fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,
	+aq_fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,
	enum aq_fw_link_speed speed)
	{
	- union fw1x_state_reg state = {0};
	+ union aq_fw1x_state_reg state = {0};
	state.mode = mpi_mode_to_fw1x(mode);
	state.speed = link_speed_mask_to_fw1x(speed);

	@@ -215,10 +215,10 @@
	}

	static int
	-fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,
	+aq_fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,
	enum aq_fw_link_speed* speed, enum aq_fw_link_fc* fc)
	{
	- union fw1x_state_reg state = { .val = AQ_READ_REG(hw, AQ_HW_MPI_STATE_ADR) };
	+ union aq_fw1x_state_reg state = { .val = AQ_READ_REG(hw, AQ_HW_MPI_STATE_ADR) };

	trace(dbg_init, "fw1x> get_mode(): 0x36c -> %x, 0x368 -> %x",
	state.val, AQ_READ_REG(hw, AQ_HW_MPI_CONTROL_ADR));
	@@ -244,7 +244,7 @@
	*mode = md;

	if (speed)
	- *speed = fw1x_rate_to_link_speed(state.speed);
	+ *speed = aq_fw1x_rate_to_link_speed(state.speed);

	*fc = aq_fw_fc_none;

	@@ -254,7 +254,7 @@


	static int
	-fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac)
	+aq_fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac)
	{
	int err = EFAULT;
	uint32_t mac_addr[2];
	@@ -289,13 +289,13 @@
	return (0);
	}

	-/* fw1x_get_stats() memcpy's this raw block onto aq_hw_stats' prefix. */
	+/* aq_fw1x_get_stats() memcpy's this raw block onto aq_hw_stats' prefix. */
	_Static_assert(sizeof(struct aq_fw1x_mbox_stats) ==
	__offsetof(struct aq_hw_stats, brc),
	"fw1x mailbox stats must match the aq_hw_stats prefix");

	static int
	-fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats)
	+aq_fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats)
	{
	int err = 0;

	@@ -312,11 +312,11 @@

	const struct aq_firmware_ops aq_fw1x_ops =
	{
	- .reset = fw1x_reset,
	+ .reset = aq_fw1x_reset,

	- .set_mode = fw1x_set_mode,
	- .get_mode = fw1x_get_mode,
	+ .set_mode = aq_fw1x_set_mode,
	+ .get_mode = aq_fw1x_get_mode,

	- .get_mac_addr = fw1x_get_mac_addr,
	- .get_stats = fw1x_get_stats,
	+ .get_mac_addr = aq_fw1x_get_mac_addr,
	+ .get_stats = aq_fw1x_get_stats,
	};
	diff --git a/sys/dev/aq/aq_fw2x.c b/sys/dev/aq/aq_fw2x.c
	--- a/sys/dev/aq/aq_fw2x.c
	+++ b/sys/dev/aq/aq_fw2x.c
	@@ -51,7 +51,7 @@

	#include "aq_dbg.h"

	-enum fw2x_caps_lo {
	+enum aq_fw2x_caps_lo {
	CAPS_LO_10BASET_HD = 0x00,
	CAPS_LO_10BASET_FD,
	CAPS_LO_100BASETX_HD,
	@@ -66,7 +66,7 @@
	CAPS_LO_10GBASET_FD,
	};

	-enum fw2x_caps_hi {
	+enum aq_fw2x_caps_hi {
	CAPS_HI_RESERVED1 = 0x00,
	CAPS_HI_10BASET_EEE,
	CAPS_HI_RESERVED2,
	@@ -111,7 +111,7 @@
	};


	-struct fw2x_msm_statistics
	+struct aq_fw2x_msm_statistics
	{
	uint32_t uprc;
	uint32_t mprc;
	@@ -131,31 +131,31 @@
	uint32_t prc;
	};

	-struct fw2x_phy_cable_diag_data
	+struct aq_fw2x_phy_cable_diag_data
	{
	uint32_t lane_data[4];
	};

	-struct fw2x_capabilities {
	+struct aq_fw2x_capabilities {
	uint32_t caps_lo;
	uint32_t caps_hi;
	};

	-struct fw2x_mailbox // struct fwHostInterface
	+struct aq_fw2x_mailbox // struct fwHostInterface
	{
	uint32_t version;
	uint32_t transaction_id;
	int32_t error;
	- struct fw2x_msm_statistics msm; // msmStatistics_t msm;
	+ struct aq_fw2x_msm_statistics msm; // msmStatistics_t msm;
	uint16_t phy_h_bit;
	uint16_t phy_fault_code;
	int16_t phy_temperature;
	uint8_t cable_len;
	uint8_t reserved1;
	- struct fw2x_phy_cable_diag_data diag_data;
	+ struct aq_fw2x_phy_cable_diag_data diag_data;
	uint32_t reserved[8];

	- struct fw2x_capabilities caps;
	+ struct aq_fw2x_capabilities caps;

	/* ... */
	};
	@@ -193,15 +193,15 @@
	#define FW2X_LED_DEFAULT 0x0U

	// Firmware v2-3.x specific functions.
	-static int fw2x_reset(struct aq_hw* hw);
	+static int aq_fw2x_reset(struct aq_hw* hw);

	-static int fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,
	+static int aq_fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,
	enum aq_fw_link_speed speed);
	-static int fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,
	+static int aq_fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,
	enum aq_fw_link_speed* speed, enum aq_fw_link_fc* fc);

	-static int fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac);
	-static int fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats);
	+static int aq_fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac);
	+static int aq_fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats);


	static uint64_t
	@@ -240,12 +240,12 @@


	static int
	-fw2x_reset(struct aq_hw* hw)
	+aq_fw2x_reset(struct aq_hw* hw)
	{
	- struct fw2x_capabilities caps = {0};
	+ struct aq_fw2x_capabilities caps = {0};
	AQ_DBG_ENTER();
	int err = aq_hw_fw_downld_dwords(hw,
	- hw->mbox_addr + offsetof(struct fw2x_mailbox, caps),
	+ hw->mbox_addr + offsetof(struct aq_fw2x_mailbox, caps),
	(uint32_t*)&caps, sizeof caps/sizeof(uint32_t));
	if (err == 0) {
	hw->fw_caps = caps.caps_lo \| ((uint64_t)caps.caps_hi << 32);
	@@ -289,7 +289,7 @@


	static int
	-fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,
	+aq_fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,
	enum aq_fw_link_speed speed)
	{
	uint64_t mpi_ctrl = get_mpi_ctrl(hw);
	@@ -326,13 +326,12 @@
	}

	static int
	-fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,
	+aq_fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,
	enum aq_fw_link_speed* link_speed, enum aq_fw_link_fc* fc)
	{
	uint64_t mpi_state = get_mpi_state(hw);
	uint32_t rates = mpi_state & FW2X_RATE_MASK;

	- // AQ_DBG_ENTER();

	if (mode) {
	uint64_t mpi_ctrl = get_mpi_ctrl(hw);
	@@ -361,13 +360,12 @@
	*fc = (mpi_state & (FW2X_FW_CAP_PAUSE \| FW2X_FW_CAP_ASYM_PAUSE)) >>
	(32 + CAPS_HI_PAUSE);

	-// AQ_DBG_EXIT(0);
	return (0);
	}


	static int
	-fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac)
	+aq_fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac)
	{
	int err = EFAULT;
	uint32_t mac_addr[2];
	@@ -400,8 +398,8 @@
	}

	static inline void
	-fw2x_stats_to_fw_stats(struct aq_hw_stats* dst,
	- const struct fw2x_msm_statistics* src)
	+aq_fw2x_stats_to_fw_stats(struct aq_hw_stats* dst,
	+ const struct aq_fw2x_msm_statistics* src)
	{
	dst->uprc = src->uprc;
	dst->mprc = src->mprc;
	@@ -423,9 +421,9 @@


	static int
	-fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats)
	+aq_fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats)
	{
	- struct fw2x_msm_statistics fw2x_stats = {0};
	+ struct aq_fw2x_msm_statistics aq_fw2x_stats = {0};
	uint64_t mpi_ctrl;
	int err;

	@@ -436,10 +434,10 @@

	/* Kick-and-read: take the F/W's previous snapshot, request the next. */
	err = aq_hw_fw_downld_dwords(hw,
	- hw->mbox_addr + offsetof(struct fw2x_mailbox, msm),
	- (uint32_t*)&fw2x_stats, sizeof fw2x_stats/sizeof(uint32_t));
	+ hw->mbox_addr + offsetof(struct aq_fw2x_mailbox, msm),
	+ (uint32_t*)&aq_fw2x_stats, sizeof aq_fw2x_stats/sizeof(uint32_t));

	- fw2x_stats_to_fw_stats(stats, &fw2x_stats);
	+ aq_fw2x_stats_to_fw_stats(stats, &aq_fw2x_stats);

	if (err != 0)
	trace_error(dbg_fw,
	@@ -453,7 +451,7 @@
	}

	static int
	-fw2x_led_control(struct aq_hw* hw, uint32_t onoff)
	+aq_fw2x_led_control(struct aq_hw* hw, uint32_t onoff)
	{
	int err = 0;

	@@ -471,13 +469,13 @@

	const struct aq_firmware_ops aq_fw2x_ops =
	{
	- .reset = fw2x_reset,
	+ .reset = aq_fw2x_reset,

	- .set_mode = fw2x_set_mode,
	- .get_mode = fw2x_get_mode,
	+ .set_mode = aq_fw2x_set_mode,
	+ .get_mode = aq_fw2x_get_mode,

	- .get_mac_addr = fw2x_get_mac_addr,
	- .get_stats = fw2x_get_stats,
	+ .get_mac_addr = aq_fw2x_get_mac_addr,
	+ .get_stats = aq_fw2x_get_stats,

	- .led_control = fw2x_led_control,
	+ .led_control = aq_fw2x_led_control,
	};
	diff --git a/sys/dev/aq/aq_hw.h b/sys/dev/aq/aq_hw.h
	--- a/sys/dev/aq/aq_hw.h
	+++ b/sys/dev/aq/aq_hw.h
	@@ -56,12 +56,12 @@


	#define AQ_WRITE_REG_BIT(hw, reg, msk, shift, value) do { \
	- if (msk ^ ~0) { \
	+ if ((msk) ^ ~0) { \
	uint32_t reg_old, reg_new = 0U; \
	reg_old = AQ_READ_REG(hw, reg); \
	- reg_new = (reg_old & (~msk)) \| (value << shift); \
	- if (reg_old != reg_new) \
	- AQ_WRITE_REG(hw, reg, reg_new); \
	+ reg_new = (reg_old & (~(msk))) \| ((value) << (shift)); \
	+ if (reg_old != reg_new) \
	+ AQ_WRITE_REG(hw, reg, reg_new); \
	} else { \
	AQ_WRITE_REG(hw, reg, value); \
	} \
	@@ -71,11 +71,7 @@
	#define AQ_READ_REG_BIT(a, reg, msk, shift) ( \
	((AQ_READ_REG(a, reg) & msk) >> shift))

	-#define AQ_HW_FLUSH() { (void)AQ_READ_REG(hw, 0x10); }
	-
	-#define aq_hw_write_reg_bit AQ_WRITE_REG_BIT
	-
	-#define aq_hw_write_reg AQ_WRITE_REG
	+#define AQ_HW_FLUSH(hw) { (void)AQ_READ_REG((hw), 0x10); }

	/* Driver-side per-backend statistics snapshot. */
	struct aq_hw_stats {
	diff --git a/sys/dev/aq/aq_hw.c b/sys/dev/aq/aq_hw.c
	--- a/sys/dev/aq/aq_hw.c
	+++ b/sys/dev/aq/aq_hw.c
	@@ -95,7 +95,6 @@
	{
	int err = 0;

	-// AQ_DBG_ENTER();
	err = AQ_HW_WAIT_FOR(reg_glb_cpu_sem_get(hw, AQ_HW_FW_SM_RAM) == 1U, 1U,
	10000U);

	@@ -128,7 +127,6 @@
	reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM);

	err_exit:
	-// AQ_DBG_EXIT(err);
	return (err);
	}

	@@ -211,7 +209,6 @@
	aq_hw_mpi_read_stats(struct aq_hw hw, struct aq_hw_stats stats)
	{
	int err;
	-// AQ_DBG_ENTER();

	err = hw->fw_ops->get_stats(hw, stats);

	@@ -220,7 +217,6 @@
	stats->cprc = stats_rx_lro_coalesced_pkt_count0_get(hw);
	}

	-// AQ_DBG_EXIT(err);
	return (err);
	}

	@@ -247,7 +243,6 @@
	{
	int err = 0;

	- // AQ_DBG_ENTER();

	enum aq_hw_fw_mpi_state mode;
	enum aq_fw_link_speed speed = aq_fw_none;
	@@ -293,7 +288,6 @@
	fc_neg->fc_rx = !!(fc & aq_fw_fc_ENABLE_RX);
	fc_neg->fc_tx = !!(fc & aq_fw_fc_ENABLE_TX);

	- // AQ_DBG_EXIT(0);
	return (0);
	}

	@@ -549,7 +543,6 @@
	static int
	aq_hw_init_rx_path(struct aq_hw *hw)
	{
	- //struct aq_nic_cfg *cfg = hw->aq_nic_cfg;
	unsigned int control_reg_val = 0U;
	int i;
	int err;
	diff --git a/sys/dev/aq/aq_hw_llh.c b/sys/dev/aq/aq_hw_llh.c
	--- a/sys/dev/aq/aq_hw_llh.c
	+++ b/sys/dev/aq/aq_hw_llh.c
	@@ -1002,7 +1002,7 @@
	void
	hw_atl_rpf_vlan_inner_etht_set(struct aq_hw *aq_hw, uint32_t vlan_inner_etht)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_INNER_TPID_ADR,
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_INNER_TPID_ADR,
	HW_ATL_RPF_VL_INNER_TPID_MSK,
	HW_ATL_RPF_VL_INNER_TPID_SHIFT,
	vlan_inner_etht);
	@@ -1011,7 +1011,7 @@
	void
	hw_atl_rpf_vlan_outer_etht_set(struct aq_hw *aq_hw, uint32_t vlan_outer_etht)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_OUTER_TPID_ADR,
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_OUTER_TPID_ADR,
	HW_ATL_RPF_VL_OUTER_TPID_MSK,
	HW_ATL_RPF_VL_OUTER_TPID_SHIFT,
	vlan_outer_etht);
	@@ -1021,7 +1021,7 @@
	hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw *aq_hw,
	uint32_t vlan_prom_mode_en)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_PROMIS_MODE_ADR,
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_PROMIS_MODE_ADR,
	HW_ATL_RPF_VL_PROMIS_MODE_MSK,
	HW_ATL_RPF_VL_PROMIS_MODE_SHIFT,
	vlan_prom_mode_en);
	@@ -1031,7 +1031,7 @@
	hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw *aq_hw,
	uint32_t vlan_acc_untagged_packets)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_ADR,
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_ADR,
	HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_MSK,
	HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_SHIFT,
	vlan_acc_untagged_packets);
	@@ -1041,7 +1041,7 @@
	hw_atl_rpf_vlan_untagged_act_set(struct aq_hw *aq_hw,
	uint32_t vlan_untagged_act)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_UNTAGGED_ACT_ADR,
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_UNTAGGED_ACT_ADR,
	HW_ATL_RPF_VL_UNTAGGED_ACT_MSK,
	HW_ATL_RPF_VL_UNTAGGED_ACT_SHIFT,
	vlan_untagged_act);
	@@ -1051,7 +1051,7 @@
	hw_atl_rpf_vlan_flr_en_set(struct aq_hw *aq_hw, uint32_t vlan_flr_en,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_EN_F_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_EN_F_ADR(filter),
	HW_ATL_RPF_VL_EN_F_MSK,
	HW_ATL_RPF_VL_EN_F_SHIFT,
	vlan_flr_en);
	@@ -1061,7 +1061,7 @@
	hw_atl_rpf_vlan_flr_act_set(struct aq_hw *aq_hw, uint32_t vlan_flr_act,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ACT_F_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_ACT_F_ADR(filter),
	HW_ATL_RPF_VL_ACT_F_MSK,
	HW_ATL_RPF_VL_ACT_F_SHIFT,
	vlan_flr_act);
	@@ -1071,7 +1071,7 @@
	hw_atl_rpf_vlan_id_flr_set(struct aq_hw *aq_hw, uint32_t vlan_id_flr,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ID_F_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_ID_F_ADR(filter),
	HW_ATL_RPF_VL_ID_F_MSK,
	HW_ATL_RPF_VL_ID_F_SHIFT,
	vlan_id_flr);
	@@ -1081,7 +1081,7 @@
	hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq_en,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_RXQ_EN_F_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_RXQ_EN_F_ADR(filter),
	HW_ATL_RPF_VL_RXQ_EN_F_MSK,
	HW_ATL_RPF_VL_RXQ_EN_F_SHIFT,
	vlan_rxq_en);
	@@ -1091,7 +1091,7 @@
	hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw *aq_hw, uint32_t vlan_rxq,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_RXQ_F_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_VL_RXQ_F_ADR(filter),
	HW_ATL_RPF_VL_RXQ_F_MSK,
	HW_ATL_RPF_VL_RXQ_F_SHIFT,
	vlan_rxq);
	@@ -1101,7 +1101,7 @@
	hw_atl_rpf_etht_flr_en_set(struct aq_hw *aq_hw, uint32_t etht_flr_en,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_ENF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_ET_ENF_ADR(filter),
	HW_ATL_RPF_ET_ENF_MSK,
	HW_ATL_RPF_ET_ENF_SHIFT, etht_flr_en);
	}
	@@ -1110,7 +1110,7 @@
	hw_atl_rpf_etht_user_priority_en_set(struct aq_hw *aq_hw,
	uint32_t etht_user_priority_en, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_UPFEN_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_ET_UPFEN_ADR(filter),
	HW_ATL_RPF_ET_UPFEN_MSK, HW_ATL_RPF_ET_UPFEN_SHIFT,
	etht_user_priority_en);
	}
	@@ -1119,7 +1119,7 @@
	hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw *aq_hw,
	uint32_t etht_rx_queue_en, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_RXQFEN_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_ET_RXQFEN_ADR(filter),
	HW_ATL_RPF_ET_RXQFEN_MSK,
	HW_ATL_RPF_ET_RXQFEN_SHIFT,
	etht_rx_queue_en);
	@@ -1129,7 +1129,7 @@
	hw_atl_rpf_etht_user_priority_set(struct aq_hw *aq_hw,
	uint32_t etht_user_priority, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_UPF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_ET_UPF_ADR(filter),
	HW_ATL_RPF_ET_UPF_MSK,
	HW_ATL_RPF_ET_UPF_SHIFT, etht_user_priority);
	}
	@@ -1138,7 +1138,7 @@
	hw_atl_rpf_etht_rx_queue_set(struct aq_hw *aq_hw, uint32_t etht_rx_queue,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_RXQF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_ET_RXQF_ADR(filter),
	HW_ATL_RPF_ET_RXQF_MSK,
	HW_ATL_RPF_ET_RXQF_SHIFT, etht_rx_queue);
	}
	@@ -1147,7 +1147,7 @@
	hw_atl_rpf_etht_mgt_queue_set(struct aq_hw *aq_hw, uint32_t etht_mgt_queue,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_MNG_RXQF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_ET_MNG_RXQF_ADR(filter),
	HW_ATL_RPF_ET_MNG_RXQF_MSK,
	HW_ATL_RPF_ET_MNG_RXQF_SHIFT,
	etht_mgt_queue);
	@@ -1157,7 +1157,7 @@
	hw_atl_rpf_etht_flr_act_set(struct aq_hw *aq_hw, uint32_t etht_flr_act,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_ACTF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_ET_ACTF_ADR(filter),
	HW_ATL_RPF_ET_ACTF_MSK,
	HW_ATL_RPF_ET_ACTF_SHIFT, etht_flr_act);
	}
	@@ -1166,7 +1166,7 @@
	hw_atl_rpf_etht_flr_set(struct aq_hw *aq_hw, uint32_t etht_flr,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_VALF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_ET_VALF_ADR(filter),
	HW_ATL_RPF_ET_VALF_MSK,
	HW_ATL_RPF_ET_VALF_SHIFT, etht_flr);
	}
	@@ -1174,7 +1174,7 @@
	void
	hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_ENF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L3_L4_ENF_ADR(filter),
	HW_ATL_RPF_L3_L4_ENF_MSK,
	HW_ATL_RPF_L3_L4_ENF_SHIFT, val);
	}
	@@ -1182,7 +1182,7 @@
	void
	hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_V6_ENF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L3_V6_ENF_ADR(filter),
	HW_ATL_RPF_L3_V6_ENF_MSK,
	HW_ATL_RPF_L3_V6_ENF_SHIFT, val);
	}
	@@ -1190,7 +1190,7 @@
	void
	hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_SAF_EN_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L3_SAF_EN_ADR(filter),
	HW_ATL_RPF_L3_SAF_EN_MSK,
	HW_ATL_RPF_L3_SAF_EN_SHIFT, val);
	}
	@@ -1198,7 +1198,7 @@
	void
	hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_DAF_EN_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L3_DAF_EN_ADR(filter),
	HW_ATL_RPF_L3_DAF_EN_MSK,
	HW_ATL_RPF_L3_DAF_EN_SHIFT, val);
	}
	@@ -1206,7 +1206,7 @@
	void
	hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_SPF_EN_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L4_SPF_EN_ADR(filter),
	HW_ATL_RPF_L4_SPF_EN_MSK,
	HW_ATL_RPF_L4_SPF_EN_SHIFT, val);
	}
	@@ -1214,7 +1214,7 @@
	void
	hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_DPF_EN_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L4_DPF_EN_ADR(filter),
	HW_ATL_RPF_L4_DPF_EN_MSK,
	HW_ATL_RPF_L4_DPF_EN_SHIFT, val);
	}
	@@ -1222,7 +1222,7 @@
	void
	hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_PROTF_EN_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L4_PROTF_EN_ADR(filter),
	HW_ATL_RPF_L4_PROTF_EN_MSK,
	HW_ATL_RPF_L4_PROTF_EN_SHIFT, val);
	}
	@@ -1230,7 +1230,7 @@
	void
	hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_ARPF_EN_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L3_ARPF_EN_ADR(filter),
	HW_ATL_RPF_L3_ARPF_EN_MSK,
	HW_ATL_RPF_L3_ARPF_EN_SHIFT, val);
	}
	@@ -1239,7 +1239,7 @@
	hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_RXQF_EN_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L3_L4_RXQF_EN_ADR(filter),
	HW_ATL_RPF_L3_L4_RXQF_EN_MSK,
	HW_ATL_RPF_L3_L4_RXQF_EN_SHIFT, val);
	}
	@@ -1248,7 +1248,7 @@
	hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val,
	uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_MNG_RXQF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L3_L4_MNG_RXQF_ADR(filter),
	HW_ATL_RPF_L3_L4_MNG_RXQF_MSK,
	HW_ATL_RPF_L3_L4_MNG_RXQF_SHIFT, val);
	}
	@@ -1256,7 +1256,7 @@
	void
	hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_ACTF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L3_L4_ACTF_ADR(filter),
	HW_ATL_RPF_L3_L4_ACTF_MSK,
	HW_ATL_RPF_L3_L4_ACTF_SHIFT, val);
	}
	@@ -1264,7 +1264,7 @@
	void
	hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L3_L4_RXQF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L3_L4_RXQF_ADR(filter),
	HW_ATL_RPF_L3_L4_RXQF_MSK,
	HW_ATL_RPF_L3_L4_RXQF_SHIFT, val);
	}
	@@ -1272,7 +1272,7 @@
	void
	hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_PROTF_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L4_PROTF_ADR(filter),
	HW_ATL_RPF_L4_PROTF_MSK,
	HW_ATL_RPF_L4_PROTF_SHIFT, val);
	}
	@@ -1280,7 +1280,7 @@
	void
	hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_SPD_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L4_SPD_ADR(filter),
	HW_ATL_RPF_L4_SPD_MSK,
	HW_ATL_RPF_L4_SPD_SHIFT, val);
	}
	@@ -1288,7 +1288,7 @@
	void
	hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter)
	{
	- aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_DPD_ADR(filter),
	+ AQ_WRITE_REG_BIT(aq_hw, HW_ATL_RPF_L4_DPD_ADR(filter),
	HW_ATL_RPF_L4_DPD_MSK,
	HW_ATL_RPF_L4_DPD_SHIFT, val);
	}
	@@ -2018,19 +2018,19 @@
	void
	hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw *aq_hw, uint8_t location)
	{
	- aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location), 0U);
	+ AQ_WRITE_REG(aq_hw, HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location), 0U);
	}

	void
	hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw *aq_hw, uint8_t location)
	{
	- aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location), 0U);
	+ AQ_WRITE_REG(aq_hw, HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location), 0U);
	}

	void
	hw_atl_rpfl3l4_cmd_clear(struct aq_hw *aq_hw, uint8_t location)
	{
	- aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_CTRL_FL3L4(location), 0U);
	+ AQ_WRITE_REG(aq_hw, HW_ATL_RX_GET_ADDR_CTRL_FL3L4(location), 0U);
	}

	void
	@@ -2039,7 +2039,7 @@
	int i;

	for (i = 0; i < 4; ++i)
	- aq_hw_write_reg(aq_hw,
	+ AQ_WRITE_REG(aq_hw,
	HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), 0U);
	}

	@@ -2049,7 +2049,7 @@
	int i;

	for (i = 0; i < 4; ++i)
	- aq_hw_write_reg(aq_hw,
	+ AQ_WRITE_REG(aq_hw,
	HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), 0U);
	}

	@@ -2057,7 +2057,7 @@
	hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw *aq_hw, uint8_t location,
	uint32_t ipv4_dest)
	{
	- aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location),
	+ AQ_WRITE_REG(aq_hw, HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location),
	ipv4_dest);
	}

	@@ -2065,14 +2065,14 @@
	hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw *aq_hw, uint8_t location,
	uint32_t ipv4_src)
	{
	- aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location),
	+ AQ_WRITE_REG(aq_hw, HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location),
	ipv4_src);
	}

	void
	hw_atl_rpfl3l4_cmd_set(struct aq_hw *aq_hw, uint8_t location, uint32_t cmd)
	{
	- aq_hw_write_reg(aq_hw, HW_ATL_RX_GET_ADDR_CTRL_FL3L4(location), cmd);
	+ AQ_WRITE_REG(aq_hw, HW_ATL_RX_GET_ADDR_CTRL_FL3L4(location), cmd);
	}

	void
	@@ -2082,7 +2082,7 @@
	int i;

	for (i = 0; i < 4; ++i)
	- aq_hw_write_reg(aq_hw,
	+ AQ_WRITE_REG(aq_hw,
	HW_ATL_RX_GET_ADDR_SRCA_FL3L4(location + i), ipv6_src[i]);
	}

	@@ -2093,6 +2093,6 @@
	int i;

	for (i = 0; i < 4; ++i)
	- aq_hw_write_reg(aq_hw,
	+ AQ_WRITE_REG(aq_hw,
	HW_ATL_RX_GET_ADDR_DESTA_FL3L4(location + i), ipv6_dest[i]);
	}
	diff --git a/sys/dev/aq/aq_irq.c b/sys/dev/aq/aq_irq.c
	--- a/sys/dev/aq/aq_irq.c
	+++ b/sys/dev/aq/aq_irq.c
	@@ -122,11 +122,9 @@
	struct aq_hw *hw = &aq_dev->hw;
	uint32_t link_speed;

	- // AQ_DBG_ENTER();

	struct aq_hw_fc_info fc_neg;
	aq_hw_get_link_state(hw, &link_speed, &fc_neg);
	-// AQ_DBG_PRINT(" link_speed=%d aq_dev->linkup=%d", link_speed, aq_dev->linkup);
	if (link_speed && !aq_dev->linkup) { /* link was DOWN */
	device_printf(aq_dev->dev, "atlantic: link UP: speed=%d\n", link_speed);

	@@ -154,7 +152,6 @@
	}

	aq_update_hw_stats(aq_dev);
	-// AQ_DBG_EXIT(0);
	}

	/**************************************************************************/
	@@ -168,7 +165,7 @@
	struct aq_hw *hw = &aq_dev->hw;

	itr_irq_status_clearlsw_set(hw, BIT(ring->msix));
	- AQ_HW_FLUSH();
	+ AQ_HW_FLUSH(hw);
	counter_u64_add(ring->stats.irq, 1);
	return (FILTER_SCHEDULE_THREAD);
	}
	@@ -183,7 +180,7 @@
	struct aq_hw *hw = &aq_dev->hw;

	itr_irq_status_clearlsw_set(hw, BIT(aq_dev->msix));
	- AQ_HW_FLUSH();
	+ AQ_HW_FLUSH(hw);

	iflib_admin_intr_deferred(aq_dev->ctx);

	diff --git a/sys/dev/aq/aq_main.c b/sys/dev/aq/aq_main.c
	--- a/sys/dev/aq/aq_main.c
	+++ b/sys/dev/aq/aq_main.c
	@@ -706,7 +706,7 @@
	err = aq_hw_init(&softc->hw, softc->hw.mac_addr, softc->msix,
	softc->scctx->isc_intr == IFLIB_INTR_MSIX);
	if (err != 0) {
	- device_printf(softc->dev, "atlantic: aq_hw_init: %d", err);
	+ device_printf(softc->dev, "atlantic: aq_hw_init: %d\n", err);
	}

	aq_if_media_status(ctx, &ifmr);
	@@ -718,12 +718,12 @@
	err = aq_ring_tx_init(&softc->hw, ring);
	if (err) {
	device_printf(softc->dev,
	- "atlantic: aq_ring_tx_init: %d", err);
	+ "atlantic: aq_ring_tx_init: %d\n", err);
	}
	err = aq_ring_tx_start(hw, ring);
	if (err != 0) {
	device_printf(softc->dev,
	- "atlantic: aq_ring_tx_start: %d", err);
	+ "atlantic: aq_ring_tx_start: %d\n", err);
	}
	}
	for (i = 0; i < softc->rx_rings_count; i++) {
	@@ -732,12 +732,12 @@
	err = aq_ring_rx_init(&softc->hw, ring);
	if (err) {
	device_printf(softc->dev,
	- "atlantic: aq_ring_rx_init: %d", err);
	+ "atlantic: aq_ring_rx_init: %d\n", err);
	}
	err = aq_ring_rx_start(hw, ring);
	if (err != 0) {
	device_printf(softc->dev,
	- "atlantic: aq_ring_rx_start: %d", err);
	+ "atlantic: aq_ring_rx_start: %d\n", err);
	}
	aq_if_rx_queue_intr_enable(ctx, i);
	}
	@@ -930,7 +930,6 @@
	struct aq_dev *softc;
	uint64_t ticks_now;

	-// AQ_DBG_ENTER();

	softc = iflib_get_softc(ctx);
	ticks_now = ticks;
	@@ -941,7 +940,6 @@
	iflib_admin_intr_deferred(ctx);
	}

	-// AQ_DBG_EXIT(0);
	return;

	}
	@@ -1050,7 +1048,7 @@
	rx_vectors);
	if (rc) {
	device_printf(iflib_get_dev(ctx),
	- "Failed to register admin handler");
	+ "Failed to register admin handler\n");
	goto fail;
	}
	AQ_DBG_EXIT(0);
	@@ -1325,10 +1323,10 @@

	/* Runtime trace controls (global) */
	SYSCTL_ADD_INT(ctx, child, OID_AUTO, "debug",
	- CTLFLAG_RW, &dbg_level_, 0,
	+ CTLFLAG_RW, &aq_dbg_level, 0,
	"Trace verbosity: 0=off, 3=err, 4=+warn, 5=+trace, 6=+detail");
	SYSCTL_ADD_U32(ctx, child, OID_AUTO, "debug_categories",
	- CTLFLAG_RW, &dbg_categories_, 0,
	+ CTLFLAG_RW, &aq_dbg_categories, 0,
	"Trace category mask: init=1 config=2 tx=4 rx=8 intr=16 fw=32");

	/* Driver Statistics */
	@@ -1361,7 +1359,7 @@
	SYSCTL_ADD_COUNTER_U64(ctx, queue_list, OID_AUTO, "rx_pkts",
	CTLFLAG_RD, &(ring->stats.rx_pkts), "RX Packets");
	SYSCTL_ADD_COUNTER_U64(ctx, queue_list, OID_AUTO, "rx_bytes",
	- CTLFLAG_RD, &(ring->stats.rx_bytes), "TX Octets");
	+ CTLFLAG_RD, &(ring->stats.rx_bytes), "RX Octets");
	SYSCTL_ADD_COUNTER_U64(ctx, queue_list, OID_AUTO, "rx_err",
	CTLFLAG_RD, &(ring->stats.rx_err), "RX Errors");
	SYSCTL_ADD_COUNTER_U64(ctx, queue_list, OID_AUTO, "irq",
	diff --git a/sys/dev/aq/aq_media.c b/sys/dev/aq/aq_media.c
	--- a/sys/dev/aq/aq_media.c
	+++ b/sys/dev/aq/aq_media.c
	@@ -119,7 +119,7 @@

	if (!(ifm->ifm_media & IFM_ETHER)) {
	device_printf(aq_dev->dev,
	- "%s(): aq_dev interface - bad media: 0x%X", __FUNCTION__,
	+ "%s(): aq_dev interface - bad media: 0x%X\n", __FUNCTION__,
	ifm->ifm_media);
	return (0); // should never happen
	}
	diff --git a/sys/dev/aq/aq_ring.c b/sys/dev/aq/aq_ring.c
	--- a/sys/dev/aq/aq_ring.c
	+++ b/sys/dev/aq/aq_ring.c
	@@ -83,11 +83,6 @@

	int
	aq_ring_rx_init(struct aq_hw hw, struct aq_ring ring)
	-/* uint64_t ring_addr,
	- uint32_t ring_size,
	- uint32_t ring_idx,
	- uint32_t interrupt_cause,
	- uint32_t cpu_idx) */
	{
	int err;
	uint32_t dma_desc_addr_lsw = (uint32_t)ring->rx_descs_phys & 0xffffffff;
	@@ -132,11 +127,6 @@

	int
	aq_ring_tx_init(struct aq_hw hw, struct aq_ring ring)
	-/* uint64_t ring_addr,
	- uint32_t ring_size,
	- uint32_t ring_idx,
	- uint32_t interrupt_cause,
	- uint32_t cpu_idx) */
	{
	int err;
	uint32_t dma_desc_addr_lsw = (uint32_t)ring->tx_descs_phys & 0xffffffff;
	@@ -608,7 +598,7 @@
	}

	if (ring->tx_head == head) {
	- avail = 0; // ring->tx_size;
	+ avail = 0;
	goto done;
	}

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